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([2001:470:42c4:101:2adc:3694:a494:b638]) by smtp.gmail.com with ESMTPSA id j14-20020a02cb0e000000b0041a84d0c828sm3158012jap.87.2023.06.06.16.09.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 06 Jun 2023 16:09:40 -0700 (PDT) Message-ID: <574e7234-b3a7-3e25-06bf-76902c802275@gmail.com> Date: Tue, 6 Jun 2023 17:09:39 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH 0/8] SUNIV SPI NAND support in SPL Content-Language: en-US To: Icenowy Zheng , u-boot@lists.denx.de Cc: Andre Przywara References: <20221014030520.3067228-1-uwu@icenowy.me> <2bd3c41aafb918d545f666d7cf7136b8b21df5fb.camel@icenowy.me> From: Sam Edwards In-Reply-To: <2bd3c41aafb918d545f666d7cf7136b8b21df5fb.camel@icenowy.me> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 6/6/23 00:39, Icenowy Zheng wrote: > Well it depends on whether all SoCs differienate between SPI NOR and > SPI NAND. Allwinner chips that (have datasheets saying they) support boot from SPI-NAND seem quite few and far between, but I've learned that the answer is "not all": the V3s, at least, appears to use 0x03 in the boot field when booting from SPI-NAND. (Note: I do not have a V3s that I tested with; I studied a dumped BROM.) Still, I believe it's sensible that, when we know for sure we're coming from SPI-NAND (because it's a newer sunxi that reports 0x04, or we know from the suniv stack-checking hack), we should call that its own SPL load method, which does not fall back to SPI-NOR. The SPI(-NOR) load method naturally has to implement the try-NAND-first logic for some of these SoCs, but perhaps we could call it a "quirk" and only do that for chips that aren't known to report SPI-NAND directly? > Do you have any suggestion on as many chips models as possible boards > with SPI NAND? I know of only one: the Turing Pi 2, which is the only target I'm trying to support. I'm guessing you're looking for some such boards so you can identify which of them report 0x03 and which report 0x04? I'd be happy to analyze some BROMs from chips known to support SPI-NAND boot if you know where I can find them. Thanks, Sam