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[46.188.121.115]) by smtp.gmail.com with ESMTPSA id m6sm912730lbc.28.2016.06.05.09.54.35 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 05 Jun 2016 09:54:35 -0700 (PDT) Subject: Re: [RFC v1 10/12] arm: use tlb_flush_page_all for tlbimva[a] To: =?UTF-8?Q?Alex_Benn=c3=a9e?= , mttcg@listserver.greensocs.com, fred.konrad@greensocs.com, a.rigo@virtualopensystems.com, cota@braap.org References: <1460730231-1184-1-git-send-email-alex.bennee@linaro.org> <1460730231-1184-12-git-send-email-alex.bennee@linaro.org> Cc: qemu-devel@nongnu.org, mark.burton@greensocs.com, pbonzini@redhat.com, jan.kiszka@siemens.com, rth@twiddle.net, peter.maydell@linaro.org, claudio.fontana@huawei.com, Peter Crosthwaite , "open list:ARM" From: Sergey Fedorov Message-ID: <5754594A.10304@gmail.com> Date: Sun, 5 Jun 2016 19:54:34 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: <1460730231-1184-12-git-send-email-alex.bennee@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-TUID: dWMcrZHhFgOy On 15/04/16 17:23, Alex Bennée wrote: > From: KONRAD Frederic > > Instead of flushing each individual vCPU use the tlb_flush_page_all > functions which is async enabled for MTTCG. > > Signed-off-by: KONRAD Frederic > Signed-off-by: Alex Bennée > --- > include/exec/exec-all.h | 3 +++ > target-arm/helper.c | 12 ++---------- > 2 files changed, 5 insertions(+), 10 deletions(-) > > diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h > index 858055b..bc97683 100644 > --- a/include/exec/exec-all.h > +++ b/include/exec/exec-all.h > @@ -208,6 +208,9 @@ static inline void tlb_flush_page_by_mmuidx(CPUState *cpu, > static inline void tlb_flush_by_mmuidx(CPUState *cpu, ...) > { > } > +static inline void tlb_flush_page_all(target_ulong addr) > +{ > +} This change belongs to the patch which introduced the function. Kind regards, Sergey > #endif > > #define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */ > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 19d5d52..bc9fbda 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -554,21 +554,13 @@ static void tlbiasid_is_write(CPUARMState *env, const ARMCPRegInfo *ri, > static void tlbimva_is_write(CPUARMState *env, const ARMCPRegInfo *ri, > uint64_t value) > { > - CPUState *other_cs; > - > - CPU_FOREACH(other_cs) { > - tlb_flush_page(other_cs, value & TARGET_PAGE_MASK); > - } > + tlb_flush_page_all(value & TARGET_PAGE_MASK); > } > > static void tlbimvaa_is_write(CPUARMState *env, const ARMCPRegInfo *ri, > uint64_t value) > { > - CPUState *other_cs; > - > - CPU_FOREACH(other_cs) { > - tlb_flush_page(other_cs, value & TARGET_PAGE_MASK); > - } > + tlb_flush_page_all(value & TARGET_PAGE_MASK); > } > > static const ARMCPRegInfo cp_reginfo[] = { From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40678) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b9bK1-0004EE-2A for qemu-devel@nongnu.org; Sun, 05 Jun 2016 12:54:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b9bJz-0000AU-39 for qemu-devel@nongnu.org; Sun, 05 Jun 2016 12:54:44 -0400 References: <1460730231-1184-1-git-send-email-alex.bennee@linaro.org> <1460730231-1184-12-git-send-email-alex.bennee@linaro.org> From: Sergey Fedorov Message-ID: <5754594A.10304@gmail.com> Date: Sun, 5 Jun 2016 19:54:34 +0300 MIME-Version: 1.0 In-Reply-To: <1460730231-1184-12-git-send-email-alex.bennee@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [RFC v1 10/12] arm: use tlb_flush_page_all for tlbimva[a] List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Alex_Benn=c3=a9e?= , mttcg@listserver.greensocs.com, fred.konrad@greensocs.com, a.rigo@virtualopensystems.com, cota@braap.org Cc: qemu-devel@nongnu.org, mark.burton@greensocs.com, pbonzini@redhat.com, jan.kiszka@siemens.com, rth@twiddle.net, peter.maydell@linaro.org, claudio.fontana@huawei.com, Peter Crosthwaite , "open list:ARM" On 15/04/16 17:23, Alex Bennée wrote: > From: KONRAD Frederic > > Instead of flushing each individual vCPU use the tlb_flush_page_all > functions which is async enabled for MTTCG. > > Signed-off-by: KONRAD Frederic > Signed-off-by: Alex Bennée > --- > include/exec/exec-all.h | 3 +++ > target-arm/helper.c | 12 ++---------- > 2 files changed, 5 insertions(+), 10 deletions(-) > > diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h > index 858055b..bc97683 100644 > --- a/include/exec/exec-all.h > +++ b/include/exec/exec-all.h > @@ -208,6 +208,9 @@ static inline void tlb_flush_page_by_mmuidx(CPUState *cpu, > static inline void tlb_flush_by_mmuidx(CPUState *cpu, ...) > { > } > +static inline void tlb_flush_page_all(target_ulong addr) > +{ > +} This change belongs to the patch which introduced the function. Kind regards, Sergey > #endif > > #define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */ > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 19d5d52..bc9fbda 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -554,21 +554,13 @@ static void tlbiasid_is_write(CPUARMState *env, const ARMCPRegInfo *ri, > static void tlbimva_is_write(CPUARMState *env, const ARMCPRegInfo *ri, > uint64_t value) > { > - CPUState *other_cs; > - > - CPU_FOREACH(other_cs) { > - tlb_flush_page(other_cs, value & TARGET_PAGE_MASK); > - } > + tlb_flush_page_all(value & TARGET_PAGE_MASK); > } > > static void tlbimvaa_is_write(CPUARMState *env, const ARMCPRegInfo *ri, > uint64_t value) > { > - CPUState *other_cs; > - > - CPU_FOREACH(other_cs) { > - tlb_flush_page(other_cs, value & TARGET_PAGE_MASK); > - } > + tlb_flush_page_all(value & TARGET_PAGE_MASK); > } > > static const ARMCPRegInfo cp_reginfo[] = {