From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56590) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b9s4N-0002uy-Ai for qemu-devel@nongnu.org; Mon, 06 Jun 2016 06:47:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b9s4J-0003aL-3R for qemu-devel@nongnu.org; Mon, 06 Jun 2016 06:47:43 -0400 Received: from 4.mo69.mail-out.ovh.net ([46.105.42.102]:49007) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b9s4I-0003aG-T9 for qemu-devel@nongnu.org; Mon, 06 Jun 2016 06:47:39 -0400 Received: from player798.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo69.mail-out.ovh.net (Postfix) with ESMTP id 46431FFC5B9 for ; Mon, 6 Jun 2016 12:47:37 +0200 (CEST) References: <1465206764.4274.45.camel@kernel.crashing.org> From: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= Message-ID: <575554C3.2080402@kaod.org> Date: Mon, 6 Jun 2016 12:47:31 +0200 MIME-Version: 1.0 In-Reply-To: <1465206764.4274.45.camel@kernel.crashing.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 1/2] ppc: Properly tag the translation cache based on MMU mode List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Benjamin Herrenschmidt , qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org, David Gibson , Mark Cave-Ayland On 06/06/2016 11:52 AM, Benjamin Herrenschmidt wrote: > We used to always flush the TLB when changing relocation mode in > MSR:IR and MSR:DR (ie. MMU on/off for Instructions and Data). >=20 > We don't anymore since we have split mmu_idx for instruction and data. >=20 > However, since we hard code the mmu_idx in the translated code, we > now need to also make sure MSR:IR and MSR:DR are part of the hflags > used to tag translated code, so that we use different translated > code for different MMU settings. >=20 > Darwin gets hurt by this problem. >=20 > Signed-off-by: Benjamin Herrenschmidt Looks good on G3 and G4 running macosx10.2 and macosx10.4.=20 Tested-by: C=C3=A9dric Le Goater > --- > target-ppc/helper_regs.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h > index 12af61c..104b690 100644 > --- a/target-ppc/helper_regs.h > +++ b/target-ppc/helper_regs.h > @@ -95,7 +95,7 @@ static inline void hreg_compute_hflags(CPUPPCState *e= nv) > /* We 'forget' FE0 & FE1: we'll never generate imprecise exception= s */ > hflags_mask =3D (1 << MSR_VR) | (1 << MSR_AP) | (1 << MSR_SA) | > (1 << MSR_PR) | (1 << MSR_FP) | (1 << MSR_SE) | (1 << MSR_BE) = | > - (1 << MSR_LE) | (1 << MSR_VSX); > + (1 << MSR_LE) | (1 << MSR_VSX) | (1 << MSR_IR) | (1 << MSR_DR)= ; > hflags_mask |=3D (1ULL << MSR_CM) | (1ULL << MSR_SF) | MSR_HVB; > hreg_compute_mem_idx(env); > env->hflags =3D env->msr & hflags_mask; >=20 >=20