diff for duplicates of <5763FFF5.5000303@nvidia.com> diff --git a/a/1.txt b/N1/1.txt index e3a8c07..53a4097 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,7 +1,7 @@ Hi Thierry, On 26/05/16 17:41, Rhyland Klein wrote: -> From: Andrew Bresticker <abrestic@chromium.org> +> From: Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> > > Move the UTMIPLL initialization code form clk-tegra<chip>.c files into > clk-pll.c. UTMIPLL was being configured and set in HW control right @@ -25,11 +25,11 @@ On 26/05/16 17:41, Rhyland Klein wrote: > > which matches the Tegra124 TRM register definition. > -> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> +> Signed-off-by: Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> > > [rklein: Merged in some later fixes for potential deadlocks] > -> Signed-off-by: Rhyland Klein <rklein@nvidia.com> +> Signed-off-by: Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > --- > v5: > - Initialized flags to 0 to avoid harmless spinlock warnings diff --git a/a/content_digest b/N1/content_digest index ca3d5ca..b0ca98d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,24 +1,25 @@ "ref\01464280891-23036-1-git-send-email-rklein@nvidia.com\0" - "From\0Jon Hunter <jonathanh@nvidia.com>\0" + "ref\01464280891-23036-1-git-send-email-rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" + "From\0Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" "Subject\0Re: [PATCH v5] clk: tegra: Initialize UTMIPLL when enabling PLLU\0" "Date\0Fri, 17 Jun 2016 14:49:41 +0100\0" - "To\0Thierry Reding <thierry.reding@gmail.com>\0" - "Cc\0Rhyland Klein <rklein@nvidia.com>" - Peter De Schrijver <pdeschrijver@nvidia.com> - Mike Turquette <mturquette@baylibre.com> - Stephen Warren <swarren@wwwdotorg.org> - Stephen Boyd <sboyd@codeaurora.org> - Alexandre Courbot <gnurou@gmail.com> - <linux-clk@vger.kernel.org> - <linux-tegra@vger.kernel.org> - <linux-kernel@vger.kernel.org> - " Andrew Bresticker <abrestic@chromium.org>\0" + "To\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "Cc\0Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>" + Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> + Mike Turquette <mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> + Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> + Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> + Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> + linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>\0" "\00:1\0" "b\0" "Hi Thierry,\n" "\n" "On 26/05/16 17:41, Rhyland Klein wrote:\n" - "> From: Andrew Bresticker <abrestic@chromium.org>\n" + "> From: Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>\n" "> \n" "> Move the UTMIPLL initialization code form clk-tegra<chip>.c files into\n" "> clk-pll.c. UTMIPLL was being configured and set in HW control right\n" @@ -42,11 +43,11 @@ "> \n" "> which matches the Tegra124 TRM register definition.\n" "> \n" - "> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>\n" + "> Signed-off-by: Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>\n" "> \n" "> [rklein: Merged in some later fixes for potential deadlocks]\n" "> \n" - "> Signed-off-by: Rhyland Klein <rklein@nvidia.com>\n" + "> Signed-off-by: Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" "> ---\n" "> v5:\n" "> - Initialized flags to 0 to avoid harmless spinlock warnings\n" @@ -220,4 +221,4 @@ "-- \n" nvpublic -98bfc90b9b400666e28307820b5076546bcd3f719f828f0e2dcfcf2e9464a490 +092adf4bf7db7385408ccfbd99e40805179c585d52018b10f930101ac75c6b9a
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