From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 22/25] drm/i915: Embed signaling node into the GEM request
Date: Mon, 27 Jun 2016 12:54:24 +0100 [thread overview]
Message-ID: <577113F0.9060001@linux.intel.com> (raw)
In-Reply-To: <1466849588-17558-23-git-send-email-chris@chris-wilson.co.uk>
On 25/06/16 11:13, Chris Wilson wrote:
> Under the assumption that enabling signaling will be a frequent
> operation, lets preallocate our attachments for signaling inside the
> (rather large) request struct (and so benefiting from the slab cache).
>
> v2: Convert from void * to more meaningful names and types.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_breadcrumbs.c | 76 ++++++++++++++++----------------
> drivers/gpu/drm/i915/intel_ringbuffer.h | 10 ++++-
> 3 files changed, 46 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index b7089cedb80c..440f6267ec27 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2381,6 +2381,7 @@ struct drm_i915_gem_request {
> struct drm_i915_private *i915;
> struct intel_engine_cs *engine;
> unsigned reset_counter;
> + struct intel_signal_node signaling;
>
> /** GEM sequence number associated with the previous request,
> * when the HWS breadcrumb is equal to this the GPU is processing
> diff --git a/drivers/gpu/drm/i915/intel_breadcrumbs.c b/drivers/gpu/drm/i915/intel_breadcrumbs.c
> index bc0e9e8b7871..661d6b415ac3 100644
> --- a/drivers/gpu/drm/i915/intel_breadcrumbs.c
> +++ b/drivers/gpu/drm/i915/intel_breadcrumbs.c
> @@ -351,35 +351,29 @@ out_unlock:
> spin_unlock(&b->lock);
> }
>
> -struct signal {
> - struct rb_node node;
> - struct intel_wait wait;
> - struct drm_i915_gem_request *request;
> -};
> -
> -static bool signal_complete(struct signal *signal)
> +static bool signal_complete(struct drm_i915_gem_request *request)
> {
> - if (signal == NULL)
> + if (request == NULL)
> return false;
>
> /* If another process served as the bottom-half it may have already
> * signalled that this wait is already completed.
> */
> - if (intel_wait_complete(&signal->wait))
> + if (intel_wait_complete(&request->signaling.wait))
> return true;
>
> /* Carefully check if the request is complete, giving time for the
> * seqno to be visible or if the GPU hung.
> */
> - if (__i915_request_irq_complete(signal->request))
> + if (__i915_request_irq_complete(request))
> return true;
>
> return false;
> }
>
> -static struct signal *to_signal(struct rb_node *rb)
> +static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
> {
> - return container_of(rb, struct signal, node);
> + return container_of(rb, struct drm_i915_gem_request, signaling.node);
> }
>
> static void signaler_set_rtpriority(void)
> @@ -392,7 +386,7 @@ static int intel_breadcrumbs_signaler(void *arg)
> {
> struct intel_engine_cs *engine = arg;
> struct intel_breadcrumbs *b = &engine->breadcrumbs;
> - struct signal *signal;
> + struct drm_i915_gem_request *request;
>
> /* Install ourselves with high priority to reduce signalling latency */
> signaler_set_rtpriority();
> @@ -408,14 +402,13 @@ static int intel_breadcrumbs_signaler(void *arg)
> * need to wait for a new interrupt from the GPU or for
> * a new client.
> */
> - signal = READ_ONCE(b->first_signal);
> - if (signal_complete(signal)) {
> + request = READ_ONCE(b->first_signal);
> + if (signal_complete(request)) {
> /* Wake up all other completed waiters and select the
> * next bottom-half for the next user interrupt.
> */
> - intel_engine_remove_wait(engine, &signal->wait);
> -
> - i915_gem_request_unreference(signal->request);
> + intel_engine_remove_wait(engine,
> + &request->signaling.wait);
>
> /* Find the next oldest signal. Note that as we have
> * not been holding the lock, another client may
> @@ -424,12 +417,15 @@ static int intel_breadcrumbs_signaler(void *arg)
> * the oldest before picking the next one.
> */
> spin_lock(&b->lock);
> - if (signal == b->first_signal)
> - b->first_signal = rb_next(&signal->node);
> - rb_erase(&signal->node, &b->signals);
> + if (request == b->first_signal) {
> + struct rb_node *rb =
> + rb_next(&request->signaling.node);
> + b->first_signal = rb ? to_signaler(rb) : NULL;
> + }
> + rb_erase(&request->signaling.node, &b->signals);
> spin_unlock(&b->lock);
>
> - kfree(signal);
> + i915_gem_request_unreference(request);
> } else {
> if (kthread_should_stop())
> break;
> @@ -442,22 +438,25 @@ static int intel_breadcrumbs_signaler(void *arg)
> return 0;
> }
>
> -int intel_engine_enable_signaling(struct drm_i915_gem_request *request)
> +void intel_engine_enable_signaling(struct drm_i915_gem_request *request)
> {
> struct intel_engine_cs *engine = request->engine;
> struct intel_breadcrumbs *b = &engine->breadcrumbs;
> struct rb_node *parent, **p;
> - struct signal *signal;
> bool first, wakeup;
>
> - signal = kmalloc(sizeof(*signal), GFP_ATOMIC);
> - if (unlikely(!signal))
> - return -ENOMEM;
> + if (unlikely(READ_ONCE(request->signaling.wait.tsk)))
> + return;
>
> - signal->wait.tsk = b->signaler;
> - signal->wait.seqno = request->seqno;
> + spin_lock(&b->lock);
> + if (unlikely(request->signaling.wait.tsk)) {
> + wakeup = false;
> + goto unlock;
> + }
>
> - signal->request = i915_gem_request_reference(request);
> + request->signaling.wait.tsk = b->signaler;
> + request->signaling.wait.seqno = request->seqno;
> + i915_gem_request_reference(request);
>
> /* First add ourselves into the list of waiters, but register our
> * bottom-half as the signaller thread. As per usual, only the oldest
> @@ -467,35 +466,34 @@ int intel_engine_enable_signaling(struct drm_i915_gem_request *request)
> * If we are the oldest waiter, enable the irq (after which we
> * must double check that the seqno did not complete).
> */
> - wakeup = intel_engine_add_wait(engine, &signal->wait);
> + wakeup = __intel_engine_add_wait(engine, &request->signaling.wait);
>
> /* Now insert ourselves into the retirement ordered list of signals
> * on this engine. We track the oldest seqno as that will be the
> * first signal to complete.
> */
> - spin_lock(&b->lock);
> parent = NULL;
> first = true;
> p = &b->signals.rb_node;
> while (*p) {
> parent = *p;
> - if (i915_seqno_passed(signal->wait.seqno,
> - to_signal(parent)->wait.seqno)) {
> + if (i915_seqno_passed(request->seqno,
> + to_signaler(parent)->seqno)) {
> p = &parent->rb_right;
> first = false;
> } else
> p = &parent->rb_left;
> }
> - rb_link_node(&signal->node, parent, p);
> - rb_insert_color(&signal->node, &b->signals);
> + rb_link_node(&request->signaling.node, parent, p);
> + rb_insert_color(&request->signaling.node, &b->signals);
> if (first)
> - smp_store_mb(b->first_signal, signal);
> + smp_store_mb(b->first_signal, request);
> +
> +unlock:
> spin_unlock(&b->lock);
>
> if (wakeup)
> wake_up_process(b->signaler);
> -
> - return 0;
> }
>
> int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index c05b45727f7d..b55b9961d9f6 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -185,7 +185,7 @@ struct intel_engine_cs {
> struct intel_wait *first_wait; /* oldest waiter by retirement */
> struct task_struct *tasklet; /* bh for user interrupts */
> struct task_struct *signaler; /* used for fence signalling */
> - void *first_signal;
> + struct drm_i915_gem_request *first_signal;
> struct timer_list fake_irq; /* used after a missed interrupt */
> bool irq_enabled;
> bool rpm_wakelock;
> @@ -530,6 +530,12 @@ struct intel_wait {
> struct task_struct *tsk;
> u32 seqno;
> };
> +
> +struct intel_signal_node {
> + struct rb_node node;
> + struct intel_wait wait;
> +};
> +
> int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine);
> static inline void intel_wait_init(struct intel_wait *wait, u32 seqno)
> {
> @@ -544,7 +550,7 @@ bool intel_engine_add_wait(struct intel_engine_cs *engine,
> struct intel_wait *wait);
> void intel_engine_remove_wait(struct intel_engine_cs *engine,
> struct intel_wait *wait);
> -int intel_engine_enable_signaling(struct drm_i915_gem_request *request);
> +void intel_engine_enable_signaling(struct drm_i915_gem_request *request);
> static inline bool intel_engine_has_waiter(struct intel_engine_cs *engine)
> {
> return READ_ONCE(engine->breadcrumbs.tasklet);
>
Looks OK.
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
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next prev parent reply other threads:[~2016-06-27 11:54 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-25 10:12 A trail of breadcrumbs Chris Wilson
2016-06-25 10:12 ` [PATCH 01/25] drm/i915: Preserve current RPS frequency across init Chris Wilson
2016-06-25 10:12 ` [PATCH 02/25] drm/i915: Remove superfluous powersave work flushing Chris Wilson
2016-06-25 10:12 ` [PATCH 03/25] drm/i915: Defer enabling rc6 til after we submit the first batch/context Chris Wilson
2016-06-25 10:12 ` [PATCH 04/25] drm: Restore double clflush on the last partial cacheline Chris Wilson
2016-06-25 10:12 ` Chris Wilson
2016-06-25 10:12 ` [PATCH 05/25] drm/i915/shrinker: Flush active on objects before counting Chris Wilson
2016-06-25 10:12 ` [PATCH 06/25] drm/i915: Delay queuing hangcheck to wait-request Chris Wilson
2016-06-25 10:12 ` [PATCH 07/25] drm/i915: Remove the dedicated hangcheck workqueue Chris Wilson
2016-06-25 10:12 ` [PATCH 08/25] drm/i915: Make queueing the hangcheck work inline Chris Wilson
2016-06-25 10:12 ` [PATCH 09/25] drm/i915: Separate GPU hang waitqueue from advance Chris Wilson
2016-06-25 10:12 ` [PATCH 10/25] drm/i915: Slaughter the thundering i915_wait_request herd Chris Wilson
2016-06-25 10:12 ` [PATCH 11/25] drm/i915: Spin after waking up for an interrupt Chris Wilson
2016-06-27 10:32 ` Tvrtko Ursulin
2016-06-28 8:55 ` Chris Wilson
2016-06-28 9:17 ` Chris Wilson
2016-06-28 9:25 ` Tvrtko Ursulin
2016-06-25 10:12 ` [PATCH 12/25] drm/i915: Use HWS for seqno tracking everywhere Chris Wilson
2016-06-25 10:12 ` [PATCH 13/25] drm/i915: Stop mapping the scratch page into CPU space Chris Wilson
2016-06-25 10:12 ` [PATCH 14/25] drm/i915: Allocate scratch page from stolen Chris Wilson
2016-06-25 10:12 ` [PATCH 15/25] drm/i915: Refactor scratch object allocation for gen2 w/a buffer Chris Wilson
2016-06-25 10:12 ` [PATCH 16/25] drm/i915: Add a delay between interrupt and inspecting the final seqno (ilk) Chris Wilson
2016-06-25 10:13 ` [PATCH 17/25] drm/i915: Check the CPU cached value in HWS of seqno after waking the waiter Chris Wilson
2016-06-25 10:13 ` [PATCH 18/25] drm/i915: Only apply one barrier after a breadcrumb interrupt is posted Chris Wilson
2016-06-27 10:35 ` Tvrtko Ursulin
2016-06-25 10:13 ` [PATCH 19/25] drm/i915: Stop setting wraparound seqno on initialisation Chris Wilson
2016-06-25 10:13 ` [PATCH 20/25] drm/i915: Only query timestamp when measuring elapsed time Chris Wilson
2016-06-27 10:37 ` Tvrtko Ursulin
2016-06-25 10:13 ` [PATCH 21/25] drm/i915: Convert trace-irq to the breadcrumb waiter Chris Wilson
2016-06-27 11:38 ` Tvrtko Ursulin
2016-06-28 8:49 ` Chris Wilson
2016-06-25 10:13 ` [PATCH 22/25] drm/i915: Embed signaling node into the GEM request Chris Wilson
2016-06-27 11:54 ` Tvrtko Ursulin [this message]
2016-06-25 10:13 ` [PATCH 23/25] drm/i915: Move the get/put irq locking into the caller Chris Wilson
2016-06-27 12:11 ` Tvrtko Ursulin
2016-06-28 8:42 ` Chris Wilson
2016-06-25 10:13 ` [PATCH 24/25] drm/i915: Simplify enabling user-interrupts with L3-remapping Chris Wilson
2016-06-25 10:13 ` [PATCH 25/25] drm/i915: Remove debug noise on detecting fault-injection of missed interrupts Chris Wilson
2016-06-25 10:43 ` ✗ Ro.CI.BAT: warning for series starting with [01/25] drm/i915: Preserve current RPS frequency across init Patchwork
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