From: Florian Fainelli <f.fainelli@gmail.com>
To: Stefan Hauser <stefan@shauser.net>,
netdev@vger.kernel.org, Dan Murphy <dmurphy@ti.com>
Subject: Re: [PATCH] net: phy: dp83867: Fix initialization of PHYCR register
Date: Sat, 2 Jul 2016 10:01:34 -0700 [thread overview]
Message-ID: <5777F36E.6090105@gmail.com> (raw)
In-Reply-To: <1467405303-19212-1-git-send-email-stefan@shauser.net>
Le 01/07/2016 13:35, Stefan Hauser a écrit :
> When initializing the PHY control register, the FIFO depth bits are
> written without reading the previous register value, i.e. all other
> bits are overwritten with zero. This disables automatic MDI-X
> configuration, which is enabled by default. Fix initialization by doing
> a read/modify/write operation.
>
> Signed-off-by: Stefan Hauser <stefan@shauser.net>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Fixes: 2a10154abcb7 ("net: phy: dp83867: Add TI dp83867 phy")
--
Florian
next prev parent reply other threads:[~2016-07-02 17:01 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-01 20:35 [PATCH] net: phy: dp83867: Fix initialization of PHYCR register Stefan Hauser
2016-07-02 17:01 ` Florian Fainelli [this message]
2016-07-02 18:49 ` David Miller
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