diff for duplicates of <577CC37B.9070806@huawei.com>

diff --git a/a/1.txt b/N1/1.txt
index 94c5ac9..3d2bbf1 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,6 +1,6 @@
 Hi Po
 
-在 2016/7/5 11:03, Po Liu 写道:
+? 2016/7/5 11:03, Po Liu ??:
 > Hi Dongdong,
 >
 > The patch were intend to fixup the NXP layerscape serial SOC and were tested ok.
@@ -12,11 +12,11 @@ My platform is an ARM64 platform, PCIe host controller also use Synopsys Designw
 >
 >
 >>   -----Original Message-----
->>   From: Dongdong Liu [mailto:liudongdong3@huawei.com]
+>>   From: Dongdong Liu [mailto:liudongdong3 at huawei.com]
 >>   Sent: Monday, July 04, 2016 4:44 PM
->>   To: Po Liu; linux-pci@vger.kernel.org; linux-arm-
->>   kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
->>   devicetree@vger.kernel.org
+>>   To: Po Liu; linux-pci at vger.kernel.org; linux-arm-
+>>   kernel at lists.infradead.org; linux-kernel at vger.kernel.org;
+>>   devicetree at vger.kernel.org
 >>   Cc: Bjorn Helgaas; Shawn Guo; Marc Zyngier; Rob Herring; Roy Zang;
 >>   Mingkai Hu; Stuart Yoder; Yang-Leo Li; Arnd Bergmann; Minghuan Lian;
 >>   Murali Karicheri; Linuxarm
@@ -87,7 +87,7 @@ Dongdong
 >>
 >>   Thanks
 >>   Dongdong
->>   在 2016/6/14 16:24, Po Liu 写道:
+>>   ? 2016/6/14 16:24, Po Liu ??:
 >>   > On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
 >>   > When chip support the aer interrupt with none MSI/MSI-X/INTx mode,
 >>   > maybe there is interrupt line for aer pme etc. Search the interrupt
@@ -151,5 +151,7 @@ Dongdong
 >>   >
 >>
 >
-> \x04�{.n�+�������+%��lzwm��b�맲��r��zX��\x1a\�)���w*\x1fjg���\x1e�����ݢj/���z�ޖ��2�ޙ���&�)ߡ�a��\x7f��\x1e�G���h�\x0f�j:+v���w�٥
+> \x04?{.n?+???????+%??lzwm??b????r??zX??\x1a\?)???w*\x1fjg???
+??????j/???z????2?????&?)??a??\x7f??
+?G???h?\x0f?j:+v???w??
 >
diff --git a/a/content_digest b/N1/content_digest
index 9092019..c57ae73 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -3,31 +3,15 @@
  "ref\01465892645-32381-2-git-send-email-po.liu@nxp.com\0"
  "ref\0577A21E4.1030301@huawei.com\0"
  "ref\0VI1PR0401MB1709D556D0A7F7BB9188221E92390@VI1PR0401MB1709.eurprd04.prod.outlook.com\0"
- "From\0Dongdong Liu <liudongdong3@huawei.com>\0"
- "Subject\0Re: [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk\0"
+ "From\0liudongdong3@huawei.com (Dongdong Liu)\0"
+ "Subject\0[PATCH v3 2/2] pci/aer: interrupt fixup in the quirk\0"
  "Date\0Wed, 6 Jul 2016 16:38:19 +0800\0"
- "To\0Po Liu <po.liu@nxp.com>"
-  linux-pci@vger.kernel.org <linux-pci@vger.kernel.org>
-  linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>
-  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
- " devicetree@vger.kernel.org <devicetree@vger.kernel.org>\0"
- "Cc\0Bjorn Helgaas <bhelgaas@google.com>"
-  Shawn Guo <shawnguo@kernel.org>
-  Marc Zyngier <marc.zyngier@arm.com>
-  Rob Herring <robh@kernel.org>
-  Roy Zang <roy.zang@nxp.com>
-  Mingkai Hu <mingkai.hu@nxp.com>
-  Stuart Yoder <stuart.yoder@nxp.com>
-  Yang-Leo Li <leoyang.li@nxp.com>
-  Arnd Bergmann <arnd@arndb.de>
-  Minghuan Lian <minghuan.lian@nxp.com>
-  Murali Karicheri <m-karicheri2@ti.com>
- " Linuxarm <linuxarm@huawei.com>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Hi Po\n"
  "\n"
- "\345\234\250 2016/7/5 11:03, Po Liu \345\206\231\351\201\223:\n"
+ "? 2016/7/5 11:03, Po Liu ??:\n"
  "> Hi Dongdong,\n"
  ">\n"
  "> The patch were intend to fixup the NXP layerscape serial SOC and were tested ok.\n"
@@ -39,11 +23,11 @@
  ">\n"
  ">\n"
  ">>   -----Original Message-----\n"
- ">>   From: Dongdong Liu [mailto:liudongdong3@huawei.com]\n"
+ ">>   From: Dongdong Liu [mailto:liudongdong3 at huawei.com]\n"
  ">>   Sent: Monday, July 04, 2016 4:44 PM\n"
- ">>   To: Po Liu; linux-pci@vger.kernel.org; linux-arm-\n"
- ">>   kernel@lists.infradead.org; linux-kernel@vger.kernel.org;\n"
- ">>   devicetree@vger.kernel.org\n"
+ ">>   To: Po Liu; linux-pci at vger.kernel.org; linux-arm-\n"
+ ">>   kernel at lists.infradead.org; linux-kernel at vger.kernel.org;\n"
+ ">>   devicetree at vger.kernel.org\n"
  ">>   Cc: Bjorn Helgaas; Shawn Guo; Marc Zyngier; Rob Herring; Roy Zang;\n"
  ">>   Mingkai Hu; Stuart Yoder; Yang-Leo Li; Arnd Bergmann; Minghuan Lian;\n"
  ">>   Murali Karicheri; Linuxarm\n"
@@ -114,7 +98,7 @@
  ">>\n"
  ">>   Thanks\n"
  ">>   Dongdong\n"
- ">>   \345\234\250 2016/6/14 16:24, Po Liu \345\206\231\351\201\223:\n"
+ ">>   ? 2016/6/14 16:24, Po Liu ??:\n"
  ">>   > On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.\n"
  ">>   > When chip support the aer interrupt with none MSI/MSI-X/INTx mode,\n"
  ">>   > maybe there is interrupt line for aer pme etc. Search the interrupt\n"
@@ -178,7 +162,9 @@
  ">>   >\n"
  ">>\n"
  ">\n"
- "> \004\357\277\275{.n\357\277\275+\357\277\275\357\277\275\357\277\275\357\277\275\357\277\275\357\277\275\357\277\275+%\357\277\275\357\277\275lzwm\357\277\275\357\277\275b\357\277\275\353\247\262\357\277\275\357\277\275r\357\277\275\357\277\275zX\357\277\275\357\277\275\032\\\357\277\275)\357\277\275\357\277\275\357\277\275w*\037jg\357\277\275\357\277\275\357\277\275\036\357\277\275\357\277\275\357\277\275\357\277\275\357\277\275\335\242j/\357\277\275\357\277\275\357\277\275z\357\277\275\336\226\357\277\275\357\277\2752\357\277\275\336\231\357\277\275\357\277\275\357\277\275&\357\277\275)\337\241\357\277\275a\357\277\275\357\277\275\177\357\277\275\357\277\275\036\357\277\275G\357\277\275\357\277\275\357\277\275h\357\277\275\017\357\277\275j:+v\357\277\275\357\277\275\357\277\275w\357\277\275\331\245\n"
+ "> \004?{.n?+???????+%??lzwm??b????r??zX??\032\\?)???w*\037jg???\n"
+ "??????j/???z????2?????&?)??a??\177??\n"
+ "?G???h?\017?j:+v???w??\n"
  >
 
-d23015c0d9209cec3a49231bbdcc3d8fdf17b18c081cbe8c649f552e4c3c258e
+d57bb05c4ec4757d8c825cc9cf0fcb1efed0a2636ca1717b888c1f750d552c86
