From mboxrd@z Thu Jan 1 00:00:00 1970 From: Krzysztof Kozlowski Subject: Re: [PATCH] spi: s3c64xx: do not disable the clock while configuring the spi Date: Thu, 07 Jul 2016 11:41:49 +0200 Message-ID: <577E23DD.1040906@samsung.com> References: <1467876237-12183-1-git-send-email-andi.shyti@samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-reply-to: <1467876237-12183-1-git-send-email-andi.shyti@samsung.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Andi Shyti , Mark Brown Cc: linux-samsung-soc@vger.kernel.org, Andi Shyti , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Kukjin Kim , Sylwester Nawrocki , linux-arm-kernel@lists.infradead.org List-Id: linux-samsung-soc@vger.kernel.org On 07/07/2016 09:23 AM, Andi Shyti wrote: > When the clock is coming from the cmu it is not required to be > disabled and then re-enabled in order to change the rate. > > Besides, some exynos chipsets (e.g. exynos5433) do not deliver > any to the SFR if one from the pclk ("spi" in this case) or sclk > ("busclk") is disabled. > > Remove the clock disabling/enabling to avoid falling into this > situation. > > Signed-off-by: Sylwester Nawrocki > Signed-off-by: Andi Shyti > --- > > Hi, > > This patch has been tested by me and Sylwester on Trats2 > (exynos4412) and tm2(e) (exynos5433) boards, for big data > (which use dma transfer) and small data. > > It also fixes in exynos5433 a synchronus abort caused by the fact > that the pclk (spi) doesn't get delivered if the sclk is disabled > (busclk) > > Thanks, > Andi > > drivers/spi/spi-s3c64xx.c | 8 +------- > 1 file changed, 1 insertion(+), 7 deletions(-) Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 From: k.kozlowski@samsung.com (Krzysztof Kozlowski) Date: Thu, 07 Jul 2016 11:41:49 +0200 Subject: [PATCH] spi: s3c64xx: do not disable the clock while configuring the spi In-Reply-To: <1467876237-12183-1-git-send-email-andi.shyti@samsung.com> References: <1467876237-12183-1-git-send-email-andi.shyti@samsung.com> Message-ID: <577E23DD.1040906@samsung.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 07/07/2016 09:23 AM, Andi Shyti wrote: > When the clock is coming from the cmu it is not required to be > disabled and then re-enabled in order to change the rate. > > Besides, some exynos chipsets (e.g. exynos5433) do not deliver > any to the SFR if one from the pclk ("spi" in this case) or sclk > ("busclk") is disabled. > > Remove the clock disabling/enabling to avoid falling into this > situation. > > Signed-off-by: Sylwester Nawrocki > Signed-off-by: Andi Shyti > --- > > Hi, > > This patch has been tested by me and Sylwester on Trats2 > (exynos4412) and tm2(e) (exynos5433) boards, for big data > (which use dma transfer) and small data. > > It also fixes in exynos5433 a synchronus abort caused by the fact > that the pclk (spi) doesn't get delivered if the sclk is disabled > (busclk) > > Thanks, > Andi > > drivers/spi/spi-s3c64xx.c | 8 +------- > 1 file changed, 1 insertion(+), 7 deletions(-) Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757017AbcGGJnt (ORCPT ); Thu, 7 Jul 2016 05:43:49 -0400 Received: from mailout2.w1.samsung.com ([210.118.77.12]:26873 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751186AbcGGJma (ORCPT ); Thu, 7 Jul 2016 05:42:30 -0400 X-AuditID: cbfec7f5-f792a6d000001302-99-577e23de9f66 Subject: Re: [PATCH] spi: s3c64xx: do not disable the clock while configuring the spi To: Andi Shyti , Mark Brown References: <1467876237-12183-1-git-send-email-andi.shyti@samsung.com> Cc: Sylwester Nawrocki , Kukjin Kim , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Andi Shyti From: Krzysztof Kozlowski Message-id: <577E23DD.1040906@samsung.com> Date: Thu, 07 Jul 2016 11:41:49 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-version: 1.0 In-reply-to: <1467876237-12183-1-git-send-email-andi.shyti@samsung.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrOLMWRmVeSWpSXmKPExsVy+t/xK7r3lOvCDW62mVtsP/KM1WLxj+dM FlMfPmGzeP3C0KL/8Wtmi02Pr7FaXN41h81ixvl9TBaNH2+yWxx+087qwOVxfcknZo9NqzrZ PDYvqffo27KK0ePzJrkA1igum5TUnMyy1CJ9uwSujE1/zzAWHOeoOPvmDHMD4yO2LkZODgkB E4kD/SvZIWwxiQv31gPFuTiEBJYyStze+oIJwnnGKLFk7mpmkCphgXCJI/s3soDYIgIeEiu2 tYJ1Cwm4Saz6e4sdpIFZ4CujROeuj6wgCTYBY4nNy5eAreMV0JJ4sL0bqJmDg0VAVaJvoilI WFQgQmLW9h9MECWCEj8m3wObzyngLjF58iUmkHJmAT2J+xe1QMLMAvISm9e8ZZ7AKDALSccs hKpZSKoWMDKvYhRNLU0uKE5KzzXSK07MLS7NS9dLzs/dxAgJ/q87GJceszrEKMDBqMTDuyCn NlyINbGsuDL3EKMEB7OSCO8CubpwId6UxMqq1KL8+KLSnNTiQ4zSHCxK4rwzd70PERJITyxJ zU5NLUgtgskycXBKNTBenXT/6kcZO+GdSexc4orSjRb/W3YmF6ys63fKnhm1om6V7MEOm/X/ dc+zHtzsH/XAImS1pK6IHOfPtJ+RE37u/r3z1rYPd54UNLu5VAQ/dd726RL/r19ab6df9NVX K+AvMjvAfMZZ8nX0V54qx4q3Wa3dr6YfLffPzvCLNZP/K6goFvLFSESJpTgj0VCLuag4EQDt 1WXiegIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/07/2016 09:23 AM, Andi Shyti wrote: > When the clock is coming from the cmu it is not required to be > disabled and then re-enabled in order to change the rate. > > Besides, some exynos chipsets (e.g. exynos5433) do not deliver > any to the SFR if one from the pclk ("spi" in this case) or sclk > ("busclk") is disabled. > > Remove the clock disabling/enabling to avoid falling into this > situation. > > Signed-off-by: Sylwester Nawrocki > Signed-off-by: Andi Shyti > --- > > Hi, > > This patch has been tested by me and Sylwester on Trats2 > (exynos4412) and tm2(e) (exynos5433) boards, for big data > (which use dma transfer) and small data. > > It also fixes in exynos5433 a synchronus abort caused by the fact > that the pclk (spi) doesn't get delivered if the sclk is disabled > (busclk) > > Thanks, > Andi > > drivers/spi/spi-s3c64xx.c | 8 +------- > 1 file changed, 1 insertion(+), 7 deletions(-) Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof