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From: Julien Grall <julien.grall@arm.com>
To: Jan Beulich <JBeulich@suse.com>,
	Tamas K Lengyel <tamas.lengyel@zentific.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Stefano Stabellini <sstabellini@kernel.org>
Subject: Re: [PATCH v8 4/6] arm/vm_event: get/set registers
Date: Thu, 7 Jul 2016 10:46:05 +0100	[thread overview]
Message-ID: <577E24DD.3090201@arm.com> (raw)
In-Reply-To: <577E2D8E02000078000FBFE7@prv-mh.provo.novell.com>



On 07/07/16 09:23, Jan Beulich wrote:
>>>> On 06.07.16 at 21:12, <tamas.lengyel@zentific.com> wrote:
>> On Wed, Jul 6, 2016 at 12:04 PM, Julien Grall <julien.grall@arm.com> wrote:
>>>
>>>
>>> On 05/07/16 19:37, Tamas K Lengyel wrote:
>>>>
>>>> +void vm_event_fill_regs(vm_event_request_t *req)
>>>> +{
>>>> +    const struct cpu_user_regs *regs = guest_cpu_user_regs();
>>>> +
>>>> +    req->data.regs.arm.cpsr = regs->cpsr;
>>>> +    req->data.regs.arm.ttbr0 = READ_SYSREG64(TTBR0_EL1);
>>>> +    req->data.regs.arm.ttbr1 = READ_SYSREG64(TTBR1_EL1);
>>>> +
>>>> +    if ( psr_mode_is_32bit(regs->cpsr) )
>>>> +    {
>>>> +        req->data.regs.arm.arch.arm32.r0 = regs->r0;
>>>> +        req->data.regs.arm.arch.arm32.r1 = regs->r1;
>>>> +        req->data.regs.arm.arch.arm32.r2 = regs->r2;
>>>> +        req->data.regs.arm.arch.arm32.r3 = regs->r3;
>>>> +        req->data.regs.arm.arch.arm32.r4 = regs->r4;
>>>> +        req->data.regs.arm.arch.arm32.r5 = regs->r5;
>>>> +        req->data.regs.arm.arch.arm32.r6 = regs->r6;
>>>> +        req->data.regs.arm.arch.arm32.r7 = regs->r7;
>>>> +        req->data.regs.arm.arch.arm32.r8 = regs->r8;
>>>> +        req->data.regs.arm.arch.arm32.r9 = regs->r9;
>>>> +        req->data.regs.arm.arch.arm32.r10 = regs->r10;
>>>> +        req->data.regs.arm.arch.arm32.r11 = regs->fp;
>>>> +        req->data.regs.arm.arch.arm32.r12 = regs->r12;
>>>> +        req->data.regs.arm.arch.arm32.r13 = regs->sp;
>>>
>>>
>>> Please look at the description of "sp" in cpu_user_regs. You will notice
>>> this is only valid for the hypervisor.
>>>
>>> There are multiple stack pointers for the guest depending on the running
>>> mode (see B9.2.1 in ARM DDI 0406C.c), so you may want to pass all of them.
>>>
>>>> +        req->data.regs.arm.arch.arm32.r14 = regs->lr;
>>>
>>>
>>> Whilst lr is an union with lr_usr on ARM32 port, for the ARM64 port they are
>>> distinct (see cpu_users). So you would use the wrong register here.
>>>
>>> However, as for sp, there are multiple lr pointers for the guest depending
>>> on the running mode. So you will pass the wrong lr if the guest is running
>>> in another mode than user.
>>>
>>
>> This patch is becoming a lot more work then what I need it for so I'm
>> inclined to just reduce it to the bare minimum my use-case requires,
>> which is only cpsr, pc and ttbr0 and ttbr1. I had reservation about
>> growing the data field in the vm_event struct anyway, especially since
>> there is no use-case that requires it. In case someone has an actual
>> use-case in the future that requires other registers to be submitted
>> through vm_event, the interface is available for extension.
>
> Rather than dropping this patch entirely (as you suggest in your
> other reply) I am, fwiw, fine with a register set not including any
> GPRs at all. Not sure about Julien though.

Well, the SMC instructions are used to communicate with the secure mode 
(usually a trusted firmware).

In general, if you want to trap the SMC instructions it is for emulating 
them and not using them for breakpoint in the guest (as for Tamas's 
use-case). In this case, you want to have the set of GPRs available in 
the vm_event request to avoid the overhead of the DOMCTL_getvcpucontext 
(assuming the vCPU has been paused).

Adding the GPRs in the vm_event will likely require to bump the version 
number (VM_EVENT_INTERFACE_VERSION) because the ABI will not be 
compatible. If we consider that it is ok to ask developers to rebuild 
their vm-event app, then fine.

Anyway, I think this patch was in a good state (though few registers 
were needed clarification). Assuming it is ok to break the compatibility 
later on, I will not oppose to have a reduce set.

Regards,

-- 
Julien Grall

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  reply	other threads:[~2016-07-07  9:46 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-05 18:37 [PATCH v8 1/6] monitor: rename and relocate vm_event_monitor_traps Tamas K Lengyel
2016-07-05 18:37 ` [PATCH v8 2/6] arm: filter SMC exceptions with failed condition checks Tamas K Lengyel
2016-07-06 17:31   ` Julien Grall
2016-07-06 18:52     ` Tamas K Lengyel
2016-07-05 18:37 ` [PATCH v8 3/6] monitor: ARM SMC events Tamas K Lengyel
2016-07-05 18:37 ` [PATCH v8 4/6] arm/vm_event: get/set registers Tamas K Lengyel
2016-07-06  7:43   ` Jan Beulich
2016-07-06  7:59     ` Razvan Cojocaru
2016-07-06 17:39     ` Julien Grall
2016-07-06 19:23     ` Tamas K Lengyel
2016-07-06 21:12       ` Julien Grall
2016-07-06 22:01         ` Tamas K Lengyel
2016-07-06 18:04   ` Julien Grall
2016-07-06 19:12     ` Tamas K Lengyel
2016-07-07  8:23       ` Jan Beulich
2016-07-07  9:46         ` Julien Grall [this message]
2016-07-07  9:57           ` Jan Beulich
2016-07-07 10:09             ` Julien Grall
2016-07-07 15:53               ` Tamas K Lengyel
2016-07-05 18:37 ` [PATCH v8 5/6] tools/libxc: add xc_monitor_privileged_call Tamas K Lengyel
2016-07-05 18:37 ` [PATCH v8 6/6] tools/xen-access: add test-case for ARM SMC Tamas K Lengyel
2016-07-07 10:05   ` Julien Grall
2016-07-07 15:54     ` Tamas K Lengyel
2016-07-05 19:15 ` [PATCH v8 1/6] monitor: rename and relocate vm_event_monitor_traps Razvan Cojocaru

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