From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yakir Yang Subject: Re: [PATCH v3 4/4] drm/rockchip: analogix_dp: implement PSR function Date: Fri, 8 Jul 2016 10:32:06 +0800 Message-ID: <577F10A6.6040206@rock-chips.com> References: <1467364685-21390-1-git-send-email-ykk@rock-chips.com> <1467364776-21794-1-git-send-email-ykk@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Sean Paul Cc: Krzysztof Kozlowski , linux-samsung-soc , linux-rockchip@lists.infradead.org, Mark Yao , Daniel Vetter , Emil Velikov , Doug Anderson , dri-devel , Tomasz Figa , Javier Martinez Canillas , Jingoo Han , =?UTF-8?Q?St=c3=a9phane_Marchesin?= , Thierry Reding , Linux Kernel Mailing List List-Id: linux-rockchip.vger.kernel.org U2VhbiwKCk9uIDA3LzAyLzIwMTYgMDQ6MDUgQU0sIFNlYW4gUGF1bCB3cm90ZToKPiBPbiBGcmks IEp1bCAxLCAyMDE2IGF0IDU6MTkgQU0sIFlha2lyIFlhbmcgPHlra0Byb2NrLWNoaXBzLmNvbT4g d3JvdGU6Cj4+IEFsd2F5IGVuYWJsZSB0aGUgUFNSIGZ1bmN0aW9uIGZvciBSb2NrY2hpcCBhbmFs b2dpeF9kcCBkcml2ZXIuIElmIHBhbmVsCj4+IGRvbid0IHN1cHBvcnQgUFNSLCB0aGVuIHRoZSBj b3JlIGFuYWxvZ2l4X2RwIHdvdWxkIGlnbm9yZSB0aGlzIHNldHRpbmcuCj4+Cj4+IFNpZ25lZC1v ZmYtYnk6IFlha2lyIFlhbmcgPHlra0Byb2NrLWNoaXBzLmNvbT4KPj4gLS0tCj4+IENoYW5nZXMg aW4gdjM6Cj4+IC0gc3BsaXQgdGhlIGNvbW1vbiBwc3IgbG9naWMgaW50byBhIHNlcGVyYXRlIGRy aXZlciwgbWFrZSB0aGlzIHRvIGEKPj4gICAgc2ltcGxlIHN1Yi1wc3IgZGV2aWNlIGRyaXZlci4K Pj4KPj4gQ2hhbmdlcyBpbiB2MjoKPj4gLSByZW1vdmUgdmJsYW5rIG5vdGlmeSBvdXQgKERhbmll bCkKPj4gLSBjcmVhdGUgYSBwc3JfYWN0aXZlKCkgY2FsbGJhY2sgaW4gdm9wIGRhdGEgc3RydWN0 Lgo+Pgo+PiAgIGRyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9hbmFsb2dpeF9kcC1yb2NrY2hpcC5j IHwgNTIgKysrKysrKysrKysrKysrKysrKysrKysrKwo+PiAgIDEgZmlsZSBjaGFuZ2VkLCA1MiBp bnNlcnRpb25zKCspCj4+Cj4+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAv YW5hbG9naXhfZHAtcm9ja2NoaXAuYyBiL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9hbmFsb2dp eF9kcC1yb2NrY2hpcC5jCj4+IGluZGV4IGU4MWUxOWEuLjgwYTYwYTYgMTAwNjQ0Cj4+IC0tLSBh L2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9hbmFsb2dpeF9kcC1yb2NrY2hpcC5jCj4+ICsrKyBi L2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9hbmFsb2dpeF9kcC1yb2NrY2hpcC5jCj4+IEBAIC0z Miw2ICszMiw3IEBACj4+ICAgI2luY2x1ZGUgPGRybS9icmlkZ2UvYW5hbG9naXhfZHAuaD4KPj4K Pj4gICAjaW5jbHVkZSAicm9ja2NoaXBfZHJtX2Rydi5oIgo+PiArI2luY2x1ZGUgInJvY2tjaGlw X2RybV9wc3IuaCIKPj4gICAjaW5jbHVkZSAicm9ja2NoaXBfZHJtX3ZvcC5oIgo+Pgo+PiAgICNk ZWZpbmUgUkszMjg4X0dSRl9TT0NfQ09ONiAgICAgICAgICAgIDB4MjVjCj4+IEBAIC02OCwxMSAr NjksNTMgQEAgc3RydWN0IHJvY2tjaGlwX2RwX2RldmljZSB7Cj4+ICAgICAgICAgIHN0cnVjdCBy ZWdtYXAgICAgICAgICAgICAqZ3JmOwo+PiAgICAgICAgICBzdHJ1Y3QgcmVzZXRfY29udHJvbCAg ICAgKnJzdDsKPj4KPj4gKyAgICAgICBzdHJ1Y3QgZGVsYXllZF93b3JrICAgICAgcHNyX3dvcms7 Cj4+ICsgICAgICAgdW5zaWduZWQgaW50ICAgICAgICAgICAgIHBzcl9zdGF0ZTsKPj4gKwo+PiAg ICAgICAgICBjb25zdCBzdHJ1Y3Qgcm9ja2NoaXBfZHBfY2hpcF9kYXRhICpkYXRhOwo+Pgo+PiAg ICAgICAgICBzdHJ1Y3QgYW5hbG9naXhfZHBfcGxhdF9kYXRhIHBsYXRfZGF0YTsKPj4gICB9Owo+ Pgo+PiArc3RhdGljIGludCBhbmFsb2dpeF9kcF9wc3Jfc2V0KHN0cnVjdCBkcm1fZW5jb2RlciAq ZW5jb2RlciwgYm9vbCBlbmFibGVkKQo+IEFnYWluLCB0aGlzIGZ1bmN0aW9uIGRvZXNuJ3QgZmFp bCwgYnV0IGl0cyByZXR1cm4gdHlwZSBpcyBpbnQuCj4gRm9ydHVuYXRlbHkgeW91IGRvbid0IGNo ZWNrIHRoZSByZXR1cm4gaW4gcm9ja2NoaXBfZHJtX3Bzci5jLCBzbyB0aGlzCj4gYWxzbyBzZWVt cyBsaWtlIGEgZ29vZCB2b2lkIGNhbmRpZGF0ZS4KCk9rYXksIGRvbmUuCgo+PiArewo+PiArICAg ICAgIHN0cnVjdCByb2NrY2hpcF9kcF9kZXZpY2UgKmRwID0gdG9fZHAoZW5jb2Rlcik7Cj4+ICsK Pj4gKyAgICAgICBkZXZfZGJnKGRwLT5kZXYsICIlcyBQU1IuLi5cbiIsIGVuYWJsZWQgPyAiRW50 cnkiIDogIkV4aXQiKTsKPj4gKwo+PiArICAgICAgIGlmIChlbmFibGVkKQo+PiArICAgICAgICAg ICAgICAgZHAtPnBzcl9zdGF0ZSA9IEVEUF9WU0NfUFNSX1NUQVRFX0FDVElWRTsKPj4gKyAgICAg ICBlbHNlCj4+ICsgICAgICAgICAgICAgICBkcC0+cHNyX3N0YXRlID0gfkVEUF9WU0NfUFNSX1NU QVRFX0FDVElWRTsKPj4gKwo+PiArICAgICAgIHNjaGVkdWxlX2RlbGF5ZWRfd29yaygmZHAtPnBz cl93b3JrLCBtc2Vjc190b19qaWZmaWVzKDEwKSk7Cj4gUHVsbCAxMCBvdXQgaW50byBhICNkZWZp bmUKCkRvbmUKCj4+ICsKPj4gKyAgICAgICByZXR1cm4gMDsKPj4gK30KPj4gKwo+PiArc3RhdGlj IHZvaWQgYW5hbG9naXhfZHBfcHNyX3dvcmsoc3RydWN0IHdvcmtfc3RydWN0ICp3b3JrKQo+PiAr ewo+PiArICAgICAgIHN0cnVjdCByb2NrY2hpcF9kcF9kZXZpY2UgKmRwID0KPj4gKyAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICBjb250YWluZXJfb2Yod29yaywgdHlwZW9mKCpkcCksIHBz cl93b3JrLndvcmspOwo+PiArICAgICAgIHN0cnVjdCBkcm1fY3J0YyAqY3J0YyA9IGRwLT5lbmNv ZGVyLmNydGM7Cj4+ICsgICAgICAgaW50IHBzcl9zdGF0ZSA9IGRwLT5wc3Jfc3RhdGU7Cj4+ICsg ICAgICAgaW50IHZhY3RfZW5kOwo+PiArICAgICAgIGludCByZXQ7Cj4+ICsKPj4gKyAgICAgICBp ZiAoIWNydGMpCj4+ICsgICAgICAgICAgICAgICByZXR1cm47Cj4+ICsKPj4gKyAgICAgICB2YWN0 X2VuZCA9IGNydGMtPm1vZGUudnRvdGFsIC0gY3J0Yy0+bW9kZS52c3luY19zdGFydCArIGNydGMt Pm1vZGUudmRpc3BsYXk7Cj4+ICsKPj4gKyAgICAgICByZXQgPSByb2NrY2hpcF9kcm1fd2FpdF9s aW5lX2ZsYWcoZHAtPmVuY29kZXIuY3J0YywgdmFjdF9lbmQsIDEwMCk7Cj4KPiBQdWxsIDEwMCBv dXQgaW50byBhICNkZWZpbmUKPgoKRG9uZS4KCj4+ICsgICAgICAgaWYgKHJldCA9PSAwKSB7Cj4g aWYgKHJldCkgewo+ICAgICAgZGV2X2VyciguLi4gImxpbmUgZmxhZyBpbnRlcnJ1cHQgZGlkIG5v dCBhcnJpdmUiKTsKPiAgICAgIHJldHVybjsKPiB9CgpEb25lLgoKVGhhbmtzCi0gWWFraXIKCj4+ ICsgICAgICAgICAgICAgICBpZiAocHNyX3N0YXRlID09IEVEUF9WU0NfUFNSX1NUQVRFX0FDVElW RSkKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgYW5hbG9naXhfZHBfYWN0aXZlX3BzcihkcC0+ ZGV2KTsKPj4gKyAgICAgICAgICAgICAgIGVsc2UKPj4gKyAgICAgICAgICAgICAgICAgICAgICAg YW5hbG9naXhfZHBfaW5hY3RpdmVfcHNyKGRwLT5kZXYpOwo+PiArICAgICAgIH0KPj4gK30KPj4g Kwo+PiAgIHN0YXRpYyBpbnQgcm9ja2NoaXBfZHBfcHJlX2luaXQoc3RydWN0IHJvY2tjaGlwX2Rw X2RldmljZSAqZHApCj4+ICAgewo+PiAgICAgICAgICByZXNldF9jb250cm9sX2Fzc2VydChkcC0+ cnN0KTsKPj4gQEAgLTM0MCwxMiArMzgzLDIxIEBAIHN0YXRpYyBpbnQgcm9ja2NoaXBfZHBfYmlu ZChzdHJ1Y3QgZGV2aWNlICpkZXYsIHN0cnVjdCBkZXZpY2UgKm1hc3RlciwKPj4gICAgICAgICAg ZHAtPnBsYXRfZGF0YS5wb3dlcl9vZmYgPSByb2NrY2hpcF9kcF9wb3dlcmRvd247Cj4+ICAgICAg ICAgIGRwLT5wbGF0X2RhdGEuZ2V0X21vZGVzID0gcm9ja2NoaXBfZHBfZ2V0X21vZGVzOwo+Pgo+ PiArICAgICAgIGRwLT5wc3Jfc3RhdGUgPSB+RURQX1ZTQ19QU1JfU1RBVEVfQUNUSVZFOwo+PiAr ICAgICAgIElOSVRfREVMQVlFRF9XT1JLKCZkcC0+cHNyX3dvcmssIGFuYWxvZ2l4X2RwX3Bzcl93 b3JrKTsKPj4gKwo+PiArICAgICAgIHJvY2tjaGlwX2RybV9wc3JfcmVnaXN0ZXIoJmRwLT5lbmNv ZGVyLCBhbmFsb2dpeF9kcF9wc3Jfc2V0KTsKPj4gKwo+PiAgICAgICAgICByZXR1cm4gYW5hbG9n aXhfZHBfYmluZChkZXYsIGRwLT5kcm1fZGV2LCAmZHAtPnBsYXRfZGF0YSk7Cj4+ICAgfQo+Pgo+ PiAgIHN0YXRpYyB2b2lkIHJvY2tjaGlwX2RwX3VuYmluZChzdHJ1Y3QgZGV2aWNlICpkZXYsIHN0 cnVjdCBkZXZpY2UgKm1hc3RlciwKPj4gICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICB2 b2lkICpkYXRhKQo+PiAgIHsKPj4gKyAgICAgICBzdHJ1Y3Qgcm9ja2NoaXBfZHBfZGV2aWNlICpk cCA9IGRldl9nZXRfZHJ2ZGF0YShkZXYpOwo+PiArCj4+ICsgICAgICAgcm9ja2NoaXBfZHJtX3Bz cl91bnJlZ2lzdGVyKCZkcC0+ZW5jb2Rlcik7Cj4+ICsKPj4gICAgICAgICAgcmV0dXJuIGFuYWxv Z2l4X2RwX3VuYmluZChkZXYsIG1hc3RlciwgZGF0YSk7Cj4+ICAgfQo+Pgo+PiAtLQo+PiAxLjku MQo+Pgo+Pgo+Cj4KCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5v cmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2 ZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753988AbcGHCci (ORCPT ); Thu, 7 Jul 2016 22:32:38 -0400 Received: from lucky1.263xmail.com ([211.157.147.135]:34469 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753528AbcGHCc2 (ORCPT ); Thu, 7 Jul 2016 22:32:28 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: ykk@rock-chips.com X-FST-TO: linux-rockchip@lists.infradead.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: ykk@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH v3 4/4] drm/rockchip: analogix_dp: implement PSR function To: Sean Paul References: <1467364685-21390-1-git-send-email-ykk@rock-chips.com> <1467364776-21794-1-git-send-email-ykk@rock-chips.com> Cc: Mark Yao , Inki Dae , Jingoo Han , Heiko Stuebner , Daniel Vetter , =?UTF-8?Q?St=c3=a9phane_Marchesin?= , Tomasz Figa , Doug Anderson , Thierry Reding , Krzysztof Kozlowski , Javier Martinez Canillas , David Airlie , Emil Velikov , Linux Kernel Mailing List , dri-devel , linux-samsung-soc , linux-rockchip@lists.infradead.org From: Yakir Yang Message-ID: <577F10A6.6040206@rock-chips.com> Date: Fri, 8 Jul 2016 10:32:06 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Sean, On 07/02/2016 04:05 AM, Sean Paul wrote: > On Fri, Jul 1, 2016 at 5:19 AM, Yakir Yang wrote: >> Alway enable the PSR function for Rockchip analogix_dp driver. If panel >> don't support PSR, then the core analogix_dp would ignore this setting. >> >> Signed-off-by: Yakir Yang >> --- >> Changes in v3: >> - split the common psr logic into a seperate driver, make this to a >> simple sub-psr device driver. >> >> Changes in v2: >> - remove vblank notify out (Daniel) >> - create a psr_active() callback in vop data struct. >> >> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 52 +++++++++++++++++++++++++ >> 1 file changed, 52 insertions(+) >> >> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c >> index e81e19a..80a60a6 100644 >> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c >> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c >> @@ -32,6 +32,7 @@ >> #include >> >> #include "rockchip_drm_drv.h" >> +#include "rockchip_drm_psr.h" >> #include "rockchip_drm_vop.h" >> >> #define RK3288_GRF_SOC_CON6 0x25c >> @@ -68,11 +69,53 @@ struct rockchip_dp_device { >> struct regmap *grf; >> struct reset_control *rst; >> >> + struct delayed_work psr_work; >> + unsigned int psr_state; >> + >> const struct rockchip_dp_chip_data *data; >> >> struct analogix_dp_plat_data plat_data; >> }; >> >> +static int analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled) > Again, this function doesn't fail, but its return type is int. > Fortunately you don't check the return in rockchip_drm_psr.c, so this > also seems like a good void candidate. Okay, done. >> +{ >> + struct rockchip_dp_device *dp = to_dp(encoder); >> + >> + dev_dbg(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit"); >> + >> + if (enabled) >> + dp->psr_state = EDP_VSC_PSR_STATE_ACTIVE; >> + else >> + dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE; >> + >> + schedule_delayed_work(&dp->psr_work, msecs_to_jiffies(10)); > Pull 10 out into a #define Done >> + >> + return 0; >> +} >> + >> +static void analogix_dp_psr_work(struct work_struct *work) >> +{ >> + struct rockchip_dp_device *dp = >> + container_of(work, typeof(*dp), psr_work.work); >> + struct drm_crtc *crtc = dp->encoder.crtc; >> + int psr_state = dp->psr_state; >> + int vact_end; >> + int ret; >> + >> + if (!crtc) >> + return; >> + >> + vact_end = crtc->mode.vtotal - crtc->mode.vsync_start + crtc->mode.vdisplay; >> + >> + ret = rockchip_drm_wait_line_flag(dp->encoder.crtc, vact_end, 100); > > Pull 100 out into a #define > Done. >> + if (ret == 0) { > if (ret) { > dev_err(... "line flag interrupt did not arrive"); > return; > } Done. Thanks - Yakir >> + if (psr_state == EDP_VSC_PSR_STATE_ACTIVE) >> + analogix_dp_active_psr(dp->dev); >> + else >> + analogix_dp_inactive_psr(dp->dev); >> + } >> +} >> + >> static int rockchip_dp_pre_init(struct rockchip_dp_device *dp) >> { >> reset_control_assert(dp->rst); >> @@ -340,12 +383,21 @@ static int rockchip_dp_bind(struct device *dev, struct device *master, >> dp->plat_data.power_off = rockchip_dp_powerdown; >> dp->plat_data.get_modes = rockchip_dp_get_modes; >> >> + dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE; >> + INIT_DELAYED_WORK(&dp->psr_work, analogix_dp_psr_work); >> + >> + rockchip_drm_psr_register(&dp->encoder, analogix_dp_psr_set); >> + >> return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data); >> } >> >> static void rockchip_dp_unbind(struct device *dev, struct device *master, >> void *data) >> { >> + struct rockchip_dp_device *dp = dev_get_drvdata(dev); >> + >> + rockchip_drm_psr_unregister(&dp->encoder); >> + >> return analogix_dp_unbind(dev, master, data); >> } >> >> -- >> 1.9.1 >> >> > >