From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yakir Yang Subject: Re: [PATCH v3 2/4] drm/rockchip: add an common abstracted PSR driver Date: Wed, 13 Jul 2016 11:36:27 +0800 Message-ID: <5785B73B.6000301@rock-chips.com> References: <1467364685-21390-1-git-send-email-ykk@rock-chips.com> <1467364754-21674-1-git-send-email-ykk@rock-chips.com> <20160712123826.GU23520@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20160712123826.GU23520@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Sean Paul , Mark Yao , Inki Dae , Jingoo Han , Heiko Stuebner , =?UTF-8?Q?St=c3=a9phane_Marchesin?= , Tomasz Figa , Doug Anderson , Thierry Reding , Krzysztof Kozlowski , Javier Martinez Canillas , David Airlie , Emil Velikov , Linux Kernel Mailing List , dri-devel , linux-samsung-soc , linux-rockchip@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org RGFuaWVsLAoKT24gMDcvMTIvMjAxNiAwODozOCBQTSwgRGFuaWVsIFZldHRlciB3cm90ZToKPiBP biBGcmksIEp1bCAwMSwgMjAxNiBhdCAwMjowMDowMFBNIC0wNDAwLCBTZWFuIFBhdWwgd3JvdGU6 Cj4+IE9uIEZyaSwgSnVsIDEsIDIwMTYgYXQgNToxOSBBTSwgWWFraXIgWWFuZyA8eWtrQHJvY2st Y2hpcHMuY29tPiB3cm90ZToKPj4+IFRoZSBQU1IgZHJpdmVyIGhhdmUgZXhwb3J0ZWQgZm91ciBz eW1ib2xzIGZvciBzcGVjaWZpYyBkZXZpY2UgZHJpdmVyOgo+Pj4gLSByb2NrY2hpcF9kcm1fcHNy X3JlZ2lzdGVyKCkKPj4+IC0gcm9ja2NoaXBfZHJtX3Bzcl91bnJlZ2lzdGVyKCkKPj4+IC0gcm9j a2NoaXBfZHJtX3Bzcl9lbmFibGUoKQo+Pj4gLSByb2NrY2hpcF9kcm1fcHNyX2Rpc2FibGUoKQo+ Pj4gLSByb2NrY2hpcF9kcm1fcHNyX2ZsdXNoKCkKPj4+Cj4+PiBFbmNvZGVyIGRyaXZlciBzaG91 bGQgY2FsbCB0aGUgcmVnaXN0ZXIvdW5yZWdpc3RlciBpbnRlcmZhY2VzIHRvIGhvb2sKPj4+IGl0 c2VsZiBpbnRvIGNvbW1vbiBQU1IgZHJpdmVyLCBlbmNvZGVyIGhhdmUgaW1wbGVtZW50IHRoZSAn cHNyX3NldCcKPj4+IGNhbGxiYWNrIHdoaWNoIHVzZSB0aGUgc2V0IFBTUiBzdGF0ZSBpbiBoYXJk d2FyZSBzaWRlLgo+Pj4KPj4+IENydGMgZHJpdmVyIHdvdWxkIGNhbGwgdGhlIGVuYWJsZS9kaXNh YmxlIGludGVyZmFjZXMgd2hlbiB2YmxhbmsgaXMKPj4+IGVuYWJsZS9kaXNhYmxlLCBhZnRlciB0 aGF0IHRoZSBjb21tb24gUFNSIGRyaXZlciB3b3VsZCBjYWxsIHRoZSBlbmNvZGVyCj4+PiByZWdp c3RlcmVkIGNhbGxiYWNrIHRvIHNldCB0aGUgUFNSIHN0YXRlLgo+Pj4KPj4gVGhpcyBmZWVscyBv dmVybHkgY29tcGxpY2F0ZWQuIEl0IHNlZW1zIGxpa2UgeW91IGNvdWxkIGN1dCBvdXQgYSBidW5j aAo+PiBvZiBjb2RlIGJ5IGp1c3QgY29kaW5nIHRoZSBwc3IgZnVuY3Rpb25zIGludG8gdm9wIGFu ZAo+PiBhbmFsb2dpeF9kcC1yb2NrY2hpcC4gSSBzdXBwb3NlIHRoZSBvbmx5IHJlYXNvbiB0byBr ZWVwIGl0IGFic3RyYWN0ZWQKPj4gd291bGQgYmUgaWYgeW91IHBsYW4gb24gc3VwcG9ydGluZyBw c3IgaW4gYSBkaWZmZXJlbnQgZW5jb2RlciBvciBjcnRjCj4+IGluIHJvY2tjaGlwLCBvciBpZiB5 b3UncmUgcGxhbm5pbmcgb24gbW92aW5nIHRoaXMgaW50byBkcm0gY29yZS4KPiBBZ3JlZWQgb24g dGhlIGxheWVycyBvZiBpbmRpcmVjdGlvbi4gQWxzbywgeW91IGVuZCB1cCB3aXRoIDMgZGVsYXll ZAo+IHRpbWVycyBpbiB0b3RhbDoKPiAtIGRlZmlvIHRpbWVyIGZyb20gZmJkZXYgZW11bGF0aW9u Cj4gLSB0aW1lciBpbiB0aGlzIGFic3RyYWN0aW9uCj4gLSBkZWxheWVkIHdvcmsgaW4gdGhlIHBz ciBiYWNrZW5kIGRyaXZlcgo+Cj4gSSdkIGN1dCBvdXQgYXQgbGVhc3QgdGhlIG1pZGRsZSBvbmUu Cj4KPiBCdXQgc2luY2UgdGhpcyBzZWVtcyB0byBjb3JyZWN0bHkgdXNlIHRoZSAtPmRpcnR5IGNh bGxiYWNrIGl0IGdldHMgbXkgQWNrCj4gZWl0aGVyIHdheSA7LSkKCkFoYSwgdGhhbmtzIDotRAoK LSBZYWtpcgoKPiBDaGVlcnMsIERhbmllbAo+Cj4+IFBlcmhhcHMgb3RoZXJzIHdpbGwgZGlzYWdy ZWUgd2l0aCB0aGlzIHNlbnRpbWVudCBhbmQgdGhpcyBpcyB0aGUgcmlnaHQKPj4gdGhpbmcgdG8g ZG8uCj4+Cj4+PiBGYiBkcml2ZXIgd291bGQgY2FsbCB0aGUgZmx1c2ggaW50ZXJmYWNlIGluICdm Yi0+ZGlydHknIGNhbGxiYWNrLCB0aGlzCj4+PiBoZWxwZXIgZnVuY3Rpb24gd291bGQgZm9yY2Ug YWxsIFBTUiBlbmFibGVkIGVuY29kZXJzIHRvIGV4aXQgZnJvbSBQU1IKPj4+IGZvciAzIHNlY29u ZHMuCj4+Pgo+Pj4gU2lnbmVkLW9mZi1ieTogWWFraXIgWWFuZyA8eWtrQHJvY2stY2hpcHMuY29t Pgo+Pj4gLS0tCj4+PiBDaGFuZ2VzIGluIHYzOgo+Pj4gLSBzcGxpdCB0aGUgcHNyIGZsb3cgaW50 byBhbiBjb21tb24gYWJzdHJhY3RlZCBQU1IgZHJpdmVyCj4+PiAtIGltcGxlbWVudCB0aGUgJ2Zi LT5kaXJ0eScgY2FsbGJhY2sgZnVuY3Rpb24gKERhbmllbCkKPj4+IC0gYXZvaWQgdG8gdXNlIG5v dGlmeSB0byBhY3FpdXJlIGZvciB2YWN0IGV2ZW50IChEYW5pZWwpCj4+PiAtIHJlbW92ZSBwc3Jf YWN0aXZlKCkgY2FsbGJhY2sgd2hpY2ggaW50cm9kdWNlIGluIHYyCj4+Pgo+Pj4gQ2hhbmdlcyBp biB2MjogTm9uZQo+Pj4KPj4+ICAgZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL01ha2VmaWxlICAg ICAgICAgICB8ICAgMiArLQo+Pj4gICBkcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBf ZHJtX2ZiLmMgIHwgIDEyICsrCj4+PiAgIGRyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9yb2NrY2hp cF9kcm1fcHNyLmMgfCAyMDAgKysrKysrKysrKysrKysrKysrKysrKysrKysrKwo+Pj4gICBkcml2 ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBfZHJtX3Bzci5oIHwgIDEyICsrCj4+PiAgIGRy aXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fdm9wLmMgfCAgMjQgKysrKwo+Pj4g ICA1IGZpbGVzIGNoYW5nZWQsIDI0OSBpbnNlcnRpb25zKCspLCAxIGRlbGV0aW9uKC0pCj4+PiAg IGNyZWF0ZSBtb2RlIDEwMDY0NCBkcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBfZHJt X3Bzci5jCj4+PiAgIGNyZWF0ZSBtb2RlIDEwMDY0NCBkcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAv cm9ja2NoaXBfZHJtX3Bzci5oCj4+Pgo+Pj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9y b2NrY2hpcC9NYWtlZmlsZSBiL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9NYWtlZmlsZQo+Pj4g aW5kZXggMDVkMDcxMy4uOTc0NjM2NSAxMDA2NDQKPj4+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9y b2NrY2hpcC9NYWtlZmlsZQo+Pj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL01ha2Vm aWxlCj4+PiBAQCAtMyw3ICszLDcgQEAKPj4+ICAgIyBEaXJlY3QgUmVuZGVyaW5nIEluZnJhc3Ry dWN0dXJlIChEUkkpIGluIFhGcmVlODYgNC4xLjAgYW5kIGhpZ2hlci4KPj4+Cj4+PiAgIHJvY2tj aGlwZHJtLXkgOj0gcm9ja2NoaXBfZHJtX2Rydi5vIHJvY2tjaGlwX2RybV9mYi5vIFwKPj4+IC0g ICAgICAgICAgICAgICByb2NrY2hpcF9kcm1fZ2VtLm8gcm9ja2NoaXBfZHJtX3ZvcC5vCj4+PiAr ICAgICAgICAgICAgICAgcm9ja2NoaXBfZHJtX2dlbS5vIHJvY2tjaGlwX2RybV9wc3IubyByb2Nr Y2hpcF9kcm1fdm9wLm8KPj4+ICAgcm9ja2NoaXBkcm0tJChDT05GSUdfRFJNX0ZCREVWX0VNVUxB VElPTikgKz0gcm9ja2NoaXBfZHJtX2ZiZGV2Lm8KPj4+Cj4+PiAgIG9iai0kKENPTkZJR19ST0NL Q0hJUF9BTkFMT0dJWF9EUCkgKz0gYW5hbG9naXhfZHAtcm9ja2NoaXAubwo+Pj4gZGlmZiAtLWdp dCBhL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fZmIuYyBiL2RyaXZlcnMv Z3B1L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fZmIuYwo+Pj4gaW5kZXggMjBmMTJiYy4uMGZl YzE4ZiAxMDA2NDQKPj4+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9k cm1fZmIuYwo+Pj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV9m Yi5jCj4+PiBAQCAtMjEsNiArMjEsNyBAQAo+Pj4KPj4+ICAgI2luY2x1ZGUgInJvY2tjaGlwX2Ry bV9kcnYuaCIKPj4+ICAgI2luY2x1ZGUgInJvY2tjaGlwX2RybV9nZW0uaCIKPj4+ICsjaW5jbHVk ZSAicm9ja2NoaXBfZHJtX3Bzci5oIgo+Pj4KPj4+ICAgI2RlZmluZSB0b19yb2NrY2hpcF9mYih4 KSBjb250YWluZXJfb2YoeCwgc3RydWN0IHJvY2tjaGlwX2RybV9mYiwgZmIpCj4+Pgo+Pj4gQEAg LTY2LDkgKzY3LDIwIEBAIHN0YXRpYyBpbnQgcm9ja2NoaXBfZHJtX2ZiX2NyZWF0ZV9oYW5kbGUo c3RydWN0IGRybV9mcmFtZWJ1ZmZlciAqZmIsCj4+PiAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgIHJvY2tjaGlwX2ZiLT5vYmpbMF0sIGhhbmRsZSk7Cj4+PiAgIH0KPj4+Cj4+ PiArc3RhdGljIGludCByb2NrY2hpcF9kcm1fZmJfZGlydHkoc3RydWN0IGRybV9mcmFtZWJ1ZmZl ciAqZmIsCj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBzdHJ1Y3QgZHJtX2Zp bGUgKmZpbGUsCj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICB1bnNpZ25lZCBp bnQgZmxhZ3MsIHVuc2lnbmVkIGludCBjb2xvciwKPj4+ICsgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgIHN0cnVjdCBkcm1fY2xpcF9yZWN0ICpjbGlwcywKPj4+ICsgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgIHVuc2lnbmVkIGludCBudW1fY2xpcHMpCj4+PiArewo+Pj4gKyAg ICAgICByb2NrY2hpcF9kcm1fcHNyX2ZsdXNoKCk7Cj4+PiArICAgICAgIHJldHVybiAwOwo+Pj4g K30KPj4+ICsKPj4+ICAgc3RhdGljIGNvbnN0IHN0cnVjdCBkcm1fZnJhbWVidWZmZXJfZnVuY3Mg cm9ja2NoaXBfZHJtX2ZiX2Z1bmNzID0gewo+Pj4gICAgICAgICAgLmRlc3Ryb3kgICAgICAgID0g cm9ja2NoaXBfZHJtX2ZiX2Rlc3Ryb3ksCj4+PiAgICAgICAgICAuY3JlYXRlX2hhbmRsZSAgPSBy b2NrY2hpcF9kcm1fZmJfY3JlYXRlX2hhbmRsZSwKPj4+ICsgICAgICAgLmRpcnR5ICAgICAgICAg ID0gcm9ja2NoaXBfZHJtX2ZiX2RpcnR5LAo+Pj4gICB9Owo+Pj4KPj4+ICAgc3RhdGljIHN0cnVj dCByb2NrY2hpcF9kcm1fZmIgKgo+Pj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9yb2Nr Y2hpcC9yb2NrY2hpcF9kcm1fcHNyLmMgYi9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2No aXBfZHJtX3Bzci5jCj4+PiBuZXcgZmlsZSBtb2RlIDEwMDY0NAo+Pj4gaW5kZXggMDAwMDAwMC4u YzA0NDQ0Mwo+Pj4gLS0tIC9kZXYvbnVsbAo+Pj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tj aGlwL3JvY2tjaGlwX2RybV9wc3IuYwo+Pj4gQEAgLTAsMCArMSwyMDAgQEAKPj4+ICsjaW5jbHVk ZSA8ZHJtL2RybV9jcnRjX2hlbHBlci5oPgo+Pj4gKwo+Pj4gKyNpbmNsdWRlICJyb2NrY2hpcF9k cm1fcHNyLmgiCj4+PiArCj4+PiArI2RlZmluZSBQU1JfRkxVU0hfVElNRU9VVCAgICAgIG1zZWNz X3RvX2ppZmZpZXMoMzAwMCkgLyogMyBzZWNvbmRzICovCj4+PiArCj4+PiArc3RhdGljIExJU1Rf SEVBRChwc3JfbGlzdCk7Cj4+PiArc3RhdGljIERFRklORV9NVVRFWChwc3JfbGlzdF9tdXRleCk7 Cj4+IEknbSBub3QgY3JhenkgYWJvdXQgdGhlc2UgZ2xvYmFscy4gUGVyaGFwcyB5b3UgY2FuIGlu aXRpYWxpemUgdGhlbQo+PiB3aXRoIHRoZSByb2NrY2hpcCBkcml2ZXIgYW5kIHR1Y2sgdGhlbSBp biBhIGRyaXZlci1sZXZlbCBzdHJ1Y3QKPj4gKHJvY2tjaGlwX2RybV9wcml2YXRlIG9yIHNvbWV0 aGluZykuCj4+Cj4+Cj4+PiArCj4+PiArZW51bSBwc3Jfc3RhdGUgewo+Pj4gKyAgICAgICBQU1Jf RkxVU0gsCj4+PiArICAgICAgIFBTUl9FTkFCTEUsCj4+PiArICAgICAgIFBTUl9ESVNBQkxFLAo+ Pj4gK307Cj4+PiArCj4+PiArc3RydWN0IHBzcl9kcnYgewo+Pj4gKyAgICAgICBzdHJ1Y3QgbGlz dF9oZWFkIGxpc3Q7Cj4+PiArICAgICAgIGVudW0gcHNyX3N0YXRlIHN0YXRlOwo+Pj4gKyAgICAg ICBzdHJ1Y3QgbXV0ZXggc3RhdGVfbXV0ZXg7Cj4+PiArCj4+PiArICAgICAgIHN0cnVjdCB0aW1l cl9saXN0IGZsdXNoX3RpbWVyOwo+Pj4gKwo+Pj4gKyAgICAgICBzdHJ1Y3QgZHJtX2VuY29kZXIg KmVuY29kZXI7Cj4+PiArICAgICAgIGludCAoKnNldCkoc3RydWN0IGRybV9lbmNvZGVyICplbmNv ZGVyLCBib29sIGVuYWJsZSk7Cj4+PiArfTsKPj4+ICsKPj4+ICtzdGF0aWMgc3RydWN0IHBzcl9k cnYgKmZpbmRfcHNyX2J5X2NydGMoc3RydWN0IGRybV9jcnRjICpjcnRjKQo+Pj4gK3sKPj4+ICsg ICAgICAgc3RydWN0IHBzcl9kcnYgKnBzcjsKPj4+ICsKPj4+ICsgICAgICAgbXV0ZXhfbG9jaygm cHNyX2xpc3RfbXV0ZXgpOwo+Pj4gKyAgICAgICBsaXN0X2Zvcl9lYWNoX2VudHJ5KHBzciwgJnBz cl9saXN0LCBsaXN0KSB7Cj4+PiArICAgICAgICAgICAgICAgaWYgKHBzci0+ZW5jb2Rlci0+Y3J0 YyA9PSBjcnRjKSB7Cj4+PiArICAgICAgICAgICAgICAgICAgICAgICBtdXRleF91bmxvY2soJnBz cl9saXN0X211dGV4KTsKPj4+ICsgICAgICAgICAgICAgICAgICAgICAgIHJldHVybiBwc3I7Cj4+ PiArICAgICAgICAgICAgICAgfQo+Pj4gKyAgICAgICB9Cj4+PiArICAgICAgIG11dGV4X3VubG9j aygmcHNyX2xpc3RfbXV0ZXgpOwo+Pj4gKwo+Pj4gKyAgICAgICByZXR1cm4gRVJSX1BUUigtRU5P REVWKTsKPj4+ICt9Cj4+PiArCj4+PiArc3RhdGljIHZvaWQgcHNyX2VuYWJsZShzdHJ1Y3QgcHNy X2RydiAqcHNyKQo+Pj4gK3sKPj4+ICsgICAgICAgaWYgKHBzci0+c3RhdGUgPT0gUFNSX0VOQUJM RSkKPj4+ICsgICAgICAgICAgICAgICByZXR1cm47Cj4+IFNob3VsZCB5b3UgYmUgd29ycmllZCBh Ym91dCByYWNlcyBieSBhY2Nlc3NpbmcgdGhpcyBvdXRzaWRlIG9mIHRoZSBzdGF0ZSBtdXRleD8K Pj4KPj4+ICsKPj4+ICsgICAgICAgbXV0ZXhfbG9jaygmcHNyLT5zdGF0ZV9tdXRleCk7Cj4+PiAr ICAgICAgIHBzci0+c3RhdGUgPSBQU1JfRU5BQkxFOwo+Pj4gKyAgICAgICBwc3ItPnNldChwc3It PmVuY29kZXIsIHRydWUpOwo+Pj4gKyAgICAgICBtdXRleF91bmxvY2soJnBzci0+c3RhdGVfbXV0 ZXgpOwo+Pj4gK30KPj4+ICsKPj4+ICtzdGF0aWMgdm9pZCBwc3JfZGlzYWJsZShzdHJ1Y3QgcHNy X2RydiAqcHNyKQo+Pj4gK3sKPj4+ICsgICAgICAgaWYgKHBzci0+c3RhdGUgPT0gUFNSX0RJU0FC TEUpCj4+PiArICAgICAgICAgICAgICAgcmV0dXJuOwo+Pj4gKwo+Pj4gKyAgICAgICBtdXRleF9s b2NrKCZwc3ItPnN0YXRlX211dGV4KTsKPj4+ICsgICAgICAgcHNyLT5zdGF0ZSA9IFBTUl9ESVNB QkxFOwo+Pj4gKyAgICAgICBwc3ItPnNldChwc3ItPmVuY29kZXIsIGZhbHNlKTsKPj4+ICsgICAg ICAgbXV0ZXhfdW5sb2NrKCZwc3ItPnN0YXRlX211dGV4KTsKPj4+ICt9Cj4+PiArCj4+PiArc3Rh dGljIHZvaWQgcHNyX2ZsdXNoX2hhbmRsZXIodW5zaWduZWQgbG9uZyBkYXRhKQo+Pj4gK3sKPj4+ ICsgICAgICAgc3RydWN0IHBzcl9kcnYgKnBzciA9IChzdHJ1Y3QgcHNyX2RydiAqKWRhdGE7Cj4+ PiArCj4+PiArICAgICAgIGlmICghcHNyIHx8IHBzci0+c3RhdGUgIT0gUFNSX0ZMVVNIKQo+Pj4g KyAgICAgICAgICAgICAgIHJldHVybjsKPj4+ICsKPj4+ICsgICAgICAgcHNyX2VuYWJsZShwc3Ip Owo+Pj4gK30KPj4+ICsKPj4+ICsvKioKPj4+ICsgKiByb2NrY2hpcF9kcm1fcHNyX2VuYWJsZSAt IGVuYWJsZSB0aGUgZW5jb2RlciBQU1Igd2hpY2ggYmluZCB0byBnaXZlbiBDUlRDCj4+PiArICog QGNydGM6IENSVEMgdG8gb2J0YWluIHRoZSBQU1IgZW5jb2Rlcgo+Pj4gKyAqCj4+PiArICogUmV0 dXJuczoKPj4+ICsgKiBaZXJvIG9uIHN1Y2Nlc3MsIG5lZ2F0aXZlIGVycm5vIG9uIGZhaWx1cmUu Cj4+PiArICovCj4+PiAraW50IHJvY2tjaGlwX2RybV9wc3JfZW5hYmxlKHN0cnVjdCBkcm1fY3J0 YyAqY3J0YykKPj4+ICt7Cj4+PiArICAgICAgIHN0cnVjdCBwc3JfZHJ2ICpwc3IgPSBmaW5kX3Bz cl9ieV9jcnRjKGNydGMpOwo+Pj4gKwo+Pj4gKyAgICAgICBpZiAoSVNfRVJSKHBzcikpCj4+PiAr ICAgICAgICAgICAgICAgcmV0dXJuIFBUUl9FUlIocHNyKTsKPj4+ICsKPj4+ICsgICAgICAgcHNy X2VuYWJsZShwc3IpOwo+Pj4gKyAgICAgICByZXR1cm4gMDsKPj4+ICt9Cj4+PiArRVhQT1JUX1NZ TUJPTChyb2NrY2hpcF9kcm1fcHNyX2VuYWJsZSk7Cj4+PiArCj4+PiArLyoqCj4+PiArICogcm9j a2NoaXBfZHJtX3Bzcl9kaXNhYmxlIC0gZGlzYWJsZSB0aGUgZW5jb2RlciBQU1Igd2hpY2ggYmlu ZCB0byBnaXZlbiBDUlRDCj4+PiArICogQGNydGM6IENSVEMgdG8gb2J0YWluIHRoZSBQU1IgZW5j b2Rlcgo+Pj4gKyAqCj4+PiArICogUmV0dXJuczoKPj4+ICsgKiBaZXJvIG9uIHN1Y2Nlc3MsIG5l Z2F0aXZlIGVycm5vIG9uIGZhaWx1cmUuCj4+PiArICovCj4+PiAraW50IHJvY2tjaGlwX2RybV9w c3JfZGlzYWJsZShzdHJ1Y3QgZHJtX2NydGMgKmNydGMpCj4+PiArewo+Pj4gKyAgICAgICBzdHJ1 Y3QgcHNyX2RydiAqcHNyID0gZmluZF9wc3JfYnlfY3J0YyhjcnRjKTsKPj4+ICsKPj4+ICsgICAg ICAgaWYgKElTX0VSUihwc3IpKQo+Pj4gKyAgICAgICAgICAgICAgIHJldHVybiBQVFJfRVJSKHBz cik7Cj4+PiArCj4+PiArICAgICAgIHBzcl9kaXNhYmxlKHBzcik7Cj4+PiArICAgICAgIHJldHVy biAwOwo+Pj4gK30KPj4+ICtFWFBPUlRfU1lNQk9MKHJvY2tjaGlwX2RybV9wc3JfZGlzYWJsZSk7 Cj4+PiArCj4+PiArLyoqCj4+PiArICogcm9ja2NoaXBfZHJtX3Bzcl9mbHVzaCAtIGZvcmNlIHRv IGZsdXNoIGFsbCByZWdpc3RlcmVkIFBTUiBlbmNvZGVycwo+Pj4gKyAqCj4+PiArICogRGlzYWJs ZSB0aGUgUFNSIGZ1bmN0aW9uIGZvciBhbGwgcmVnaXN0ZXJlZCBlbmNvZGVycywgYW5kIHRoZW4g ZW5hYmxlIHRoZQo+Pj4gKyAqIFBTUiBmdW5jdGlvbiBiYWNrIGFmdGVyIDUgc2Vjb25kLiBJZiBl bmNvZGVyIFBTUiBzdGF0ZSBoYXZlIGJlZW4gY2hhbmdlZAo+PiBzLzUgc2Vjb25kL1BTUl9GTFVT SF9USU1FT1VULwo+Pgo+Pj4gKyAqIGR1cmluZyBmbHVzaCB0aW1lLCB0aGVuIGtlZXAgdGhlIHN0 YXRlIG5vIGNoYW5nZSBhZnRlciBmbHVzaCB0aW1lb3V0Lgo+Pj4gKyAqCj4+PiArICogUmV0dXJu czoKPj4+ICsgKiBaZXJvIG9uIHN1Y2Nlc3MsIG5lZ2F0aXZlIGVycm5vIG9uIGZhaWx1cmUuCj4+ PiArICovCj4+PiArdm9pZCByb2NrY2hpcF9kcm1fcHNyX2ZsdXNoKHZvaWQpCj4+PiArewo+Pj4g KyAgICAgICBzdHJ1Y3QgcHNyX2RydiAqcHNyOwo+Pj4gKwo+Pj4gKyAgICAgICBtdXRleF9sb2Nr KCZwc3JfbGlzdF9tdXRleCk7Cj4+PiArICAgICAgIGxpc3RfZm9yX2VhY2hfZW50cnkocHNyLCAm cHNyX2xpc3QsIGxpc3QpIHsKPj4+ICsgICAgICAgICAgICAgICBpZiAocHNyLT5zdGF0ZSA9PSBQ U1JfRElTQUJMRSkKPj4+ICsgICAgICAgICAgICAgICAgICAgICAgIGNvbnRpbnVlOwo+Pj4gKwo+ Pj4gKyAgICAgICAgICAgICAgIG1vZF90aW1lcigmcHNyLT5mbHVzaF90aW1lciwKPj4+ICsgICAg ICAgICAgICAgICAgICAgICAgICAgcm91bmRfamlmZmllc191cChqaWZmaWVzICsgUFNSX0ZMVVNI X1RJTUVPVVQpKTsKPj4+ICsKPj4+ICsgICAgICAgICAgICAgICBwc3JfZGlzYWJsZShwc3IpOwo+ Pj4gKyAgICAgICAgICAgICAgIHBzci0+c3RhdGUgPSBQU1JfRkxVU0g7Cj4+IFRoaXMgaXMgc2V0 IG91dHNpZGUgb2Ygc3RhdGVfbXV0ZXgsIGlzIHRoYXQgaW50ZW50aW9uYWw/Cj4+Cj4+PiArICAg ICAgIH0KPj4+ICsgICAgICAgbXV0ZXhfdW5sb2NrKCZwc3JfbGlzdF9tdXRleCk7Cj4+PiArfQo+ Pj4gK0VYUE9SVF9TWU1CT0wocm9ja2NoaXBfZHJtX3Bzcl9mbHVzaCk7Cj4+PiArCj4+PiArLyoq Cj4+PiArICogcm9ja2NoaXBfZHJtX3Bzcl9yZWdpc3RlciAtIHJlZ2lzdGVyIGVuY29kZXIgdG8g cHNyIGRyaXZlcgo+Pj4gKyAqIEBlbmNvZGVyOiBlbmNvZGVyIHRoYXQgb2J0YWluIHRoZSBQU1Ig ZnVuY3Rpb24KPj4+ICsgKiBAcHNyX3NldDogY2FsbCBiYWNrIHRvIHNldCBQU1Igc3RhdGUKPj4+ ICsgKgo+Pj4gKyAqIFJldHVybnM6Cj4+PiArICogWmVybyBvbiBzdWNjZXNzLCBuZWdhdGl2ZSBl cnJubyBvbiBmYWlsdXJlLgo+Pj4gKyAqLwo+Pj4gK2ludCByb2NrY2hpcF9kcm1fcHNyX3JlZ2lz dGVyKHN0cnVjdCBkcm1fZW5jb2RlciAqZW5jb2RlciwKPj4+ICsgICAgICAgICAgICAgICAgICAg ICAgICAgICAgIGludCAoKnBzcl9zZXQpKHN0cnVjdCBkcm1fZW5jb2RlciAqLCBib29sIGVuYWJs ZSkpCj4+PiArewo+Pj4gKyAgICAgICBzdHJ1Y3QgcHNyX2RydiAqcHNyOwo+Pj4gKwo+Pj4gKyAg ICAgICBpZiAoIWVuY29kZXIgfHwgIXBzcl9zZXQpCj4+PiArICAgICAgICAgICAgICAgcmV0dXJu IC1FSU5WQUw7Cj4+PiArCj4+PiArICAgICAgIHBzciA9IGt6YWxsb2Moc2l6ZW9mKHN0cnVjdCBw c3JfZHJ2KSwgR0ZQX0tFUk5FTCk7Cj4+PiArICAgICAgIGlmICghcHNyKQo+Pj4gKyAgICAgICAg ICAgICAgIHJldHVybiAtRU5PTUVNOwo+Pj4gKwo+Pj4gKyAgICAgICBzZXR1cF90aW1lcigmcHNy LT5mbHVzaF90aW1lciwgcHNyX2ZsdXNoX2hhbmRsZXIsICh1bnNpZ25lZCBsb25nKXBzcik7Cj4+ PiArCj4+PiArICAgICAgIG11dGV4X2luaXQoJnBzci0+c3RhdGVfbXV0ZXgpOwo+Pj4gKwo+Pj4g KyAgICAgICBwc3ItPnN0YXRlID0gUFNSX0RJU0FCTEU7Cj4+PiArICAgICAgIHBzci0+ZW5jb2Rl ciA9IGVuY29kZXI7Cj4+PiArICAgICAgIHBzci0+c2V0ID0gcHNyX3NldDsKPj4+ICsKPj4+ICsg ICAgICAgbXV0ZXhfbG9jaygmcHNyX2xpc3RfbXV0ZXgpOwo+Pj4gKyAgICAgICBsaXN0X2FkZF90 YWlsKCZwc3ItPmxpc3QsICZwc3JfbGlzdCk7Cj4+PiArICAgICAgIG11dGV4X3VubG9jaygmcHNy X2xpc3RfbXV0ZXgpOwo+Pj4gKwo+Pj4gKyAgICAgICByZXR1cm4gMDsKPj4+ICt9Cj4+PiArRVhQ T1JUX1NZTUJPTChyb2NrY2hpcF9kcm1fcHNyX3JlZ2lzdGVyKTsKPj4+ICsKPj4+ICsvKioKPj4+ ICsgKiByb2NrY2hpcF9kcm1fcHNyX3VucmVnaXN0ZXIgLSB1bnJlZ2lzdGVyIGVuY29kZXIgdG8g cHNyIGRyaXZlcgo+Pj4gKyAqIEBlbmNvZGVyOiBlbmNvZGVyIHRoYXQgb2J0YWluIHRoZSBQU1Ig ZnVuY3Rpb24KPj4+ICsgKiBAcHNyX3NldDogY2FsbCBiYWNrIHRvIHNldCBQU1Igc3RhdGUKPj4+ ICsgKgo+Pj4gKyAqIFJldHVybnM6Cj4+PiArICogWmVybyBvbiBzdWNjZXNzLCBuZWdhdGl2ZSBl cnJubyBvbiBmYWlsdXJlLgo+Pj4gKyAqLwo+Pj4gK3ZvaWQgcm9ja2NoaXBfZHJtX3Bzcl91bnJl Z2lzdGVyKHN0cnVjdCBkcm1fZW5jb2RlciAqZW5jb2RlcikKPj4+ICt7Cj4+PiArICAgICAgIHN0 cnVjdCBwc3JfZHJ2ICpwc3I7Cj4+PiArCj4+PiArICAgICAgIG11dGV4X2xvY2soJnBzcl9saXN0 X211dGV4KTsKPj4+ICsgICAgICAgbGlzdF9mb3JfZWFjaF9lbnRyeShwc3IsICZwc3JfbGlzdCwg bGlzdCkgewo+Pj4gKyAgICAgICAgICAgICAgIGlmIChwc3ItPmVuY29kZXIgPT0gZW5jb2Rlcikg ewo+Pj4gKyAgICAgICAgICAgICAgICAgICAgICAgZGVsX3RpbWVyKCZwc3ItPmZsdXNoX3RpbWVy KTsKPj4+ICsgICAgICAgICAgICAgICAgICAgICAgIGxpc3RfZGVsKCZwc3ItPmxpc3QpOwo+Pj4g KyAgICAgICAgICAgICAgICAgICAgICAga2ZyZWUocHNyKTsKPj4+ICsgICAgICAgICAgICAgICB9 Cj4+PiArICAgICAgIH0KPj4+ICsgICAgICAgbXV0ZXhfdW5sb2NrKCZwc3JfbGlzdF9tdXRleCk7 Cj4+PiArfQo+Pj4gK0VYUE9SVF9TWU1CT0wocm9ja2NoaXBfZHJtX3Bzcl91bnJlZ2lzdGVyKTsK Pj4+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBfZHJtX3Bz ci5oIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV9wc3IuaAo+Pj4gbmV3 IGZpbGUgbW9kZSAxMDA2NDQKPj4+IGluZGV4IDAwMDAwMDAuLjYyMmY2MDUKPj4+IC0tLSAvZGV2 L251bGwKPj4+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fcHNy LmgKPj4+IEBAIC0wLDAgKzEsMTIgQEAKPj4+ICsjaWZuZGVmIF9fUk9DS0NISVBfRFJNX1BTUl9f Xwo+Pj4gKyNkZWZpbmUgX19ST0NLQ0hJUF9EUk1fUFNSX19fCj4+PiArCj4+PiArdm9pZCByb2Nr Y2hpcF9kcm1fcHNyX2ZsdXNoKHZvaWQpOwo+Pj4gK2ludCByb2NrY2hpcF9kcm1fcHNyX2VuYWJs ZShzdHJ1Y3QgZHJtX2NydGMgKmNydGMpOwo+Pj4gK2ludCByb2NrY2hpcF9kcm1fcHNyX2Rpc2Fi bGUoc3RydWN0IGRybV9jcnRjICpjcnRjKTsKPj4+ICsKPj4+ICtpbnQgcm9ja2NoaXBfZHJtX3Bz cl9yZWdpc3RlcihzdHJ1Y3QgZHJtX2VuY29kZXIgKmVuY29kZXIsCj4+PiArICAgICAgICAgICAg ICAgICAgICAgICAgICAgaW50ICgqcHNyX3NldCkoc3RydWN0IGRybV9lbmNvZGVyICosIGJvb2wg ZW5hYmxlKSk7Cj4+PiArdm9pZCByb2NrY2hpcF9kcm1fcHNyX3VucmVnaXN0ZXIoc3RydWN0IGRy bV9lbmNvZGVyICplbmNvZGVyKTsKPj4+ICsKPj4+ICsjZW5kaWYgLyogX19ST0NLQ0hJUF9EUk1f UFNSX18gKi8KPj4+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2No aXBfZHJtX3ZvcC5jIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV92b3Au Ywo+Pj4gaW5kZXggY2QzY2FjNS4uM2M2ZGZjNSAxMDA2NDQKPj4+IC0tLSBhL2RyaXZlcnMvZ3B1 L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fdm9wLmMKPj4+ICsrKyBiL2RyaXZlcnMvZ3B1L2Ry bS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fdm9wLmMKPj4+IEBAIC0zNCw2ICszNCw3IEBACj4+PiAg ICNpbmNsdWRlICJyb2NrY2hpcF9kcm1fZHJ2LmgiCj4+PiAgICNpbmNsdWRlICJyb2NrY2hpcF9k cm1fZ2VtLmgiCj4+PiAgICNpbmNsdWRlICJyb2NrY2hpcF9kcm1fZmIuaCIKPj4+ICsjaW5jbHVk ZSAicm9ja2NoaXBfZHJtX3Bzci5oIgo+Pj4gICAjaW5jbHVkZSAicm9ja2NoaXBfZHJtX3ZvcC5o Igo+Pj4KPj4+ICAgI2RlZmluZSBfX1JFR19TRVRfUkVMQVhFRCh4LCBvZmYsIG1hc2ssIHNoaWZ0 LCB2LCB3cml0ZV9tYXNrKSBcCj4+PiBAQCAtMTIxLDYgKzEyMiw5IEBAIHN0cnVjdCB2b3Agewo+ Pj4gICAgICAgICAgLyogcHJvdGVjdGVkIGJ5IGRldi0+ZXZlbnRfbG9jayAqLwo+Pj4gICAgICAg ICAgc3RydWN0IGRybV9wZW5kaW5nX3ZibGFua19ldmVudCAqZXZlbnQ7Cj4+Pgo+Pj4gKyAgICAg ICBib29sIHBzcl9lbmFibGVkOwo+Pj4gKyAgICAgICBzdHJ1Y3QgZGVsYXllZF93b3JrIHBzcl93 b3JrOwo+Pj4gKwo+Pj4gICAgICAgICAgc3RydWN0IGNvbXBsZXRpb24gbGluZV9mbGFnX2NvbXBs ZXRpb247Cj4+Pgo+Pj4gICAgICAgICAgY29uc3Qgc3RydWN0IHZvcF9kYXRhICpkYXRhOwo+Pj4g QEAgLTkxMSw2ICs5MTUsMTYgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBkcm1fcGxhbmVfZnVuY3Mg dm9wX3BsYW5lX2Z1bmNzID0gewo+Pj4gICAgICAgICAgLmF0b21pY19kZXN0cm95X3N0YXRlID0g dm9wX2F0b21pY19wbGFuZV9kZXN0cm95X3N0YXRlLAo+Pj4gICB9Owo+Pj4KPj4+ICtzdGF0aWMg dm9pZCB2b3BfcHNyX3dvcmsoc3RydWN0IHdvcmtfc3RydWN0ICp3b3JrKQo+Pj4gK3sKPj4+ICsg ICAgICAgc3RydWN0IHZvcCAqdm9wID0gY29udGFpbmVyX29mKHdvcmssIHR5cGVvZigqdm9wKSwg cHNyX3dvcmsud29yayk7Cj4+PiArCj4+PiArICAgICAgIGlmICh2b3AtPnBzcl9lbmFibGVkKQo+ Pj4gKyAgICAgICAgICAgICAgIHJvY2tjaGlwX2RybV9wc3JfZW5hYmxlKCZ2b3AtPmNydGMpOwo+ Pj4gKyAgICAgICBlbHNlCj4+PiArICAgICAgICAgICAgICAgcm9ja2NoaXBfZHJtX3Bzcl9kaXNh YmxlKCZ2b3AtPmNydGMpOwo+Pj4gK30KPj4+ICsKPj4+ICAgc3RhdGljIGludCB2b3BfY3J0Y19l bmFibGVfdmJsYW5rKHN0cnVjdCBkcm1fY3J0YyAqY3J0YykKPj4+ICAgewo+Pj4gICAgICAgICAg c3RydWN0IHZvcCAqdm9wID0gdG9fdm9wKGNydGMpOwo+Pj4gQEAgLTkyNSw2ICs5MzksOSBAQCBz dGF0aWMgaW50IHZvcF9jcnRjX2VuYWJsZV92Ymxhbmsoc3RydWN0IGRybV9jcnRjICpjcnRjKQo+ Pj4KPj4+ICAgICAgICAgIHNwaW5fdW5sb2NrX2lycXJlc3RvcmUoJnZvcC0+aXJxX2xvY2ssIGZs YWdzKTsKPj4+Cj4+PiArICAgICAgIHZvcC0+cHNyX2VuYWJsZWQgPSBmYWxzZTsKPj4+ICsgICAg ICAgc2NoZWR1bGVfZGVsYXllZF93b3JrKCZ2b3AtPnBzcl93b3JrLCBtc2Vjc190b19qaWZmaWVz KDEwKSk7Cj4+PiArCj4+PiAgICAgICAgICByZXR1cm4gMDsKPj4+ICAgfQo+Pj4KPj4+IEBAIC05 NDEsNiArOTU4LDkgQEAgc3RhdGljIHZvaWQgdm9wX2NydGNfZGlzYWJsZV92Ymxhbmsoc3RydWN0 IGRybV9jcnRjICpjcnRjKQo+Pj4gICAgICAgICAgVk9QX0lOVFJfU0VUX1RZUEUodm9wLCBlbmFi bGUsIEZTX0lOVFIsIDApOwo+Pj4KPj4+ICAgICAgICAgIHNwaW5fdW5sb2NrX2lycXJlc3RvcmUo JnZvcC0+aXJxX2xvY2ssIGZsYWdzKTsKPj4+ICsKPj4+ICsgICAgICAgdm9wLT5wc3JfZW5hYmxl ZCA9IHRydWU7Cj4+PiArICAgICAgIHNjaGVkdWxlX2RlbGF5ZWRfd29yaygmdm9wLT5wc3Jfd29y aywgbXNlY3NfdG9famlmZmllcygxMCkpOwo+Pj4gICB9Cj4+Pgo+Pj4gICBzdGF0aWMgdm9pZCB2 b3BfY3J0Y193YWl0X2Zvcl91cGRhdGUoc3RydWN0IGRybV9jcnRjICpjcnRjKQo+Pj4gQEAgLTE1 ODIsNiArMTYwMiwxMCBAQCBzdGF0aWMgaW50IHZvcF9iaW5kKHN0cnVjdCBkZXZpY2UgKmRldiwg c3RydWN0IGRldmljZSAqbWFzdGVyLCB2b2lkICpkYXRhKQo+Pj4gICAgICAgICAgICAgICAgICBy ZXR1cm4gcmV0Owo+Pj4KPj4+ICAgICAgICAgIHBtX3J1bnRpbWVfZW5hYmxlKCZwZGV2LT5kZXYp Owo+Pj4gKwo+Pj4gKyAgICAgICB2b3AtPnBzcl9lbmFibGVkID0gZmFsc2U7Cj4+PiArICAgICAg IElOSVRfREVMQVlFRF9XT1JLKCZ2b3AtPnBzcl93b3JrLCB2b3BfcHNyX3dvcmspOwo+Pj4gKwo+ Pj4gICAgICAgICAgcmV0dXJuIDA7Cj4+PiAgIH0KPj4+Cj4+PiAtLQo+Pj4gMS45LjEKPj4+Cj4+ PgoKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1k ZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczov L2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751847AbcGMDhV (ORCPT ); Tue, 12 Jul 2016 23:37:21 -0400 Received: from lucky1.263xmail.com ([211.157.147.130]:41647 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750816AbcGMDhQ (ORCPT ); Tue, 12 Jul 2016 23:37:16 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: ykk@rock-chips.com X-FST-TO: linux-rockchip@lists.infradead.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: ykk@rock-chips.com X-UNIQUE-TAG: <6e9fbdd044ab87563eeab8bb5e8d970a> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH v3 2/4] drm/rockchip: add an common abstracted PSR driver To: Sean Paul , Mark Yao , Inki Dae , Jingoo Han , Heiko Stuebner , =?UTF-8?Q?St=c3=a9phane_Marchesin?= , Tomasz Figa , Doug Anderson , Thierry Reding , Krzysztof Kozlowski , Javier Martinez Canillas , David Airlie , Emil Velikov , Linux Kernel Mailing List , dri-devel , linux-samsung-soc , linux-rockchip@lists.infradead.org References: <1467364685-21390-1-git-send-email-ykk@rock-chips.com> <1467364754-21674-1-git-send-email-ykk@rock-chips.com> <20160712123826.GU23520@phenom.ffwll.local> From: Yakir Yang Message-ID: <5785B73B.6000301@rock-chips.com> Date: Wed, 13 Jul 2016 11:36:27 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: <20160712123826.GU23520@phenom.ffwll.local> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Daniel, On 07/12/2016 08:38 PM, Daniel Vetter wrote: > On Fri, Jul 01, 2016 at 02:00:00PM -0400, Sean Paul wrote: >> On Fri, Jul 1, 2016 at 5:19 AM, Yakir Yang wrote: >>> The PSR driver have exported four symbols for specific device driver: >>> - rockchip_drm_psr_register() >>> - rockchip_drm_psr_unregister() >>> - rockchip_drm_psr_enable() >>> - rockchip_drm_psr_disable() >>> - rockchip_drm_psr_flush() >>> >>> Encoder driver should call the register/unregister interfaces to hook >>> itself into common PSR driver, encoder have implement the 'psr_set' >>> callback which use the set PSR state in hardware side. >>> >>> Crtc driver would call the enable/disable interfaces when vblank is >>> enable/disable, after that the common PSR driver would call the encoder >>> registered callback to set the PSR state. >>> >> This feels overly complicated. It seems like you could cut out a bunch >> of code by just coding the psr functions into vop and >> analogix_dp-rockchip. I suppose the only reason to keep it abstracted >> would be if you plan on supporting psr in a different encoder or crtc >> in rockchip, or if you're planning on moving this into drm core. > Agreed on the layers of indirection. Also, you end up with 3 delayed > timers in total: > - defio timer from fbdev emulation > - timer in this abstraction > - delayed work in the psr backend driver > > I'd cut out at least the middle one. > > But since this seems to correctly use the ->dirty callback it gets my Ack > either way ;-) Aha, thanks :-D - Yakir > Cheers, Daniel > >> Perhaps others will disagree with this sentiment and this is the right >> thing to do. >> >>> Fb driver would call the flush interface in 'fb->dirty' callback, this >>> helper function would force all PSR enabled encoders to exit from PSR >>> for 3 seconds. >>> >>> Signed-off-by: Yakir Yang >>> --- >>> Changes in v3: >>> - split the psr flow into an common abstracted PSR driver >>> - implement the 'fb->dirty' callback function (Daniel) >>> - avoid to use notify to acqiure for vact event (Daniel) >>> - remove psr_active() callback which introduce in v2 >>> >>> Changes in v2: None >>> >>> drivers/gpu/drm/rockchip/Makefile | 2 +- >>> drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 12 ++ >>> drivers/gpu/drm/rockchip/rockchip_drm_psr.c | 200 ++++++++++++++++++++++++++++ >>> drivers/gpu/drm/rockchip/rockchip_drm_psr.h | 12 ++ >>> drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 24 ++++ >>> 5 files changed, 249 insertions(+), 1 deletion(-) >>> create mode 100644 drivers/gpu/drm/rockchip/rockchip_drm_psr.c >>> create mode 100644 drivers/gpu/drm/rockchip/rockchip_drm_psr.h >>> >>> diff --git a/drivers/gpu/drm/rockchip/Makefile b/drivers/gpu/drm/rockchip/Makefile >>> index 05d0713..9746365 100644 >>> --- a/drivers/gpu/drm/rockchip/Makefile >>> +++ b/drivers/gpu/drm/rockchip/Makefile >>> @@ -3,7 +3,7 @@ >>> # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. >>> >>> rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o \ >>> - rockchip_drm_gem.o rockchip_drm_vop.o >>> + rockchip_drm_gem.o rockchip_drm_psr.o rockchip_drm_vop.o >>> rockchipdrm-$(CONFIG_DRM_FBDEV_EMULATION) += rockchip_drm_fbdev.o >>> >>> obj-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o >>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c >>> index 20f12bc..0fec18f 100644 >>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c >>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c >>> @@ -21,6 +21,7 @@ >>> >>> #include "rockchip_drm_drv.h" >>> #include "rockchip_drm_gem.h" >>> +#include "rockchip_drm_psr.h" >>> >>> #define to_rockchip_fb(x) container_of(x, struct rockchip_drm_fb, fb) >>> >>> @@ -66,9 +67,20 @@ static int rockchip_drm_fb_create_handle(struct drm_framebuffer *fb, >>> rockchip_fb->obj[0], handle); >>> } >>> >>> +static int rockchip_drm_fb_dirty(struct drm_framebuffer *fb, >>> + struct drm_file *file, >>> + unsigned int flags, unsigned int color, >>> + struct drm_clip_rect *clips, >>> + unsigned int num_clips) >>> +{ >>> + rockchip_drm_psr_flush(); >>> + return 0; >>> +} >>> + >>> static const struct drm_framebuffer_funcs rockchip_drm_fb_funcs = { >>> .destroy = rockchip_drm_fb_destroy, >>> .create_handle = rockchip_drm_fb_create_handle, >>> + .dirty = rockchip_drm_fb_dirty, >>> }; >>> >>> static struct rockchip_drm_fb * >>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c >>> new file mode 100644 >>> index 0000000..c044443 >>> --- /dev/null >>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c >>> @@ -0,0 +1,200 @@ >>> +#include >>> + >>> +#include "rockchip_drm_psr.h" >>> + >>> +#define PSR_FLUSH_TIMEOUT msecs_to_jiffies(3000) /* 3 seconds */ >>> + >>> +static LIST_HEAD(psr_list); >>> +static DEFINE_MUTEX(psr_list_mutex); >> I'm not crazy about these globals. Perhaps you can initialize them >> with the rockchip driver and tuck them in a driver-level struct >> (rockchip_drm_private or something). >> >> >>> + >>> +enum psr_state { >>> + PSR_FLUSH, >>> + PSR_ENABLE, >>> + PSR_DISABLE, >>> +}; >>> + >>> +struct psr_drv { >>> + struct list_head list; >>> + enum psr_state state; >>> + struct mutex state_mutex; >>> + >>> + struct timer_list flush_timer; >>> + >>> + struct drm_encoder *encoder; >>> + int (*set)(struct drm_encoder *encoder, bool enable); >>> +}; >>> + >>> +static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc) >>> +{ >>> + struct psr_drv *psr; >>> + >>> + mutex_lock(&psr_list_mutex); >>> + list_for_each_entry(psr, &psr_list, list) { >>> + if (psr->encoder->crtc == crtc) { >>> + mutex_unlock(&psr_list_mutex); >>> + return psr; >>> + } >>> + } >>> + mutex_unlock(&psr_list_mutex); >>> + >>> + return ERR_PTR(-ENODEV); >>> +} >>> + >>> +static void psr_enable(struct psr_drv *psr) >>> +{ >>> + if (psr->state == PSR_ENABLE) >>> + return; >> Should you be worried about races by accessing this outside of the state mutex? >> >>> + >>> + mutex_lock(&psr->state_mutex); >>> + psr->state = PSR_ENABLE; >>> + psr->set(psr->encoder, true); >>> + mutex_unlock(&psr->state_mutex); >>> +} >>> + >>> +static void psr_disable(struct psr_drv *psr) >>> +{ >>> + if (psr->state == PSR_DISABLE) >>> + return; >>> + >>> + mutex_lock(&psr->state_mutex); >>> + psr->state = PSR_DISABLE; >>> + psr->set(psr->encoder, false); >>> + mutex_unlock(&psr->state_mutex); >>> +} >>> + >>> +static void psr_flush_handler(unsigned long data) >>> +{ >>> + struct psr_drv *psr = (struct psr_drv *)data; >>> + >>> + if (!psr || psr->state != PSR_FLUSH) >>> + return; >>> + >>> + psr_enable(psr); >>> +} >>> + >>> +/** >>> + * rockchip_drm_psr_enable - enable the encoder PSR which bind to given CRTC >>> + * @crtc: CRTC to obtain the PSR encoder >>> + * >>> + * Returns: >>> + * Zero on success, negative errno on failure. >>> + */ >>> +int rockchip_drm_psr_enable(struct drm_crtc *crtc) >>> +{ >>> + struct psr_drv *psr = find_psr_by_crtc(crtc); >>> + >>> + if (IS_ERR(psr)) >>> + return PTR_ERR(psr); >>> + >>> + psr_enable(psr); >>> + return 0; >>> +} >>> +EXPORT_SYMBOL(rockchip_drm_psr_enable); >>> + >>> +/** >>> + * rockchip_drm_psr_disable - disable the encoder PSR which bind to given CRTC >>> + * @crtc: CRTC to obtain the PSR encoder >>> + * >>> + * Returns: >>> + * Zero on success, negative errno on failure. >>> + */ >>> +int rockchip_drm_psr_disable(struct drm_crtc *crtc) >>> +{ >>> + struct psr_drv *psr = find_psr_by_crtc(crtc); >>> + >>> + if (IS_ERR(psr)) >>> + return PTR_ERR(psr); >>> + >>> + psr_disable(psr); >>> + return 0; >>> +} >>> +EXPORT_SYMBOL(rockchip_drm_psr_disable); >>> + >>> +/** >>> + * rockchip_drm_psr_flush - force to flush all registered PSR encoders >>> + * >>> + * Disable the PSR function for all registered encoders, and then enable the >>> + * PSR function back after 5 second. If encoder PSR state have been changed >> s/5 second/PSR_FLUSH_TIMEOUT/ >> >>> + * during flush time, then keep the state no change after flush timeout. >>> + * >>> + * Returns: >>> + * Zero on success, negative errno on failure. >>> + */ >>> +void rockchip_drm_psr_flush(void) >>> +{ >>> + struct psr_drv *psr; >>> + >>> + mutex_lock(&psr_list_mutex); >>> + list_for_each_entry(psr, &psr_list, list) { >>> + if (psr->state == PSR_DISABLE) >>> + continue; >>> + >>> + mod_timer(&psr->flush_timer, >>> + round_jiffies_up(jiffies + PSR_FLUSH_TIMEOUT)); >>> + >>> + psr_disable(psr); >>> + psr->state = PSR_FLUSH; >> This is set outside of state_mutex, is that intentional? >> >>> + } >>> + mutex_unlock(&psr_list_mutex); >>> +} >>> +EXPORT_SYMBOL(rockchip_drm_psr_flush); >>> + >>> +/** >>> + * rockchip_drm_psr_register - register encoder to psr driver >>> + * @encoder: encoder that obtain the PSR function >>> + * @psr_set: call back to set PSR state >>> + * >>> + * Returns: >>> + * Zero on success, negative errno on failure. >>> + */ >>> +int rockchip_drm_psr_register(struct drm_encoder *encoder, >>> + int (*psr_set)(struct drm_encoder *, bool enable)) >>> +{ >>> + struct psr_drv *psr; >>> + >>> + if (!encoder || !psr_set) >>> + return -EINVAL; >>> + >>> + psr = kzalloc(sizeof(struct psr_drv), GFP_KERNEL); >>> + if (!psr) >>> + return -ENOMEM; >>> + >>> + setup_timer(&psr->flush_timer, psr_flush_handler, (unsigned long)psr); >>> + >>> + mutex_init(&psr->state_mutex); >>> + >>> + psr->state = PSR_DISABLE; >>> + psr->encoder = encoder; >>> + psr->set = psr_set; >>> + >>> + mutex_lock(&psr_list_mutex); >>> + list_add_tail(&psr->list, &psr_list); >>> + mutex_unlock(&psr_list_mutex); >>> + >>> + return 0; >>> +} >>> +EXPORT_SYMBOL(rockchip_drm_psr_register); >>> + >>> +/** >>> + * rockchip_drm_psr_unregister - unregister encoder to psr driver >>> + * @encoder: encoder that obtain the PSR function >>> + * @psr_set: call back to set PSR state >>> + * >>> + * Returns: >>> + * Zero on success, negative errno on failure. >>> + */ >>> +void rockchip_drm_psr_unregister(struct drm_encoder *encoder) >>> +{ >>> + struct psr_drv *psr; >>> + >>> + mutex_lock(&psr_list_mutex); >>> + list_for_each_entry(psr, &psr_list, list) { >>> + if (psr->encoder == encoder) { >>> + del_timer(&psr->flush_timer); >>> + list_del(&psr->list); >>> + kfree(psr); >>> + } >>> + } >>> + mutex_unlock(&psr_list_mutex); >>> +} >>> +EXPORT_SYMBOL(rockchip_drm_psr_unregister); >>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h >>> new file mode 100644 >>> index 0000000..622f605 >>> --- /dev/null >>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h >>> @@ -0,0 +1,12 @@ >>> +#ifndef __ROCKCHIP_DRM_PSR___ >>> +#define __ROCKCHIP_DRM_PSR___ >>> + >>> +void rockchip_drm_psr_flush(void); >>> +int rockchip_drm_psr_enable(struct drm_crtc *crtc); >>> +int rockchip_drm_psr_disable(struct drm_crtc *crtc); >>> + >>> +int rockchip_drm_psr_register(struct drm_encoder *encoder, >>> + int (*psr_set)(struct drm_encoder *, bool enable)); >>> +void rockchip_drm_psr_unregister(struct drm_encoder *encoder); >>> + >>> +#endif /* __ROCKCHIP_DRM_PSR__ */ >>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >>> index cd3cac5..3c6dfc5 100644 >>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >>> @@ -34,6 +34,7 @@ >>> #include "rockchip_drm_drv.h" >>> #include "rockchip_drm_gem.h" >>> #include "rockchip_drm_fb.h" >>> +#include "rockchip_drm_psr.h" >>> #include "rockchip_drm_vop.h" >>> >>> #define __REG_SET_RELAXED(x, off, mask, shift, v, write_mask) \ >>> @@ -121,6 +122,9 @@ struct vop { >>> /* protected by dev->event_lock */ >>> struct drm_pending_vblank_event *event; >>> >>> + bool psr_enabled; >>> + struct delayed_work psr_work; >>> + >>> struct completion line_flag_completion; >>> >>> const struct vop_data *data; >>> @@ -911,6 +915,16 @@ static const struct drm_plane_funcs vop_plane_funcs = { >>> .atomic_destroy_state = vop_atomic_plane_destroy_state, >>> }; >>> >>> +static void vop_psr_work(struct work_struct *work) >>> +{ >>> + struct vop *vop = container_of(work, typeof(*vop), psr_work.work); >>> + >>> + if (vop->psr_enabled) >>> + rockchip_drm_psr_enable(&vop->crtc); >>> + else >>> + rockchip_drm_psr_disable(&vop->crtc); >>> +} >>> + >>> static int vop_crtc_enable_vblank(struct drm_crtc *crtc) >>> { >>> struct vop *vop = to_vop(crtc); >>> @@ -925,6 +939,9 @@ static int vop_crtc_enable_vblank(struct drm_crtc *crtc) >>> >>> spin_unlock_irqrestore(&vop->irq_lock, flags); >>> >>> + vop->psr_enabled = false; >>> + schedule_delayed_work(&vop->psr_work, msecs_to_jiffies(10)); >>> + >>> return 0; >>> } >>> >>> @@ -941,6 +958,9 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc) >>> VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 0); >>> >>> spin_unlock_irqrestore(&vop->irq_lock, flags); >>> + >>> + vop->psr_enabled = true; >>> + schedule_delayed_work(&vop->psr_work, msecs_to_jiffies(10)); >>> } >>> >>> static void vop_crtc_wait_for_update(struct drm_crtc *crtc) >>> @@ -1582,6 +1602,10 @@ static int vop_bind(struct device *dev, struct device *master, void *data) >>> return ret; >>> >>> pm_runtime_enable(&pdev->dev); >>> + >>> + vop->psr_enabled = false; >>> + INIT_DELAYED_WORK(&vop->psr_work, vop_psr_work); >>> + >>> return 0; >>> } >>> >>> -- >>> 1.9.1 >>> >>>