From mboxrd@z Thu Jan 1 00:00:00 1970 From: tanxiaojun@huawei.com (Tan Xiaojun) Date: Mon, 25 Jul 2016 10:09:44 +0800 Subject: [RFC PATCH v1 0/2] Add Hisilicon Djtag driver In-Reply-To: <11848764.OZ77lJYCM4@wuerfel> References: <1469177332-72156-1-git-send-email-tanxiaojun@huawei.com> <20160722105648.GD17584@leverpostej> <11848764.OZ77lJYCM4@wuerfel> Message-ID: <579574E8.4080201@huawei.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2016/7/22 21:27, Arnd Bergmann wrote: > On Friday, July 22, 2016 11:56:49 AM CEST Mark Rutland wrote: >> Hi, >> >> I understand that some SoC/socket level PMU is accessed via these >> registers. It doesn't make sense to review either in isolation. Please >> put together a unified series, with both the djtag accessors and the >> PMU code. >> >> On it's own, it's *very* difficult to understand how this fits into the >> SoC, and how it is to be used. > > Is there anything else that the driver is used for? > > Having it in drivers/soc/ feels wrong to me, and if there is only > one user, I'd recommend having it as part of the same driver module > as the code accessing it. > > Arnd > Many modules will use it, and they are waiting for djtag upstream. Maybe it should not have been presented separately. I will think about it. Thanks, Xiaojun. > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tan Xiaojun Subject: Re: [RFC PATCH v1 0/2] Add Hisilicon Djtag driver Date: Mon, 25 Jul 2016 10:09:44 +0800 Message-ID: <579574E8.4080201@huawei.com> References: <1469177332-72156-1-git-send-email-tanxiaojun@huawei.com> <20160722105648.GD17584@leverpostej> <11848764.OZ77lJYCM4@wuerfel> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <11848764.OZ77lJYCM4@wuerfel> Sender: linux-kernel-owner@vger.kernel.org To: Arnd Bergmann , Mark Rutland Cc: robh+dt@kernel.org, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, xuwei5@hisilicon.com, devicetree@vger.kernel.org, khilman@linaro.org, k.kozlowski@samsung.com, amitdanielk@gmail.com, heiko@sntech.de, wxt@rock-chips.com, alex.aring@gmail.com, qiang.zhao@freescale.com, treding@nvidia.com, rmk+kernel@arm.linux.org.uk, gregory.clement@free-electrons.com, f.fainelli@gmail.com, geert+renesas@glider.be, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org On 2016/7/22 21:27, Arnd Bergmann wrote: > On Friday, July 22, 2016 11:56:49 AM CEST Mark Rutland wrote: >> Hi, >> >> I understand that some SoC/socket level PMU is accessed via these >> registers. It doesn't make sense to review either in isolation. Please >> put together a unified series, with both the djtag accessors and the >> PMU code. >> >> On it's own, it's *very* difficult to understand how this fits into the >> SoC, and how it is to be used. > > Is there anything else that the driver is used for? > > Having it in drivers/soc/ feels wrong to me, and if there is only > one user, I'd recommend having it as part of the same driver module > as the code accessing it. > > Arnd > Many modules will use it, and they are waiting for djtag upstream. Maybe it should not have been presented separately. I will think about it. Thanks, Xiaojun. > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752677AbcGYCLH (ORCPT ); Sun, 24 Jul 2016 22:11:07 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:16000 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752109AbcGYCLB (ORCPT ); Sun, 24 Jul 2016 22:11:01 -0400 Subject: Re: [RFC PATCH v1 0/2] Add Hisilicon Djtag driver To: Arnd Bergmann , Mark Rutland References: <1469177332-72156-1-git-send-email-tanxiaojun@huawei.com> <20160722105648.GD17584@leverpostej> <11848764.OZ77lJYCM4@wuerfel> CC: , , , , , , , , , , , , , , , , , , , From: Tan Xiaojun Message-ID: <579574E8.4080201@huawei.com> Date: Mon, 25 Jul 2016 10:09:44 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <11848764.OZ77lJYCM4@wuerfel> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.177.21.79] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090205.57957509.0004,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 30b9a22b9fd25564a8e1d081d16cb193 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2016/7/22 21:27, Arnd Bergmann wrote: > On Friday, July 22, 2016 11:56:49 AM CEST Mark Rutland wrote: >> Hi, >> >> I understand that some SoC/socket level PMU is accessed via these >> registers. It doesn't make sense to review either in isolation. Please >> put together a unified series, with both the djtag accessors and the >> PMU code. >> >> On it's own, it's *very* difficult to understand how this fits into the >> SoC, and how it is to be used. > > Is there anything else that the driver is used for? > > Having it in drivers/soc/ feels wrong to me, and if there is only > one user, I'd recommend having it as part of the same driver module > as the code accessing it. > > Arnd > Many modules will use it, and they are waiting for djtag upstream. Maybe it should not have been presented separately. I will think about it. Thanks, Xiaojun. > > . >