From: Jaehoon Chung <jh80.chung@samsung.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] mmc: sdhci: revert "mmc: sdhci: Claer high speed if not supported"
Date: Thu, 28 Jul 2016 15:34:15 +0900 [thread overview]
Message-ID: <5799A767.7080806@samsung.com> (raw)
In-Reply-To: <1469527429-15065-1-git-send-email-jh80.chung@samsung.com>
Hi All,
On 07/26/2016 07:03 PM, Jaehoon Chung wrote:
> This "commit 429790026021d522d51617217d4b86218cca5750" is wrong.
> SDHCI_QUIRK_NO_HISPD_BIT is for skipping to set CTRL_HISPD bit.
>
> For example, Exynos didn't have CTRL_HISPD. But Highspeed mode
> is supported.
> (This quirks doesn't mean that driver didn't support the Highseepd mode.)
>
> Note: If driver didn't support the Highspeed Mode, use or add the other
> quirks.
>
> After applied this patch, all Exynos SoCs are just running with 25MHz.
SDHCI_QUIRK_NO_HISPD had added from me.
At that time, it meant the Controller doesn't have the SDHCI_CTRL_HISPD bit[2].
In exynos, this bit is using as OUTEDGINV (Output Egde Inversion).
I added SDHCI_QUIRK_NO_HISPD to prevent wrong bit operation likes this.
And in drivers/mmc/mmc.c 1328 line,
mmc->card_caps &= mmc->cfg->host_caps;
After reading card's capabilities, if card didn't support those, then it's cleared.
I don't know why cleared these capabilities before checking the card's capabilities.
After applied commit "42979002602"
Device: SAMSUNG SDHCI
Manufacturer ID: 3
OEM: 5344
Name: SU16G
Tran Speed: 25000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.8 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
After reverted commit "42979002602"
Device: SAMSUNG SDHCI
Manufacturer ID: 3
OEM: 5344
Name: SU16G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.8 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
There is no purpose, it needs to revert for Other SoCs.
Best Regards,
Jaehoon Chung
>
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> ---
> drivers/mmc/sdhci.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> index 9fdbed8..1fa4038 100644
> --- a/drivers/mmc/sdhci.c
> +++ b/drivers/mmc/sdhci.c
> @@ -553,9 +553,6 @@ int sdhci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
> cfg->host_caps |= MMC_MODE_8BIT;
> }
>
> - if (quirks & SDHCI_QUIRK_NO_HISPD_BIT)
> - cfg->host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz);
> -
> if (host_caps)
> cfg->host_caps |= host_caps;
>
>
next prev parent reply other threads:[~2016-07-28 6:34 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20160726100350epcas1p1dc2bcaffac66e8624bdb8dd5086f011e@epcas1p1.samsung.com>
2016-07-26 10:03 ` [U-Boot] [PATCH] mmc: sdhci: revert "mmc: sdhci: Claer high speed if not supported" Jaehoon Chung
2016-07-28 6:34 ` Jaehoon Chung [this message]
2016-08-05 2:26 ` [U-Boot] " Jaehoon Chung
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5799A767.7080806@samsung.com \
--to=jh80.chung@samsung.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.