From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yakir Yang Subject: Re: [PATCH] drm/bridge: analogix_dp: Remove duplicated code Date: Fri, 5 Aug 2016 16:12:55 +0800 Message-ID: <57A44A87.3000806@rock-chips.com> References: <1470291789-23402-1-git-send-email-tomeu.vizoso@collabora.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: Received: from lucky1.263xmail.com (lucky1.263xmail.com [211.157.147.133]) by gabe.freedesktop.org (Postfix) with ESMTPS id E75B16E0CB for ; Fri, 5 Aug 2016 08:13:03 +0000 (UTC) In-Reply-To: <1470291789-23402-1-git-send-email-tomeu.vizoso@collabora.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Tomeu Vizoso , linux-kernel@vger.kernel.org Cc: Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Mika Kahola , Daniel Vetter List-Id: dri-devel@lists.freedesktop.org VG9tZXUsCgpOaWNlIGpvYiAhIEhhdmUgYSBmZXcgbml0cyBiZWxsb3cuICA7KQoKT24gMDgvMDQv MjAxNiAwMjoyMyBQTSwgVG9tZXUgVml6b3NvIHdyb3RlOgo+IFJlbW92ZSBjb2RlIGZvciByZWFk aW5nIHRoZSBFRElEIGFuZCBEUENEIGZpZWxkcyBhbmQgdXNlIHRoZSBoZWxwZXJzCj4gaW5zdGVh ZC4KPgo+IEJlc2lkZXMgdGhlIG9idmlvdXMgY29kZSByZWR1Y3Rpb24sIG90aGVyIGhlbHBlcnMg YXJlIGJlaW5nIGFkZGVkIHRvIHRoZQo+IGNvcmUgdGhhdCBjb3VsZCBiZSB1c2VkIGluIHRoaXMg ZHJpdmVyIGFuZCB3aWxsIGJlIGdvb2QgdG8gYmUgYWJsZSB0bwo+IHVzZSB0aGVtIGluc3RlYWQg b2YgZHVwbGljYXRpbmcgdGhlbS4KPgo+IFNpZ25lZC1vZmYtYnk6IFRvbWV1IFZpem9zbyA8dG9t ZXUudml6b3NvQGNvbGxhYm9yYS5jb20+Cj4gQ2M6IEphdmllciBNYXJ0aW5leiBDYW5pbGxhcyA8 amF2aWVyQG9zZy5zYW1zdW5nLmNvbT4KPiBDYzogTWlrYSBLYWhvbGEgPG1pa2Eua2Fob2xhQGlu dGVsLmNvbT4KPiBDYzogWWFraXIgWWFuZyA8eWtrQHJvY2stY2hpcHMuY29tPgo+IENjOiBEYW5p ZWwgVmV0dGVyIDxkYW5pZWwudmV0dGVyQGludGVsLmNvbT4KPiAtLS0KPiAgIGRyaXZlcnMvZ3B1 L2RybS9icmlkZ2UvYW5hbG9naXgvYW5hbG9naXhfZHBfY29yZS5jIHwgMzkwICsrKysrKysrKysr LS0tLS0tLS0tLQo+ICAgZHJpdmVycy9ncHUvZHJtL2JyaWRnZS9hbmFsb2dpeC9hbmFsb2dpeF9k cF9jb3JlLmggfCAgMzkgKy0tCj4gICBkcml2ZXJzL2dwdS9kcm0vYnJpZGdlL2FuYWxvZ2l4L2Fu YWxvZ2l4X2RwX3JlZy5jICB8IDMyNCAtLS0tLS0tLS0tLS0tLS0tLQo+ICAgMyBmaWxlcyBjaGFu Z2VkLCAyMDEgaW5zZXJ0aW9ucygrKSwgNTUyIGRlbGV0aW9ucygtKQo+Cj4gZGlmZiAtLWdpdCBh L2RyaXZlcnMvZ3B1L2RybS9icmlkZ2UvYW5hbG9naXgvYW5hbG9naXhfZHBfY29yZS5jIGIvZHJp dmVycy9ncHUvZHJtL2JyaWRnZS9hbmFsb2dpeC9hbmFsb2dpeF9kcF9jb3JlLmMKPiBpbmRleCAz MjcxNWRhZjczY2IuLmM4MWNiMzdlNTZiNiAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0v YnJpZGdlL2FuYWxvZ2l4L2FuYWxvZ2l4X2RwX2NvcmUuYwo+ICsrKyBiL2RyaXZlcnMvZ3B1L2Ry bS9icmlkZ2UvYW5hbG9naXgvYW5hbG9naXhfZHBfY29yZS5jCj4gQEAgLTMxLDYgKzMxLDcgQEAK PiAgICNpbmNsdWRlIDxkcm0vYnJpZGdlL2FuYWxvZ2l4X2RwLmg+Cj4gICAKPiAgICNpbmNsdWRl ICJhbmFsb2dpeF9kcF9jb3JlLmgiCj4gKyNpbmNsdWRlICJhbmFsb2dpeF9kcF9yZWcuaCIKPiAg IAo+ICAgI2RlZmluZSB0b19kcChubSkJY29udGFpbmVyX29mKG5tLCBzdHJ1Y3QgYW5hbG9naXhf ZHBfZGV2aWNlLCBubSkKPiAgIAo+IEBAIC05NywxNTAgKzk4LDIxIEBAIHN0YXRpYyBpbnQgYW5h bG9naXhfZHBfZGV0ZWN0X2hwZChzdHJ1Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpkcCkKPiAgIAly ZXR1cm4gMDsKPiAgIH0KPiAgIAo+IC1zdGF0aWMgdW5zaWduZWQgY2hhciBhbmFsb2dpeF9kcF9j YWxjX2VkaWRfY2hlY2tfc3VtKHVuc2lnbmVkIGNoYXIgKmVkaWRfZGF0YSkKPiAtewo+IC0JaW50 IGk7Cj4gLQl1bnNpZ25lZCBjaGFyIHN1bSA9IDA7Cj4gLQo+IC0JZm9yIChpID0gMDsgaSA8IEVE SURfQkxPQ0tfTEVOR1RIOyBpKyspCj4gLQkJc3VtID0gc3VtICsgZWRpZF9kYXRhW2ldOwo+IC0K PiAtCXJldHVybiBzdW07Cj4gLX0KPiAtCj4gLXN0YXRpYyBpbnQgYW5hbG9naXhfZHBfcmVhZF9l ZGlkKHN0cnVjdCBhbmFsb2dpeF9kcF9kZXZpY2UgKmRwKQo+IC17Cj4gLQl1bnNpZ25lZCBjaGFy ICplZGlkID0gZHAtPmVkaWQ7Cj4gLQl1bnNpZ25lZCBpbnQgZXh0ZW5kX2Jsb2NrID0gMDsKPiAt CXVuc2lnbmVkIGNoYXIgc3VtOwo+IC0JdW5zaWduZWQgY2hhciB0ZXN0X3ZlY3RvcjsKPiAtCWlu dCByZXR2YWw7Cj4gLQo+IC0JLyoKPiAtCSAqIEVESUQgZGV2aWNlIGFkZHJlc3MgaXMgMHg1MC4K PiAtCSAqIEhvd2V2ZXIsIGlmIG5lY2Vzc2FyeSwgeW91IG11c3QgaGF2ZSBzZXQgdXBwZXIgYWRk cmVzcwo+IC0JICogaW50byBFLUVESUQgaW4gSTJDIGRldmljZSwgMHgzMC4KPiAtCSAqLwo+IC0K PiAtCS8qIFJlYWQgRXh0ZW5zaW9uIEZsYWcsIE51bWJlciBvZiAxMjgtYnl0ZSBFRElEIGV4dGVu c2lvbiBibG9ja3MgKi8KPiAtCXJldHZhbCA9IGFuYWxvZ2l4X2RwX3JlYWRfYnl0ZV9mcm9tX2ky YyhkcCwgSTJDX0VESURfREVWSUNFX0FERFIsCj4gLQkJCQkJCUVESURfRVhURU5TSU9OX0ZMQUcs Cj4gLQkJCQkJCSZleHRlbmRfYmxvY2spOwo+IC0JaWYgKHJldHZhbCkKPiAtCQlyZXR1cm4gcmV0 dmFsOwo+IC0KPiAtCWlmIChleHRlbmRfYmxvY2sgPiAwKSB7Cj4gLQkJZGV2X2RiZyhkcC0+ZGV2 LCAiRURJRCBkYXRhIGluY2x1ZGVzIGEgc2luZ2xlIGV4dGVuc2lvbiFcbiIpOwo+IC0KPiAtCQkv KiBSZWFkIEVESUQgZGF0YSAqLwo+IC0JCXJldHZhbCA9IGFuYWxvZ2l4X2RwX3JlYWRfYnl0ZXNf ZnJvbV9pMmMoZHAsCj4gLQkJCQkJCUkyQ19FRElEX0RFVklDRV9BRERSLAo+IC0JCQkJCQlFRElE X0hFQURFUl9QQVRURVJOLAo+IC0JCQkJCQlFRElEX0JMT0NLX0xFTkdUSCwKPiAtCQkJCQkJJmVk aWRbRURJRF9IRUFERVJfUEFUVEVSTl0pOwo+IC0JCWlmIChyZXR2YWwgIT0gMCkgewo+IC0JCQlk ZXZfZXJyKGRwLT5kZXYsICJFRElEIFJlYWQgZmFpbGVkIVxuIik7Cj4gLQkJCXJldHVybiAtRUlP Owo+IC0JCX0KPiAtCQlzdW0gPSBhbmFsb2dpeF9kcF9jYWxjX2VkaWRfY2hlY2tfc3VtKGVkaWQp Owo+IC0JCWlmIChzdW0gIT0gMCkgewo+IC0JCQlkZXZfZXJyKGRwLT5kZXYsICJFRElEIGJhZCBj aGVja3N1bSFcbiIpOwo+IC0JCQlyZXR1cm4gLUVJTzsKPiAtCQl9Cj4gLQo+IC0JCS8qIFJlYWQg YWRkaXRpb25hbCBFRElEIGRhdGEgKi8KPiAtCQlyZXR2YWwgPSBhbmFsb2dpeF9kcF9yZWFkX2J5 dGVzX2Zyb21faTJjKGRwLAo+IC0JCQkJSTJDX0VESURfREVWSUNFX0FERFIsCj4gLQkJCQlFRElE X0JMT0NLX0xFTkdUSCwKPiAtCQkJCUVESURfQkxPQ0tfTEVOR1RILAo+IC0JCQkJJmVkaWRbRURJ RF9CTE9DS19MRU5HVEhdKTsKPiAtCQlpZiAocmV0dmFsICE9IDApIHsKPiAtCQkJZGV2X2Vycihk cC0+ZGV2LCAiRURJRCBSZWFkIGZhaWxlZCFcbiIpOwo+IC0JCQlyZXR1cm4gLUVJTzsKPiAtCQl9 Cj4gLQkJc3VtID0gYW5hbG9naXhfZHBfY2FsY19lZGlkX2NoZWNrX3N1bSgmZWRpZFtFRElEX0JM T0NLX0xFTkdUSF0pOwo+IC0JCWlmIChzdW0gIT0gMCkgewo+IC0JCQlkZXZfZXJyKGRwLT5kZXYs ICJFRElEIGJhZCBjaGVja3N1bSFcbiIpOwo+IC0JCQlyZXR1cm4gLUVJTzsKPiAtCQl9Cj4gLQo+ IC0JCWFuYWxvZ2l4X2RwX3JlYWRfYnl0ZV9mcm9tX2RwY2QoZHAsIERQX1RFU1RfUkVRVUVTVCwK PiAtCQkJCQkJJnRlc3RfdmVjdG9yKTsKPiAtCQlpZiAodGVzdF92ZWN0b3IgJiBEUF9URVNUX0xJ TktfRURJRF9SRUFEKSB7Cj4gLQkJCWFuYWxvZ2l4X2RwX3dyaXRlX2J5dGVfdG9fZHBjZChkcCwK PiAtCQkJCURQX1RFU1RfRURJRF9DSEVDS1NVTSwKPiAtCQkJCWVkaWRbRURJRF9CTE9DS19MRU5H VEggKyBFRElEX0NIRUNLU1VNXSk7Cj4gLQkJCWFuYWxvZ2l4X2RwX3dyaXRlX2J5dGVfdG9fZHBj ZChkcCwKPiAtCQkJCURQX1RFU1RfUkVTUE9OU0UsCj4gLQkJCQlEUF9URVNUX0VESURfQ0hFQ0tT VU1fV1JJVEUpOwo+IC0JCX0KPiAtCX0gZWxzZSB7Cj4gLQkJZGV2X2luZm8oZHAtPmRldiwgIkVE SUQgZGF0YSBkb2VzIG5vdCBpbmNsdWRlIGFueSBleHRlbnNpb25zLlxuIik7Cj4gLQo+IC0JCS8q IFJlYWQgRURJRCBkYXRhICovCj4gLQkJcmV0dmFsID0gYW5hbG9naXhfZHBfcmVhZF9ieXRlc19m cm9tX2kyYyhkcCwKPiAtCQkJCUkyQ19FRElEX0RFVklDRV9BRERSLCBFRElEX0hFQURFUl9QQVRU RVJOLAo+IC0JCQkJRURJRF9CTE9DS19MRU5HVEgsICZlZGlkW0VESURfSEVBREVSX1BBVFRFUk5d KTsKPiAtCQlpZiAocmV0dmFsICE9IDApIHsKPiAtCQkJZGV2X2VycihkcC0+ZGV2LCAiRURJRCBS ZWFkIGZhaWxlZCFcbiIpOwo+IC0JCQlyZXR1cm4gLUVJTzsKPiAtCQl9Cj4gLQkJc3VtID0gYW5h bG9naXhfZHBfY2FsY19lZGlkX2NoZWNrX3N1bShlZGlkKTsKPiAtCQlpZiAoc3VtICE9IDApIHsK PiAtCQkJZGV2X2VycihkcC0+ZGV2LCAiRURJRCBiYWQgY2hlY2tzdW0hXG4iKTsKPiAtCQkJcmV0 dXJuIC1FSU87Cj4gLQkJfQo+IC0KPiAtCQlhbmFsb2dpeF9kcF9yZWFkX2J5dGVfZnJvbV9kcGNk KGRwLCBEUF9URVNUX1JFUVVFU1QsCj4gLQkJCQkJCSZ0ZXN0X3ZlY3Rvcik7Cj4gLQkJaWYgKHRl c3RfdmVjdG9yICYgRFBfVEVTVF9MSU5LX0VESURfUkVBRCkgewo+IC0JCQlhbmFsb2dpeF9kcF93 cml0ZV9ieXRlX3RvX2RwY2QoZHAsCj4gLQkJCQlEUF9URVNUX0VESURfQ0hFQ0tTVU0sIGVkaWRb RURJRF9DSEVDS1NVTV0pOwo+IC0JCQlhbmFsb2dpeF9kcF93cml0ZV9ieXRlX3RvX2RwY2QoZHAs Cj4gLQkJCQlEUF9URVNUX1JFU1BPTlNFLCBEUF9URVNUX0VESURfQ0hFQ0tTVU1fV1JJVEUpOwo+ IC0JCX0KPiAtCX0KPiAtCj4gLQlkZXZfZGJnKGRwLT5kZXYsICJFRElEIFJlYWQgc3VjY2VzcyFc biIpOwo+IC0JcmV0dXJuIDA7Cj4gLX0KPiAtCj4gLXN0YXRpYyBpbnQgYW5hbG9naXhfZHBfaGFu ZGxlX2VkaWQoc3RydWN0IGFuYWxvZ2l4X2RwX2RldmljZSAqZHApCj4gLXsKPiAtCXU4IGJ1Zlsx Ml07Cj4gLQlpbnQgaTsKPiAtCWludCByZXR2YWw7Cj4gLQo+IC0JLyogUmVhZCBEUENEIERQX0RQ Q0RfUkVWflJFQ0VJVkVfUE9SVDFfQ0FQXzEgKi8KPiAtCXJldHZhbCA9IGFuYWxvZ2l4X2RwX3Jl YWRfYnl0ZXNfZnJvbV9kcGNkKGRwLCBEUF9EUENEX1JFViwgMTIsIGJ1Zik7Cj4gLQlpZiAocmV0 dmFsKQo+IC0JCXJldHVybiByZXR2YWw7Cj4gLQo+IC0JLyogUmVhZCBFRElEICovCj4gLQlmb3Ig KGkgPSAwOyBpIDwgMzsgaSsrKSB7Cj4gLQkJcmV0dmFsID0gYW5hbG9naXhfZHBfcmVhZF9lZGlk KGRwKTsKPiAtCQlpZiAoIXJldHZhbCkKPiAtCQkJYnJlYWs7Cj4gLQl9Cj4gLQo+IC0JcmV0dXJu IHJldHZhbDsKPiAtfQo+IC0KPiAgIHN0YXRpYyB2b2lkCj4gICBhbmFsb2dpeF9kcF9lbmFibGVf cnhfdG9fZW5oYW5jZWRfbW9kZShzdHJ1Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpkcCwKPiAgIAkJ CQkgICAgICAgYm9vbCBlbmFibGUpCj4gICB7Cj4gICAJdTggZGF0YTsKPiAgIAo+IC0JYW5hbG9n aXhfZHBfcmVhZF9ieXRlX2Zyb21fZHBjZChkcCwgRFBfTEFORV9DT1VOVF9TRVQsICZkYXRhKTsK PiArCWRybV9kcF9kcGNkX3JlYWRiKCZkcC0+YXV4LCBEUF9MQU5FX0NPVU5UX1NFVCwgJmRhdGEp Owo+ICAgCj4gICAJaWYgKGVuYWJsZSkKPiAtCQlhbmFsb2dpeF9kcF93cml0ZV9ieXRlX3RvX2Rw Y2QoZHAsIERQX0xBTkVfQ09VTlRfU0VULAo+IC0JCQkJCSAgICAgICBEUF9MQU5FX0NPVU5UX0VO SEFOQ0VEX0ZSQU1FX0VOIHwKPiAtCQkJCQkgICAgICAgRFBDRF9MQU5FX0NPVU5UX1NFVChkYXRh KSk7Cj4gKwkJZHJtX2RwX2RwY2Rfd3JpdGViKCZkcC0+YXV4LCBEUF9MQU5FX0NPVU5UX1NFVCwK PiArCQkJCSAgIERQX0xBTkVfQ09VTlRfRU5IQU5DRURfRlJBTUVfRU4gfAo+ICsJCQkJCURQQ0Rf TEFORV9DT1VOVF9TRVQoZGF0YSkpOwo+ICAgCWVsc2UKPiAtCQlhbmFsb2dpeF9kcF93cml0ZV9i eXRlX3RvX2RwY2QoZHAsIERQX0xBTkVfQ09VTlRfU0VULAo+IC0JCQkJCSAgICAgICBEUENEX0xB TkVfQ09VTlRfU0VUKGRhdGEpKTsKPiArCQlkcm1fZHBfZHBjZF93cml0ZWIoJmRwLT5hdXgsIERQ X0xBTkVfQ09VTlRfU0VULAo+ICsJCQkJICAgRFBDRF9MQU5FX0NPVU5UX1NFVChkYXRhKSk7Cj4g ICB9Cj4gICAKPiAgIHN0YXRpYyBpbnQgYW5hbG9naXhfZHBfaXNfZW5oYW5jZWRfbW9kZV9hdmFp bGFibGUoc3RydWN0IGFuYWxvZ2l4X2RwX2RldmljZSAqZHApCj4gQEAgLTI0OCw3ICsxMjAsNyBA QCBzdGF0aWMgaW50IGFuYWxvZ2l4X2RwX2lzX2VuaGFuY2VkX21vZGVfYXZhaWxhYmxlKHN0cnVj dCBhbmFsb2dpeF9kcF9kZXZpY2UgKmRwKQo+ICAgCXU4IGRhdGE7Cj4gICAJaW50IHJldHZhbDsK PiAgIAo+IC0JYW5hbG9naXhfZHBfcmVhZF9ieXRlX2Zyb21fZHBjZChkcCwgRFBfTUFYX0xBTkVf Q09VTlQsICZkYXRhKTsKPiArCWRybV9kcF9kcGNkX3JlYWRiKCZkcC0+YXV4LCBEUF9NQVhfTEFO RV9DT1VOVCwgJmRhdGEpOwo+ICAgCXJldHZhbCA9IERQQ0RfRU5IQU5DRURfRlJBTUVfQ0FQKGRh dGEpOwo+ICAgCj4gICAJcmV0dXJuIHJldHZhbDsKPiBAQCAtMjY3LDggKzEzOSw4IEBAIHN0YXRp YyB2b2lkIGFuYWxvZ2l4X2RwX3RyYWluaW5nX3BhdHRlcm5fZGlzKHN0cnVjdCBhbmFsb2dpeF9k cF9kZXZpY2UgKmRwKQo+ICAgewo+ICAgCWFuYWxvZ2l4X2RwX3NldF90cmFpbmluZ19wYXR0ZXJu KGRwLCBEUF9OT05FKTsKPiAgIAo+IC0JYW5hbG9naXhfZHBfd3JpdGVfYnl0ZV90b19kcGNkKGRw LCBEUF9UUkFJTklOR19QQVRURVJOX1NFVCwKPiAtCQkJCSAgICAgICBEUF9UUkFJTklOR19QQVRU RVJOX0RJU0FCTEUpOwo+ICsJZHJtX2RwX2RwY2Rfd3JpdGViKCZkcC0+YXV4LCBEUF9UUkFJTklO R19QQVRURVJOX1NFVCwKPiArCQkJICAgRFBfVFJBSU5JTkdfUEFUVEVSTl9ESVNBQkxFKTsKPiAg IH0KPiAgIAo+ICAgc3RhdGljIHZvaWQKPiBAQCAtMzEzLDggKzE4NSw4IEBAIHN0YXRpYyBpbnQg YW5hbG9naXhfZHBfbGlua19zdGFydChzdHJ1Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpkcCkKPiAg IAkvKiBTZXR1cCBSWCBjb25maWd1cmF0aW9uICovCj4gICAJYnVmWzBdID0gZHAtPmxpbmtfdHJh aW4ubGlua19yYXRlOwo+ICAgCWJ1ZlsxXSA9IGRwLT5saW5rX3RyYWluLmxhbmVfY291bnQ7Cj4g LQlyZXR2YWwgPSBhbmFsb2dpeF9kcF93cml0ZV9ieXRlc190b19kcGNkKGRwLCBEUF9MSU5LX0JX X1NFVCwgMiwgYnVmKTsKPiAtCWlmIChyZXR2YWwpCj4gKwlyZXR2YWwgPSBkcm1fZHBfZHBjZF93 cml0ZSgmZHAtPmF1eCwgRFBfTElOS19CV19TRVQsIGJ1ZiwgMik7Cj4gKwlpZiAocmV0dmFsIDwg MCkKPiAgIAkJcmV0dXJuIHJldHZhbDsKPiAgIAo+ICAgCS8qIFNldCBUWCBwcmUtZW1waGFzaXMg dG8gbWluaW11bSAqLwo+IEBAIC0zMzgsMjAgKzIxMCwyMiBAQCBzdGF0aWMgaW50IGFuYWxvZ2l4 X2RwX2xpbmtfc3RhcnQoc3RydWN0IGFuYWxvZ2l4X2RwX2RldmljZSAqZHApCj4gICAJYW5hbG9n aXhfZHBfc2V0X3RyYWluaW5nX3BhdHRlcm4oZHAsIFRSQUlOSU5HX1BUTjEpOwo+ICAgCj4gICAJ LyogU2V0IFJYIHRyYWluaW5nIHBhdHRlcm4gKi8KPiAtCXJldHZhbCA9IGFuYWxvZ2l4X2RwX3dy aXRlX2J5dGVfdG9fZHBjZChkcCwKPiAtCQkJRFBfVFJBSU5JTkdfUEFUVEVSTl9TRVQsCj4gLQkJ CURQX0xJTktfU0NSQU1CTElOR19ESVNBQkxFIHwgRFBfVFJBSU5JTkdfUEFUVEVSTl8xKTsKPiAt CWlmIChyZXR2YWwpCj4gKwlyZXR2YWwgPSBkcm1fZHBfZHBjZF93cml0ZWIoJmRwLT5hdXgsIERQ X1RSQUlOSU5HX1BBVFRFUk5fU0VULAo+ICsJCQkJICAgIERQX0xJTktfU0NSQU1CTElOR19ESVNB QkxFIHwKPiArCQkJCQlEUF9UUkFJTklOR19QQVRURVJOXzEpOwoKJ0RQX1RSQUlOSU5HX1BBVFRF Uk5fMScgIG5lZWQgYWxpZ24gd2l0aCAnRFBfTElOS19TQ1JBTUJMSU5HX0RJU0FCTEUnCgo+ICsJ aWYgKHJldHZhbCA8IDApCj4gICAJCXJldHVybiByZXR2YWw7Cj4gICAKPiAgIAlmb3IgKGxhbmUg PSAwOyBsYW5lIDwgbGFuZV9jb3VudDsgbGFuZSsrKQo+ICAgCQlidWZbbGFuZV0gPSBEUF9UUkFJ Tl9QUkVfRU1QSF9MRVZFTF8wIHwKPiAgIAkJCSAgICBEUF9UUkFJTl9WT0xUQUdFX1NXSU5HX0xF VkVMXzA7Cj4gICAKPiAtCXJldHZhbCA9IGFuYWxvZ2l4X2RwX3dyaXRlX2J5dGVzX3RvX2RwY2Qo ZHAsIERQX1RSQUlOSU5HX0xBTkUwX1NFVCwKPiAtCQkJCQkJIGxhbmVfY291bnQsIGJ1Zik7Cj4g KwlyZXR2YWwgPSBkcm1fZHBfZHBjZF93cml0ZSgmZHAtPmF1eCwgRFBfVFJBSU5JTkdfTEFORTBf U0VULCBidWYsCj4gKwkJCQkgICBsYW5lX2NvdW50KTsKPiArCWlmIChyZXR2YWwgPCAwKQo+ICsJ CXJldHVybiByZXR2YWw7Cj4gICAKPiAtCXJldHVybiByZXR2YWw7Cj4gKwlyZXR1cm4gMDsKPiAg IH0KPiAgIAo+ICAgc3RhdGljIHVuc2lnbmVkIGNoYXIgYW5hbG9naXhfZHBfZ2V0X2xhbmVfc3Rh dHVzKHU4IGxpbmtfc3RhdHVzWzJdLCBpbnQgbGFuZSkKPiBAQCAtNTAzLDI1ICszNzcsMjMgQEAg c3RhdGljIGludCBhbmFsb2dpeF9kcF9wcm9jZXNzX2Nsb2NrX3JlY292ZXJ5KHN0cnVjdCBhbmFs b2dpeF9kcF9kZXZpY2UgKmRwKQo+ICAgCj4gICAJbGFuZV9jb3VudCA9IGRwLT5saW5rX3RyYWlu LmxhbmVfY291bnQ7Cj4gICAKPiAtCXJldHZhbCA9ICBhbmFsb2dpeF9kcF9yZWFkX2J5dGVzX2Zy b21fZHBjZChkcCwKPiAtCQkJRFBfTEFORTBfMV9TVEFUVVMsIDIsIGxpbmtfc3RhdHVzKTsKPiAt CWlmIChyZXR2YWwpCj4gKwlyZXR2YWwgPSBkcm1fZHBfZHBjZF9yZWFkKCZkcC0+YXV4LCBEUF9M QU5FMF8xX1NUQVRVUywgbGlua19zdGF0dXMsIDIpOwo+ICsJaWYgKHJldHZhbCA8IDApCj4gICAJ CXJldHVybiByZXR2YWw7Cj4gICAKPiAtCXJldHZhbCA9ICBhbmFsb2dpeF9kcF9yZWFkX2J5dGVz X2Zyb21fZHBjZChkcCwKPiAtCQkJRFBfQURKVVNUX1JFUVVFU1RfTEFORTBfMSwgMiwgYWRqdXN0 X3JlcXVlc3QpOwo+IC0JaWYgKHJldHZhbCkKPiArCXJldHZhbCA9IGRybV9kcF9kcGNkX3JlYWQo JmRwLT5hdXgsIERQX0FESlVTVF9SRVFVRVNUX0xBTkUwXzEsCj4gKwkJCQkgIGFkanVzdF9yZXF1 ZXN0LCAyKTsKPiArCWlmIChyZXR2YWwgPCAwKQo+ICAgCQlyZXR1cm4gcmV0dmFsOwo+ICAgCj4g ICAJaWYgKGFuYWxvZ2l4X2RwX2Nsb2NrX3JlY292ZXJ5X29rKGxpbmtfc3RhdHVzLCBsYW5lX2Nv dW50KSA9PSAwKSB7Cj4gICAJCS8qIHNldCB0cmFpbmluZyBwYXR0ZXJuIDIgZm9yIEVRICovCj4g ICAJCWFuYWxvZ2l4X2RwX3NldF90cmFpbmluZ19wYXR0ZXJuKGRwLCBUUkFJTklOR19QVE4yKTsK PiAgIAo+IC0JCXJldHZhbCA9IGFuYWxvZ2l4X2RwX3dyaXRlX2J5dGVfdG9fZHBjZChkcCwKPiAt CQkJCURQX1RSQUlOSU5HX1BBVFRFUk5fU0VULAo+IC0JCQkJRFBfTElOS19TQ1JBTUJMSU5HX0RJ U0FCTEUgfAo+IC0JCQkJRFBfVFJBSU5JTkdfUEFUVEVSTl8yKTsKPiAtCQlpZiAocmV0dmFsKQo+ ICsJCXJldHZhbCA9IGRybV9kcF9kcGNkX3dyaXRlYigmZHAtPmF1eCwgRFBfVFJBSU5JTkdfUEFU VEVSTl9TRVQsCj4gKwkJCQkJICAgIERQX0xJTktfU0NSQU1CTElOR19ESVNBQkxFIHwKPiArCQkJ CQkJRFBfVFJBSU5JTkdfUEFUVEVSTl8yKTsKCmRpdHRvCgo+ICsJCWlmIChyZXR2YWwgPCAwKQo+ ICAgCQkJcmV0dXJuIHJldHZhbDsKPiAgIAo+ICAgCQlkZXZfaW5mbyhkcC0+ZGV2LCAiTGluayBU cmFpbmluZyBDbG9jayBSZWNvdmVyeSBzdWNjZXNzXG4iKTsKPiBAQCAtNTU5LDEzICs0MzEsMTIg QEAgc3RhdGljIGludCBhbmFsb2dpeF9kcF9wcm9jZXNzX2Nsb2NrX3JlY292ZXJ5KHN0cnVjdCBh bmFsb2dpeF9kcF9kZXZpY2UgKmRwKQo+ICAgCQlhbmFsb2dpeF9kcF9zZXRfbGFuZV9saW5rX3Ry YWluaW5nKGRwLAo+ICAgCQkJZHAtPmxpbmtfdHJhaW4udHJhaW5pbmdfbGFuZVtsYW5lXSwgbGFu ZSk7Cj4gICAKPiAtCXJldHZhbCA9IGFuYWxvZ2l4X2RwX3dyaXRlX2J5dGVzX3RvX2RwY2QoZHAs Cj4gLQkJCURQX1RSQUlOSU5HX0xBTkUwX1NFVCwgbGFuZV9jb3VudCwKPiAtCQkJZHAtPmxpbmtf dHJhaW4udHJhaW5pbmdfbGFuZSk7Cj4gLQlpZiAocmV0dmFsKQo+ICsJcmV0dmFsID0gZHJtX2Rw X2RwY2Rfd3JpdGUoJmRwLT5hdXgsIERQX1RSQUlOSU5HX0xBTkUwX1NFVCwKPiArCQkJCSAgIGRw LT5saW5rX3RyYWluLnRyYWluaW5nX2xhbmUsIGxhbmVfY291bnQpOwo+ICsJaWYgKHJldHZhbCA8 IDApCj4gICAJCXJldHVybiByZXR2YWw7Cj4gICAKPiAtCXJldHVybiByZXR2YWw7Cj4gKwlyZXR1 cm4gMDsKPiAgIH0KPiAgIAo+ICAgc3RhdGljIGludCBhbmFsb2dpeF9kcF9wcm9jZXNzX2VxdWFs aXplcl90cmFpbmluZyhzdHJ1Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpkcCkKPiBAQCAtNTc4LDkg KzQ0OSw4IEBAIHN0YXRpYyBpbnQgYW5hbG9naXhfZHBfcHJvY2Vzc19lcXVhbGl6ZXJfdHJhaW5p bmcoc3RydWN0IGFuYWxvZ2l4X2RwX2RldmljZSAqZHApCj4gICAKPiAgIAlsYW5lX2NvdW50ID0g ZHAtPmxpbmtfdHJhaW4ubGFuZV9jb3VudDsKPiAgIAo+IC0JcmV0dmFsID0gYW5hbG9naXhfZHBf cmVhZF9ieXRlc19mcm9tX2RwY2QoZHAsCj4gLQkJCURQX0xBTkUwXzFfU1RBVFVTLCAyLCBsaW5r X3N0YXR1cyk7Cj4gLQlpZiAocmV0dmFsKQo+ICsJcmV0dmFsID0gZHJtX2RwX2RwY2RfcmVhZCgm ZHAtPmF1eCwgRFBfTEFORTBfMV9TVEFUVVMsIGxpbmtfc3RhdHVzLCAyKTsKPiArCWlmIChyZXR2 YWwgPCAwKQo+ICAgCQlyZXR1cm4gcmV0dmFsOwo+ICAgCj4gICAJaWYgKGFuYWxvZ2l4X2RwX2Ns b2NrX3JlY292ZXJ5X29rKGxpbmtfc3RhdHVzLCBsYW5lX2NvdW50KSkgewo+IEBAIC01ODgsMTQg KzQ1OCwxMyBAQCBzdGF0aWMgaW50IGFuYWxvZ2l4X2RwX3Byb2Nlc3NfZXF1YWxpemVyX3RyYWlu aW5nKHN0cnVjdCBhbmFsb2dpeF9kcF9kZXZpY2UgKmRwKQo+ICAgCQlyZXR1cm4gLUVJTzsKPiAg IAl9Cj4gICAKPiAtCXJldHZhbCA9IGFuYWxvZ2l4X2RwX3JlYWRfYnl0ZXNfZnJvbV9kcGNkKGRw LAo+IC0JCQlEUF9BREpVU1RfUkVRVUVTVF9MQU5FMF8xLCAyLCBhZGp1c3RfcmVxdWVzdCk7Cj4g LQlpZiAocmV0dmFsKQo+ICsJcmV0dmFsID0gZHJtX2RwX2RwY2RfcmVhZCgmZHAtPmF1eCwgRFBf QURKVVNUX1JFUVVFU1RfTEFORTBfMSwgYWRqdXN0X3JlcXVlc3QsIDIpOwo+ICsJaWYgKHJldHZh bCA8IDApCj4gICAJCXJldHVybiByZXR2YWw7Cj4gICAKPiAtCXJldHZhbCA9IGFuYWxvZ2l4X2Rw X3JlYWRfYnl0ZV9mcm9tX2RwY2QoZHAsCj4gLQkJCURQX0xBTkVfQUxJR05fU1RBVFVTX1VQREFU RUQsICZsaW5rX2FsaWduKTsKPiAtCWlmIChyZXR2YWwpCj4gKwlyZXR2YWwgPSBkcm1fZHBfZHBj ZF9yZWFkYigmZHAtPmF1eCwgRFBfTEFORV9BTElHTl9TVEFUVVNfVVBEQVRFRCwKPiArCQkJCSAg ICZsaW5rX2FsaWduKTsKPiArCWlmIChyZXR2YWwgPCAwKQo+ICAgCQlyZXR1cm4gcmV0dmFsOwo+ ICAgCj4gICAJYW5hbG9naXhfZHBfZ2V0X2FkanVzdF90cmFpbmluZ19sYW5lKGRwLCBhZGp1c3Rf cmVxdWVzdCk7Cj4gQEAgLTYzNiwxMCArNTA1LDEyIEBAIHN0YXRpYyBpbnQgYW5hbG9naXhfZHBf cHJvY2Vzc19lcXVhbGl6ZXJfdHJhaW5pbmcoc3RydWN0IGFuYWxvZ2l4X2RwX2RldmljZSAqZHAp Cj4gICAJCWFuYWxvZ2l4X2RwX3NldF9sYW5lX2xpbmtfdHJhaW5pbmcoZHAsCj4gICAJCQlkcC0+ bGlua190cmFpbi50cmFpbmluZ19sYW5lW2xhbmVdLCBsYW5lKTsKPiAgIAo+IC0JcmV0dmFsID0g YW5hbG9naXhfZHBfd3JpdGVfYnl0ZXNfdG9fZHBjZChkcCwgRFBfVFJBSU5JTkdfTEFORTBfU0VU LAo+IC0JCQlsYW5lX2NvdW50LCBkcC0+bGlua190cmFpbi50cmFpbmluZ19sYW5lKTsKPiArCXJl dHZhbCA9IGRybV9kcF9kcGNkX3dyaXRlKCZkcC0+YXV4LCBEUF9UUkFJTklOR19MQU5FMF9TRVQs Cj4gKwkJCQkgICBkcC0+bGlua190cmFpbi50cmFpbmluZ19sYW5lLCBsYW5lX2NvdW50KTsKPiAr CWlmIChyZXR2YWwgPCAwKQo+ICsJCXJldHVybiByZXR2YWw7Cj4gICAKPiAtCXJldHVybiByZXR2 YWw7Cj4gKwlyZXR1cm4gMDsKPiAgIH0KPiAgIAo+ICAgc3RhdGljIHZvaWQgYW5hbG9naXhfZHBf Z2V0X21heF9yeF9iYW5kd2lkdGgoc3RydWN0IGFuYWxvZ2l4X2RwX2RldmljZSAqZHAsCj4gQEAg LTY1Myw3ICs1MjQsNyBAQCBzdGF0aWMgdm9pZCBhbmFsb2dpeF9kcF9nZXRfbWF4X3J4X2JhbmR3 aWR0aChzdHJ1Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpkcCwKPiAgIAkgKiBGb3IgRFAgcmV2LjEu MiwgTWF4aW11bSBsaW5rIHJhdGUgb2YgTWFpbiBMaW5rIGxhbmVzCj4gICAJICogMHgwNiA9IDEu NjIgR2JwcywgMHgwYSA9IDIuNyBHYnBzLCAweDE0ID0gNS40R2Jwcwo+ICAgCSAqLwo+IC0JYW5h bG9naXhfZHBfcmVhZF9ieXRlX2Zyb21fZHBjZChkcCwgRFBfTUFYX0xJTktfUkFURSwgJmRhdGEp Owo+ICsJZHJtX2RwX2RwY2RfcmVhZGIoJmRwLT5hdXgsIERQX01BWF9MSU5LX1JBVEUsICZkYXRh KTsKPiAgIAkqYmFuZHdpZHRoID0gZGF0YTsKPiAgIH0KPiAgIAo+IEBAIC02NjYsNyArNTM3LDcg QEAgc3RhdGljIHZvaWQgYW5hbG9naXhfZHBfZ2V0X21heF9yeF9sYW5lX2NvdW50KHN0cnVjdCBh bmFsb2dpeF9kcF9kZXZpY2UgKmRwLAo+ICAgCSAqIEZvciBEUCByZXYuMS4xLCBNYXhpbXVtIG51 bWJlciBvZiBNYWluIExpbmsgbGFuZXMKPiAgIAkgKiAweDAxID0gMSBsYW5lLCAweDAyID0gMiBs YW5lcywgMHgwNCA9IDQgbGFuZXMKPiAgIAkgKi8KPiAtCWFuYWxvZ2l4X2RwX3JlYWRfYnl0ZV9m cm9tX2RwY2QoZHAsIERQX01BWF9MQU5FX0NPVU5ULCAmZGF0YSk7Cj4gKwlkcm1fZHBfZHBjZF9y ZWFkYigmZHAtPmF1eCwgRFBfTUFYX0xBTkVfQ09VTlQsICZkYXRhKTsKPiAgIAkqbGFuZV9jb3Vu dCA9IERQQ0RfTUFYX0xBTkVfQ09VTlQoZGF0YSk7Cj4gICB9Cj4gICAKPiBAQCAtODM1LDE5ICs3 MDYsMTUgQEAgc3RhdGljIHZvaWQgYW5hbG9naXhfZHBfZW5hYmxlX3NjcmFtYmxlKHN0cnVjdCBh bmFsb2dpeF9kcF9kZXZpY2UgKmRwLAo+ICAgCWlmIChlbmFibGUpIHsKPiAgIAkJYW5hbG9naXhf ZHBfZW5hYmxlX3NjcmFtYmxpbmcoZHApOwo+ICAgCj4gLQkJYW5hbG9naXhfZHBfcmVhZF9ieXRl X2Zyb21fZHBjZChkcCwgRFBfVFJBSU5JTkdfUEFUVEVSTl9TRVQsCj4gLQkJCQkJCSZkYXRhKTsK PiAtCQlhbmFsb2dpeF9kcF93cml0ZV9ieXRlX3RvX2RwY2QoZHAsCj4gLQkJCURQX1RSQUlOSU5H X1BBVFRFUk5fU0VULAo+IC0JCQkodTgpKGRhdGEgJiB+RFBfTElOS19TQ1JBTUJMSU5HX0RJU0FC TEUpKTsKPiArCQlkcm1fZHBfZHBjZF9yZWFkYigmZHAtPmF1eCwgRFBfVFJBSU5JTkdfUEFUVEVS Tl9TRVQsICZkYXRhKTsKPiArCQlkcm1fZHBfZHBjZF93cml0ZWIoJmRwLT5hdXgsIERQX1RSQUlO SU5HX1BBVFRFUk5fU0VULAo+ICsJCQkJICAgKHU4KShkYXRhICYgfkRQX0xJTktfU0NSQU1CTElO R19ESVNBQkxFKSk7Cj4gICAJfSBlbHNlIHsKPiAgIAkJYW5hbG9naXhfZHBfZGlzYWJsZV9zY3Jh bWJsaW5nKGRwKTsKPiAgIAo+IC0JCWFuYWxvZ2l4X2RwX3JlYWRfYnl0ZV9mcm9tX2RwY2QoZHAs IERQX1RSQUlOSU5HX1BBVFRFUk5fU0VULAo+IC0JCQkJCQkmZGF0YSk7Cj4gLQkJYW5hbG9naXhf ZHBfd3JpdGVfYnl0ZV90b19kcGNkKGRwLAo+IC0JCQlEUF9UUkFJTklOR19QQVRURVJOX1NFVCwK PiAtCQkJKHU4KShkYXRhIHwgRFBfTElOS19TQ1JBTUJMSU5HX0RJU0FCTEUpKTsKPiArCQlkcm1f ZHBfZHBjZF9yZWFkYigmZHAtPmF1eCwgRFBfVFJBSU5JTkdfUEFUVEVSTl9TRVQsICZkYXRhKTsK PiArCQlkcm1fZHBfZHBjZF93cml0ZWIoJmRwLT5hdXgsIERQX1RSQUlOSU5HX1BBVFRFUk5fU0VU LAo+ICsJCQkJICAgKHU4KShkYXRhIHwgRFBfTElOS19TQ1JBTUJMSU5HX0RJU0FCTEUpKTsKPiAg IAl9Cj4gICB9Cj4gICAKPiBAQCAtOTI2LDEyICs3OTMsMTEgQEAgc3RhdGljIHZvaWQgYW5hbG9n aXhfZHBfY29tbWl0KHN0cnVjdCBhbmFsb2dpeF9kcF9kZXZpY2UgKmRwKQo+ICAgaW50IGFuYWxv Z2l4X2RwX2dldF9tb2RlcyhzdHJ1Y3QgZHJtX2Nvbm5lY3RvciAqY29ubmVjdG9yKQo+ICAgewo+ ICAgCXN0cnVjdCBhbmFsb2dpeF9kcF9kZXZpY2UgKmRwID0gdG9fZHAoY29ubmVjdG9yKTsKPiAt CXN0cnVjdCBlZGlkICplZGlkID0gKHN0cnVjdCBlZGlkICopZHAtPmVkaWQ7Cj4gICAJaW50IG51 bV9tb2RlcyA9IDA7Cj4gICAKPiAtCWlmIChhbmFsb2dpeF9kcF9oYW5kbGVfZWRpZChkcCkgPT0g MCkgewo+IC0JCWRybV9tb2RlX2Nvbm5lY3Rvcl91cGRhdGVfZWRpZF9wcm9wZXJ0eSgmZHAtPmNv bm5lY3RvciwgZWRpZCk7Cj4gLQkJbnVtX21vZGVzICs9IGRybV9hZGRfZWRpZF9tb2RlcygmZHAt PmNvbm5lY3RvciwgZWRpZCk7Cj4gKwlpZiAoKGRwLT5lZGlkID0gZHJtX2dldF9lZGlkKGNvbm5l Y3RvciwgJmRwLT5hdXguZGRjKSkpIHsKCllvdSBjb3VsZCByZW1vdmUgdGhlICctPmVkaWQnIHZh cmlhYmxlIGZyb20gc3RydWN0IGFuYWxvZ2l4X2RwX2RldmljZSwgCmNhdXNlIHdlIGRvbid0IG5l ZWQgdGhpcyBpbmZvcm1hdGlvbiBhdCBvdGhlciBwbGFjZXMuIFlvdSBuZWVkIHRvIGZyZWUgCnRo ZSBlZGlkIGFmdGVyIHBhcnNlZCBpdCwgY2F1c2UgZWFjaCB0aW1lIHdoZW4geW91IGNhbGwgZHJt X2dldF9lZGlkKCkgCmhlbHBlciwgaXQgd291bGQgbWFsbG9jIGEgbmV3IHNwYWNlIGZvciAnZWRp ZCcuIEJlc2lkZXMgSSB3b3VsZCBwcmVmZXIgCm1vdmUgdGhlIHN0YXRlbWVudCBvdXQgb2YgdGhl IGNvbmRpdGlvbi4KCiAgICAgc3RydWN0IGVkaWQgKmVkaWQ7CgogICAgIGVkaWQgPSBkcm1fZ2V0 X2VkaWQoY29ubmVjdG9yLCAmZHAtPmF1eC5kZGMpOwogICAgIGlmIChlZGlkKSB7CmRybV9tb2Rl X2Nvbm5lY3Rvcl91cGRhdGVfZWRpZF9wcm9wZXJ0eSgmZHAtPmNvbm5lY3RvciwgZWRpZCk7CiAg ICAgICAgIG51bV9tb2RlcyArPSBkcm1fYWRkX2VkaWRfbW9kZXMoJmRwLT5jb25uZWN0b3IsIGVk aWQpOwogICAgICAgICBrZnJlZShlZGlkKTsKICAgICB9Cgo+ICsJCWRybV9tb2RlX2Nvbm5lY3Rv cl91cGRhdGVfZWRpZF9wcm9wZXJ0eSgmZHAtPmNvbm5lY3RvciwgZHAtPmVkaWQpOwo+ICsJCW51 bV9tb2RlcyArPSBkcm1fYWRkX2VkaWRfbW9kZXMoJmRwLT5jb25uZWN0b3IsIGRwLT5lZGlkKTsK PiAgIAl9Cj4gICAKPiAgIAlpZiAoZHAtPnBsYXRfZGF0YS0+cGFuZWwpCj4gQEAgLTk4NCw2ICs4 NTAsMTM4IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgZHJtX2Nvbm5lY3Rvcl9mdW5jcyBhbmFsb2dp eF9kcF9jb25uZWN0b3JfZnVuY3MgPSB7Cj4gICAJLmF0b21pY19kZXN0cm95X3N0YXRlID0gZHJt X2F0b21pY19oZWxwZXJfY29ubmVjdG9yX2Rlc3Ryb3lfc3RhdGUsCj4gICB9Owo+ICAgCj4gK3N0 YXRpYyBzc2l6ZV90IGFuYWxvZ2l4X2RwYXV4X3RyYW5zZmVyKHN0cnVjdCBkcm1fZHBfYXV4ICph dXgsCj4gKwkJCQkgICAgICAgc3RydWN0IGRybV9kcF9hdXhfbXNnICptc2cpCj4gK3sKPiArCXN0 cnVjdCBhbmFsb2dpeF9kcF9kZXZpY2UgKmRwID0gdG9fZHAoYXV4KTsKPiArCXUzMiByZWc7Cj4g Kwl1OCAqYnVmZmVyID0gbXNnLT5idWZmZXI7Cj4gKwlpbnQgdGltZW91dF9sb29wID0gMDsKPiAr CXVuc2lnbmVkIGludCBpOwo+ICsJaW50IHJldHZhbCA9IDA7Cj4gKwo+ICsJLyogQnVmZmVyIHNp emUgb2YgQVVYIENIIGlzIDE2IGJ5dGVzICovCj4gKwlpZiAoV0FSTl9PTihtc2ctPnNpemUgPiAx NikpCj4gKwkJcmV0dXJuIC1FMkJJRzsKPiArCj4gKwkvKiBDbGVhciBBVVggQ0ggZGF0YSBidWZm ZXIgKi8KPiArCXJlZyA9IEJVRl9DTFI7Cj4gKwl3cml0ZWwocmVnLCBkcC0+cmVnX2Jhc2UgKyBB TkFMT0dJWF9EUF9CVUZGRVJfREFUQV9DVEwpOwo+ICsKPiArCXN3aXRjaCAobXNnLT5yZXF1ZXN0 ICYgfkRQX0FVWF9JMkNfTU9UKSB7Cj4gKwljYXNlIERQX0FVWF9JMkNfV1JJVEU6Cj4gKwkJcmVn ID0gQVVYX1RYX0NPTU1fV1JJVEUgfCBBVVhfVFhfQ09NTV9JMkNfVFJBTlNBQ1RJT047Cj4gKwkJ aWYgKG1zZy0+cmVxdWVzdCAmIERQX0FVWF9JMkNfTU9UKQo+ICsJCQlyZWcgfD0gQVVYX1RYX0NP TU1fTU9UOwo+ICsKPiArCQlicmVhazsKPiArCj4gKwljYXNlIERQX0FVWF9JMkNfUkVBRDoKPiAr CQlyZWcgPSBBVVhfVFhfQ09NTV9SRUFEIHwgQVVYX1RYX0NPTU1fSTJDX1RSQU5TQUNUSU9OOwo+ ICsJCWlmIChtc2ctPnJlcXVlc3QgJiBEUF9BVVhfSTJDX01PVCkKPiArCQkJcmVnIHw9IEFVWF9U WF9DT01NX01PVDsKPiArCj4gKwkJYnJlYWs7Cj4gKwo+ICsJY2FzZSBEUF9BVVhfTkFUSVZFX1dS SVRFOgo+ICsJCXJlZyA9IEFVWF9UWF9DT01NX1dSSVRFIHwgQVVYX1RYX0NPTU1fRFBfVFJBTlNB Q1RJT047Cj4gKwkJYnJlYWs7Cj4gKwo+ICsJY2FzZSBEUF9BVVhfTkFUSVZFX1JFQUQ6Cj4gKwkJ cmVnID0gQVVYX1RYX0NPTU1fUkVBRCB8IEFVWF9UWF9DT01NX0RQX1RSQU5TQUNUSU9OOwo+ICsJ CWJyZWFrOwo+ICsKPiArCWRlZmF1bHQ6Cj4gKwkJcmV0dXJuIC1FSU5WQUw7Cj4gKwl9Cj4gKwo+ ICsJcmVnIHw9IEFVWF9MRU5HVEgobXNnLT5zaXplKTsKPiArCXdyaXRlbChyZWcsIGRwLT5yZWdf YmFzZSArIEFOQUxPR0lYX0RQX0FVWF9DSF9DVExfMSk7Cj4gKwo+ICsJLyogU2VsZWN0IERQQ0Qg ZGV2aWNlIGFkZHJlc3MgKi8KPiArCXJlZyA9IEFVWF9BRERSXzdfMChtc2ctPmFkZHJlc3MpOwo+ ICsJd3JpdGVsKHJlZywgZHAtPnJlZ19iYXNlICsgQU5BTE9HSVhfRFBfQVVYX0FERFJfN18wKTsK PiArCXJlZyA9IEFVWF9BRERSXzE1XzgobXNnLT5hZGRyZXNzKTsKPiArCXdyaXRlbChyZWcsIGRw LT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0FVWF9BRERSXzE1XzgpOwo+ICsJcmVnID0gQVVYX0FE RFJfMTlfMTYobXNnLT5hZGRyZXNzKTsKPiArCXdyaXRlbChyZWcsIGRwLT5yZWdfYmFzZSArIEFO QUxPR0lYX0RQX0FVWF9BRERSXzE5XzE2KTsKPiArCj4gKwlpZiAoKG1zZy0+cmVxdWVzdCAmIERQ X0FVWF9JMkNfUkVBRCkgPT0gMCkgewo+ICsJCWZvciAoaSA9IDA7IGkgPCBtc2ctPnNpemU7IGkr Kykgewo+ICsJCQlyZWcgPSBidWZmZXJbaV07Cj4gKwkJCXdyaXRlbChyZWcsIGRwLT5yZWdfYmFz ZSArIEFOQUxPR0lYX0RQX0JVRl9EQVRBXzAgKwo+ICsJCQkgICAgICAgNCAqIGkpOwo+ICsJCQly ZXR2YWwrKzsKPiArCQl9Cj4gKwl9Cj4gKwo+ICsJLyogRW5hYmxlIEFVWCBDSCBvcGVyYXRpb24g Ki8KPiArCXJlZyA9IDA7Cj4gKwo+ICsJLyogWmVyby1zaXplZCBtZXNzYWdlcyBzcGVjaWZ5IGFk ZHJlc3Mtb25seSB0cmFuc2FjdGlvbnMuICovCj4gKwlpZiAobXNnLT5zaXplIDwgMSkKPiArCQly ZWcgfD0gQUREUl9PTkxZOwo+ICsKPiArCXJlZyB8PSBBVVhfRU47Cj4gKwl3cml0ZWwocmVnLCBk cC0+cmVnX2Jhc2UgKyBBTkFMT0dJWF9EUF9BVVhfQ0hfQ1RMXzIpOwo+ICsKPiArCS8qIElzIEFV WCBDSCBjb21tYW5kIHJlcGx5IHJlY2VpdmVkPyAqLwo+ICsJLyogVE9ETzogV2FpdCBmb3IgYW4g aW50ZXJydXB0IGluc3RlYWQgb2YgbG9vcGluZz8gKi8KPiArCXJlZyA9IHJlYWRsKGRwLT5yZWdf YmFzZSArIEFOQUxPR0lYX0RQX0lOVF9TVEEpOwo+ICsJd2hpbGUgKCEocmVnICYgUlBMWV9SRUNF SVYpKSB7Cj4gKwkJdGltZW91dF9sb29wKys7Cj4gKwkJaWYgKERQX1RJTUVPVVRfTE9PUF9DT1VO VCA8IHRpbWVvdXRfbG9vcCkgewo+ICsJCQlkZXZfZXJyKGRwLT5kZXYsICJBVVggQ0ggY29tbWFu ZCByZXBseSBmYWlsZWQhXG4iKTsKPiArCQkJcmV0dXJuIC1FVElNRURPVVQ7Cj4gKwkJfQo+ICsJ CXJlZyA9IHJlYWRsKGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0lOVF9TVEEpOwo+ICsJCXVz bGVlcF9yYW5nZSgxMCwgMTEpOwo+ICsJfQo+ICsKPiArCS8qIENsZWFyIGludGVycnVwdCBzb3Vy Y2UgZm9yIEFVWCBDSCBjb21tYW5kIHJlcGx5ICovCj4gKwl3cml0ZWwoUlBMWV9SRUNFSVYsIGRw LT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0lOVF9TVEEpOwo+ICsKPiArCS8qIENsZWFyIGludGVy cnVwdCBzb3VyY2UgZm9yIEFVWCBDSCBhY2Nlc3MgZXJyb3IgKi8KPiArCXJlZyA9IHJlYWRsKGRw LT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0lOVF9TVEEpOwo+ICsJaWYgKHJlZyAmIEFVWF9FUlIp IHsKPiArCQl3cml0ZWwoQVVYX0VSUiwgZHAtPnJlZ19iYXNlICsgQU5BTE9HSVhfRFBfSU5UX1NU QSk7Cj4gKwkJcmV0dXJuIC1FUkVNT1RFSU87Cj4gKwl9Cj4gKwo+ICsJLyogQ2hlY2sgQVVYIENI IGVycm9yIGFjY2VzcyBzdGF0dXMgKi8KPiArCXJlZyA9IHJlYWRsKGRwLT5yZWdfYmFzZSArIEFO QUxPR0lYX0RQX0FVWF9DSF9TVEEpOwo+ICsJaWYgKChyZWcgJiBBVVhfU1RBVFVTX01BU0spICE9 IDApIHsKPiArCQlkZXZfZXJyKGRwLT5kZXYsICJBVVggQ0ggZXJyb3IgaGFwcGVuczogJWRcblxu IiwKPiArCQkJcmVnICYgQVVYX1NUQVRVU19NQVNLKTsKPiArCQlyZXR1cm4gLUVSRU1PVEVJTzsK PiArCX0KPiArCj4gKwlpZiAobXNnLT5yZXF1ZXN0ICYgRFBfQVVYX0kyQ19SRUFEKSB7Cj4gKwkJ Zm9yIChpID0gMDsgaSA8IG1zZy0+c2l6ZTsgaSsrKSB7Cj4gKwkJCXJlZyA9IHJlYWRsKGRwLT5y ZWdfYmFzZSArIEFOQUxPR0lYX0RQX0JVRl9EQVRBXzAgKwo+ICsJCQkJICAgIDQgKiBpKTsKPiAr CQkJYnVmZmVyW2ldID0gKHVuc2lnbmVkIGNoYXIpcmVnOwo+ICsJCQlyZXR2YWwrKzsKPiArCQl9 Cj4gKwl9Cj4gKwo+ICsJLyogQ2hlY2sgaWYgUnggc2VuZHMgZGVmZXIgKi8KPiArCXJlZyA9IHJl YWRsKGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0FVWF9SWF9DT01NKTsKPiArCWlmIChyZWcg PT0gQVVYX1JYX0NPTU1fQVVYX0RFRkVSKQo+ICsJCW1zZy0+cmVwbHkgPSBEUF9BVVhfTkFUSVZF X1JFUExZX0RFRkVSOwo+ICsJZWxzZSBpZiAocmVnID09IEFVWF9SWF9DT01NX0kyQ19ERUZFUikK PiArCQltc2ctPnJlcGx5ID0gRFBfQVVYX0kyQ19SRVBMWV9ERUZFUjsKPiArCWVsc2UgaWYgKCht c2ctPnJlcXVlc3QgJiB+RFBfQVVYX0kyQ19NT1QpID09IERQX0FVWF9JMkNfV1JJVEUgfHwKPiAr CQkgKG1zZy0+cmVxdWVzdCAmIH5EUF9BVVhfSTJDX01PVCkgPT0gRFBfQVVYX0kyQ19SRUFEKQo+ ICsJCW1zZy0+cmVwbHkgPSBEUF9BVVhfSTJDX1JFUExZX0FDSzsKPiArCWVsc2UgaWYgKChtc2ct PnJlcXVlc3QgJiB+RFBfQVVYX0kyQ19NT1QpID09IERQX0FVWF9OQVRJVkVfV1JJVEUgfHwKPiAr CQkgKG1zZy0+cmVxdWVzdCAmIH5EUF9BVVhfSTJDX01PVCkgPT0gRFBfQVVYX05BVElWRV9SRUFE KQo+ICsJCW1zZy0+cmVwbHkgPSBEUF9BVVhfTkFUSVZFX1JFUExZX0FDSzsKPiArCj4gKwlyZXR1 cm4gcmV0dmFsOwo+ICt9CgpXb3VsZCB5b3UgbGlrZSB0byBtb3ZlIHRoaXMgZnVuY3Rpb24gdG8g J2FuYWxvZ2l4X2RwX3JlZy5jJyA/Cgo+ICsKPiArCj4gICBzdGF0aWMgaW50IGFuYWxvZ2l4X2Rw X2JyaWRnZV9hdHRhY2goc3RydWN0IGRybV9icmlkZ2UgKmJyaWRnZSkKPiAgIHsKPiAgIAlzdHJ1 Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpkcCA9IGJyaWRnZS0+ZHJpdmVyX3ByaXZhdGU7Cj4gQEAg LTEzNTUsNiArMTM1MywxNCBAQCBpbnQgYW5hbG9naXhfZHBfYmluZChzdHJ1Y3QgZGV2aWNlICpk ZXYsIHN0cnVjdCBkcm1fZGV2aWNlICpkcm1fZGV2LAo+ICAgCWRwLT5kcm1fZGV2ID0gZHJtX2Rl djsKPiAgIAlkcC0+ZW5jb2RlciA9IGRwLT5wbGF0X2RhdGEtPmVuY29kZXI7Cj4gICAKPiArCWRw LT5hdXgubmFtZSA9ICJEUC1BVVgiOwo+ICsJZHAtPmF1eC50cmFuc2ZlciA9IGFuYWxvZ2l4X2Rw YXV4X3RyYW5zZmVyOwo+ICsJZHAtPmF1eC5kZXYgPSAmcGRldi0+ZGV2Owo+ICsKPiArCXJldCA9 IGRybV9kcF9hdXhfcmVnaXN0ZXIoJmRwLT5hdXgpOwo+ICsJaWYgKHJldCkKPiArCQlnb3RvIGVy cl9kaXNhYmxlX3BtX3J1bnRpbWU7Cj4gKwo+ICAgCXJldCA9IGFuYWxvZ2l4X2RwX2NyZWF0ZV9i cmlkZ2UoZHJtX2RldiwgZHApOwo+ICAgCWlmIChyZXQpIHsKPiAgIAkJRFJNX0VSUk9SKCJmYWls ZWQgdG8gY3JlYXRlIGJyaWRnZSAoJWQpXG4iLCByZXQpOwo+IEBAIC0xMzg0LDYgKzEzOTAsOCBA QCB2b2lkIGFuYWxvZ2l4X2RwX3VuYmluZChzdHJ1Y3QgZGV2aWNlICpkZXYsIHN0cnVjdCBkZXZp Y2UgKm1hc3RlciwKPiAgIAl9Cj4gICAKPiAgIAlwbV9ydW50aW1lX2Rpc2FibGUoZGV2KTsKPiAr Cj4gKwlrZnJlZShkcC0+ZWRpZCk7CgpDb3VsZCByZW1vdmUgdGhpcyBmcmVlIGNvZGUKClRoYW5r cywKLSBZYWtpcgoKPiAgIH0KPiAgIEVYUE9SVF9TWU1CT0xfR1BMKGFuYWxvZ2l4X2RwX3VuYmlu ZCk7Cj4gICAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2JyaWRnZS9hbmFsb2dpeC9h bmFsb2dpeF9kcF9jb3JlLmggYi9kcml2ZXJzL2dwdS9kcm0vYnJpZGdlL2FuYWxvZ2l4L2FuYWxv Z2l4X2RwX2NvcmUuaAo+IGluZGV4IGI0NTYzODA0M2VjNC4uMjdlYjI3YTcxODAyIDEwMDY0NAo+ IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9icmlkZ2UvYW5hbG9naXgvYW5hbG9naXhfZHBfY29yZS5o Cj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2JyaWRnZS9hbmFsb2dpeC9hbmFsb2dpeF9kcF9jb3Jl LmgKPiBAQCAtMjAsMTUgKzIwLDYgQEAKPiAgICNkZWZpbmUgTUFYX0NSX0xPT1AgNQo+ICAgI2Rl ZmluZSBNQVhfRVFfTE9PUCA1Cj4gICAKPiAtLyogSTJDIEVESUQgQ2hpcCBJRCwgU2xhdmUgQWRk cmVzcyAqLwo+IC0jZGVmaW5lIEkyQ19FRElEX0RFVklDRV9BRERSCQkJMHg1MAo+IC0jZGVmaW5l IEkyQ19FX0VESURfREVWSUNFX0FERFIJCQkweDMwCj4gLQo+IC0jZGVmaW5lIEVESURfQkxPQ0tf TEVOR1RICQkJMHg4MAo+IC0jZGVmaW5lIEVESURfSEVBREVSX1BBVFRFUk4JCQkweDAwCj4gLSNk ZWZpbmUgRURJRF9FWFRFTlNJT05fRkxBRwkJCTB4N2UKPiAtI2RlZmluZSBFRElEX0NIRUNLU1VN CQkJCTB4N2YKPiAtCj4gICAvKiBEUF9NQVhfTEFORV9DT1VOVCAqLwo+ICAgI2RlZmluZSBEUENE X0VOSEFOQ0VEX0ZSQU1FX0NBUCh4KQkJKCgoeCkgPj4gNykgJiAweDEpCj4gICAjZGVmaW5lIERQ Q0RfTUFYX0xBTkVfQ09VTlQoeCkJCQkoKHgpICYgMHgxZikKPiBAQCAtMTY2LDYgKzE1Nyw3IEBA IHN0cnVjdCBhbmFsb2dpeF9kcF9kZXZpY2Ugewo+ICAgCXN0cnVjdCBkcm1fZGV2aWNlCSpkcm1f ZGV2Owo+ICAgCXN0cnVjdCBkcm1fY29ubmVjdG9yCWNvbm5lY3RvcjsKPiAgIAlzdHJ1Y3QgZHJt X2JyaWRnZQkqYnJpZGdlOwo+ICsJc3RydWN0IGRybV9kcF9hdXggICAgICAgYXV4Owo+ICAgCXN0 cnVjdCBjbGsJCSpjbG9jazsKPiAgIAl1bnNpZ25lZCBpbnQJCWlycTsKPiAgIAl2b2lkIF9faW9t ZW0JCSpyZWdfYmFzZTsKPiBAQCAtMTc2LDcgKzE2OCw3IEBAIHN0cnVjdCBhbmFsb2dpeF9kcF9k ZXZpY2Ugewo+ICAgCWludAkJCWRwbXNfbW9kZTsKPiAgIAlpbnQJCQlocGRfZ3BpbzsKPiAgIAli b29sICAgICAgICAgICAgICAgICAgICBmb3JjZV9ocGQ7Cj4gLQl1bnNpZ25lZCBjaGFyICAgICAg ICAgICBlZGlkW0VESURfQkxPQ0tfTEVOR1RIICogMl07Cj4gKwlzdHJ1Y3QgZWRpZAkJKmVkaWQ7 Cj4gICAKPiAgIAlzdHJ1Y3QgYW5hbG9naXhfZHBfcGxhdF9kYXRhICpwbGF0X2RhdGE7Cj4gICB9 Owo+IEBAIC0yMDYsMzMgKzE5OCw2IEBAIHZvaWQgYW5hbG9naXhfZHBfcmVzZXRfYXV4KHN0cnVj dCBhbmFsb2dpeF9kcF9kZXZpY2UgKmRwKTsKPiAgIHZvaWQgYW5hbG9naXhfZHBfaW5pdF9hdXgo c3RydWN0IGFuYWxvZ2l4X2RwX2RldmljZSAqZHApOwo+ICAgaW50IGFuYWxvZ2l4X2RwX2dldF9w bHVnX2luX3N0YXR1cyhzdHJ1Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpkcCk7Cj4gICB2b2lkIGFu YWxvZ2l4X2RwX2VuYWJsZV9zd19mdW5jdGlvbihzdHJ1Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpk cCk7Cj4gLWludCBhbmFsb2dpeF9kcF9zdGFydF9hdXhfdHJhbnNhY3Rpb24oc3RydWN0IGFuYWxv Z2l4X2RwX2RldmljZSAqZHApOwo+IC1pbnQgYW5hbG9naXhfZHBfd3JpdGVfYnl0ZV90b19kcGNk KHN0cnVjdCBhbmFsb2dpeF9kcF9kZXZpY2UgKmRwLAo+IC0JCQkJICAgdW5zaWduZWQgaW50IHJl Z19hZGRyLAo+IC0JCQkJICAgdW5zaWduZWQgY2hhciBkYXRhKTsKPiAtaW50IGFuYWxvZ2l4X2Rw X3JlYWRfYnl0ZV9mcm9tX2RwY2Qoc3RydWN0IGFuYWxvZ2l4X2RwX2RldmljZSAqZHAsCj4gLQkJ CQkgICAgdW5zaWduZWQgaW50IHJlZ19hZGRyLAo+IC0JCQkJICAgIHVuc2lnbmVkIGNoYXIgKmRh dGEpOwo+IC1pbnQgYW5hbG9naXhfZHBfd3JpdGVfYnl0ZXNfdG9fZHBjZChzdHJ1Y3QgYW5hbG9n aXhfZHBfZGV2aWNlICpkcCwKPiAtCQkJCSAgICB1bnNpZ25lZCBpbnQgcmVnX2FkZHIsCj4gLQkJ CQkgICAgdW5zaWduZWQgaW50IGNvdW50LAo+IC0JCQkJICAgIHVuc2lnbmVkIGNoYXIgZGF0YVtd KTsKPiAtaW50IGFuYWxvZ2l4X2RwX3JlYWRfYnl0ZXNfZnJvbV9kcGNkKHN0cnVjdCBhbmFsb2dp eF9kcF9kZXZpY2UgKmRwLAo+IC0JCQkJICAgICB1bnNpZ25lZCBpbnQgcmVnX2FkZHIsCj4gLQkJ CQkgICAgIHVuc2lnbmVkIGludCBjb3VudCwKPiAtCQkJCSAgICAgdW5zaWduZWQgY2hhciBkYXRh W10pOwo+IC1pbnQgYW5hbG9naXhfZHBfc2VsZWN0X2kyY19kZXZpY2Uoc3RydWN0IGFuYWxvZ2l4 X2RwX2RldmljZSAqZHAsCj4gLQkJCQkgIHVuc2lnbmVkIGludCBkZXZpY2VfYWRkciwKPiAtCQkJ CSAgdW5zaWduZWQgaW50IHJlZ19hZGRyKTsKPiAtaW50IGFuYWxvZ2l4X2RwX3JlYWRfYnl0ZV9m cm9tX2kyYyhzdHJ1Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpkcCwKPiAtCQkJCSAgIHVuc2lnbmVk IGludCBkZXZpY2VfYWRkciwKPiAtCQkJCSAgIHVuc2lnbmVkIGludCByZWdfYWRkciwKPiAtCQkJ CSAgIHVuc2lnbmVkIGludCAqZGF0YSk7Cj4gLWludCBhbmFsb2dpeF9kcF9yZWFkX2J5dGVzX2Zy b21faTJjKHN0cnVjdCBhbmFsb2dpeF9kcF9kZXZpY2UgKmRwLAo+IC0JCQkJICAgIHVuc2lnbmVk IGludCBkZXZpY2VfYWRkciwKPiAtCQkJCSAgICB1bnNpZ25lZCBpbnQgcmVnX2FkZHIsCj4gLQkJ CQkgICAgdW5zaWduZWQgaW50IGNvdW50LAo+IC0JCQkJICAgIHVuc2lnbmVkIGNoYXIgZWRpZFtd KTsKPiAgIHZvaWQgYW5hbG9naXhfZHBfc2V0X2xpbmtfYmFuZHdpZHRoKHN0cnVjdCBhbmFsb2dp eF9kcF9kZXZpY2UgKmRwLCB1MzIgYnd0eXBlKTsKPiAgIHZvaWQgYW5hbG9naXhfZHBfZ2V0X2xp bmtfYmFuZHdpZHRoKHN0cnVjdCBhbmFsb2dpeF9kcF9kZXZpY2UgKmRwLCB1MzIgKmJ3dHlwZSk7 Cj4gICB2b2lkIGFuYWxvZ2l4X2RwX3NldF9sYW5lX2NvdW50KHN0cnVjdCBhbmFsb2dpeF9kcF9k ZXZpY2UgKmRwLCB1MzIgY291bnQpOwo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vYnJp ZGdlL2FuYWxvZ2l4L2FuYWxvZ2l4X2RwX3JlZy5jIGIvZHJpdmVycy9ncHUvZHJtL2JyaWRnZS9h bmFsb2dpeC9hbmFsb2dpeF9kcF9yZWcuYwo+IGluZGV4IDQ4MDMwZjBjZjQ5Ny4uZWFjNjFhYTQy MjRmIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9icmlkZ2UvYW5hbG9naXgvYW5hbG9n aXhfZHBfcmVnLmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vYnJpZGdlL2FuYWxvZ2l4L2FuYWxv Z2l4X2RwX3JlZy5jCj4gQEAgLTU4NSwzMzAgKzU4NSw2IEBAIGludCBhbmFsb2dpeF9kcF93cml0 ZV9ieXRlX3RvX2RwY2Qoc3RydWN0IGFuYWxvZ2l4X2RwX2RldmljZSAqZHAsCj4gICAJcmV0dXJu IHJldHZhbDsKPiAgIH0KPiAgIAo+IC1pbnQgYW5hbG9naXhfZHBfcmVhZF9ieXRlX2Zyb21fZHBj ZChzdHJ1Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpkcCwKPiAtCQkJCSAgICB1bnNpZ25lZCBpbnQg cmVnX2FkZHIsCj4gLQkJCQkgICAgdW5zaWduZWQgY2hhciAqZGF0YSkKPiAtewo+IC0JdTMyIHJl ZzsKPiAtCWludCBpOwo+IC0JaW50IHJldHZhbDsKPiAtCj4gLQlmb3IgKGkgPSAwOyBpIDwgMzsg aSsrKSB7Cj4gLQkJLyogQ2xlYXIgQVVYIENIIGRhdGEgYnVmZmVyICovCj4gLQkJcmVnID0gQlVG X0NMUjsKPiAtCQl3cml0ZWwocmVnLCBkcC0+cmVnX2Jhc2UgKyBBTkFMT0dJWF9EUF9CVUZGRVJf REFUQV9DVEwpOwo+IC0KPiAtCQkvKiBTZWxlY3QgRFBDRCBkZXZpY2UgYWRkcmVzcyAqLwo+IC0J CXJlZyA9IEFVWF9BRERSXzdfMChyZWdfYWRkcik7Cj4gLQkJd3JpdGVsKHJlZywgZHAtPnJlZ19i YXNlICsgQU5BTE9HSVhfRFBfQVVYX0FERFJfN18wKTsKPiAtCQlyZWcgPSBBVVhfQUREUl8xNV84 KHJlZ19hZGRyKTsKPiAtCQl3cml0ZWwocmVnLCBkcC0+cmVnX2Jhc2UgKyBBTkFMT0dJWF9EUF9B VVhfQUREUl8xNV84KTsKPiAtCQlyZWcgPSBBVVhfQUREUl8xOV8xNihyZWdfYWRkcik7Cj4gLQkJ d3JpdGVsKHJlZywgZHAtPnJlZ19iYXNlICsgQU5BTE9HSVhfRFBfQVVYX0FERFJfMTlfMTYpOwo+ IC0KPiAtCQkvKgo+IC0JCSAqIFNldCBEaXNwbGF5UG9ydCB0cmFuc2FjdGlvbiBhbmQgcmVhZCAx IGJ5dGUKPiAtCQkgKiBJZiBiaXQgMyBpcyAxLCBEaXNwbGF5UG9ydCB0cmFuc2FjdGlvbi4KPiAt CQkgKiBJZiBCaXQgMyBpcyAwLCBJMkMgdHJhbnNhY3Rpb24uCj4gLQkJICovCj4gLQkJcmVnID0g QVVYX1RYX0NPTU1fRFBfVFJBTlNBQ1RJT04gfCBBVVhfVFhfQ09NTV9SRUFEOwo+IC0JCXdyaXRl bChyZWcsIGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0FVWF9DSF9DVExfMSk7Cj4gLQo+IC0J CS8qIFN0YXJ0IEFVWCB0cmFuc2FjdGlvbiAqLwo+IC0JCXJldHZhbCA9IGFuYWxvZ2l4X2RwX3N0 YXJ0X2F1eF90cmFuc2FjdGlvbihkcCk7Cj4gLQkJaWYgKHJldHZhbCA9PSAwKQo+IC0JCQlicmVh azsKPiAtCj4gLQkJZGV2X2RiZyhkcC0+ZGV2LCAiJXM6IEF1eCBUcmFuc2FjdGlvbiBmYWlsIVxu IiwgX19mdW5jX18pOwo+IC0JfQo+IC0KPiAtCS8qIFJlYWQgZGF0YSBidWZmZXIgKi8KPiAtCXJl ZyA9IHJlYWRsKGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0JVRl9EQVRBXzApOwo+IC0JKmRh dGEgPSAodW5zaWduZWQgY2hhcikocmVnICYgMHhmZik7Cj4gLQo+IC0JcmV0dXJuIHJldHZhbDsK PiAtfQo+IC0KPiAtaW50IGFuYWxvZ2l4X2RwX3dyaXRlX2J5dGVzX3RvX2RwY2Qoc3RydWN0IGFu YWxvZ2l4X2RwX2RldmljZSAqZHAsCj4gLQkJCQkgICAgdW5zaWduZWQgaW50IHJlZ19hZGRyLAo+ IC0JCQkJICAgIHVuc2lnbmVkIGludCBjb3VudCwKPiAtCQkJCSAgICB1bnNpZ25lZCBjaGFyIGRh dGFbXSkKPiAtewo+IC0JdTMyIHJlZzsKPiAtCXVuc2lnbmVkIGludCBzdGFydF9vZmZzZXQ7Cj4g LQl1bnNpZ25lZCBpbnQgY3VyX2RhdGFfY291bnQ7Cj4gLQl1bnNpZ25lZCBpbnQgY3VyX2RhdGFf aWR4Owo+IC0JaW50IGk7Cj4gLQlpbnQgcmV0dmFsID0gMDsKPiAtCj4gLQkvKiBDbGVhciBBVVgg Q0ggZGF0YSBidWZmZXIgKi8KPiAtCXJlZyA9IEJVRl9DTFI7Cj4gLQl3cml0ZWwocmVnLCBkcC0+ cmVnX2Jhc2UgKyBBTkFMT0dJWF9EUF9CVUZGRVJfREFUQV9DVEwpOwo+IC0KPiAtCXN0YXJ0X29m ZnNldCA9IDA7Cj4gLQl3aGlsZSAoc3RhcnRfb2Zmc2V0IDwgY291bnQpIHsKPiAtCQkvKiBCdWZm ZXIgc2l6ZSBvZiBBVVggQ0ggaXMgMTYgKiA0Ynl0ZXMgKi8KPiAtCQlpZiAoKGNvdW50IC0gc3Rh cnRfb2Zmc2V0KSA+IDE2KQo+IC0JCQljdXJfZGF0YV9jb3VudCA9IDE2Owo+IC0JCWVsc2UKPiAt CQkJY3VyX2RhdGFfY291bnQgPSBjb3VudCAtIHN0YXJ0X29mZnNldDsKPiAtCj4gLQkJZm9yIChp ID0gMDsgaSA8IDM7IGkrKykgewo+IC0JCQkvKiBTZWxlY3QgRFBDRCBkZXZpY2UgYWRkcmVzcyAq Lwo+IC0JCQlyZWcgPSBBVVhfQUREUl83XzAocmVnX2FkZHIgKyBzdGFydF9vZmZzZXQpOwo+IC0J CQl3cml0ZWwocmVnLCBkcC0+cmVnX2Jhc2UgKyBBTkFMT0dJWF9EUF9BVVhfQUREUl83XzApOwo+ IC0JCQlyZWcgPSBBVVhfQUREUl8xNV84KHJlZ19hZGRyICsgc3RhcnRfb2Zmc2V0KTsKPiAtCQkJ d3JpdGVsKHJlZywgZHAtPnJlZ19iYXNlICsgQU5BTE9HSVhfRFBfQVVYX0FERFJfMTVfOCk7Cj4g LQkJCXJlZyA9IEFVWF9BRERSXzE5XzE2KHJlZ19hZGRyICsgc3RhcnRfb2Zmc2V0KTsKPiAtCQkJ d3JpdGVsKHJlZywgZHAtPnJlZ19iYXNlICsgQU5BTE9HSVhfRFBfQVVYX0FERFJfMTlfMTYpOwo+ IC0KPiAtCQkJZm9yIChjdXJfZGF0YV9pZHggPSAwOyBjdXJfZGF0YV9pZHggPCBjdXJfZGF0YV9j b3VudDsKPiAtCQkJICAgICBjdXJfZGF0YV9pZHgrKykgewo+IC0JCQkJcmVnID0gZGF0YVtzdGFy dF9vZmZzZXQgKyBjdXJfZGF0YV9pZHhdOwo+IC0JCQkJd3JpdGVsKHJlZywgZHAtPnJlZ19iYXNl ICsKPiAtCQkJCSAgICAgICBBTkFMT0dJWF9EUF9CVUZfREFUQV8wICsKPiAtCQkJCSAgICAgICA0 ICogY3VyX2RhdGFfaWR4KTsKPiAtCQkJfQo+IC0KPiAtCQkJLyoKPiAtCQkJICogU2V0IERpc3Bs YXlQb3J0IHRyYW5zYWN0aW9uIGFuZCB3cml0ZQo+IC0JCQkgKiBJZiBiaXQgMyBpcyAxLCBEaXNw bGF5UG9ydCB0cmFuc2FjdGlvbi4KPiAtCQkJICogSWYgQml0IDMgaXMgMCwgSTJDIHRyYW5zYWN0 aW9uLgo+IC0JCQkgKi8KPiAtCQkJcmVnID0gQVVYX0xFTkdUSChjdXJfZGF0YV9jb3VudCkgfAo+ IC0JCQkJQVVYX1RYX0NPTU1fRFBfVFJBTlNBQ1RJT04gfCBBVVhfVFhfQ09NTV9XUklURTsKPiAt CQkJd3JpdGVsKHJlZywgZHAtPnJlZ19iYXNlICsgQU5BTE9HSVhfRFBfQVVYX0NIX0NUTF8xKTsK PiAtCj4gLQkJCS8qIFN0YXJ0IEFVWCB0cmFuc2FjdGlvbiAqLwo+IC0JCQlyZXR2YWwgPSBhbmFs b2dpeF9kcF9zdGFydF9hdXhfdHJhbnNhY3Rpb24oZHApOwo+IC0JCQlpZiAocmV0dmFsID09IDAp Cj4gLQkJCQlicmVhazsKPiAtCj4gLQkJCWRldl9kYmcoZHAtPmRldiwgIiVzOiBBdXggVHJhbnNh Y3Rpb24gZmFpbCFcbiIsCj4gLQkJCQlfX2Z1bmNfXyk7Cj4gLQkJfQo+IC0KPiAtCQlzdGFydF9v ZmZzZXQgKz0gY3VyX2RhdGFfY291bnQ7Cj4gLQl9Cj4gLQo+IC0JcmV0dXJuIHJldHZhbDsKPiAt fQo+IC0KPiAtaW50IGFuYWxvZ2l4X2RwX3JlYWRfYnl0ZXNfZnJvbV9kcGNkKHN0cnVjdCBhbmFs b2dpeF9kcF9kZXZpY2UgKmRwLAo+IC0JCQkJICAgICB1bnNpZ25lZCBpbnQgcmVnX2FkZHIsCj4g LQkJCQkgICAgIHVuc2lnbmVkIGludCBjb3VudCwKPiAtCQkJCSAgICAgdW5zaWduZWQgY2hhciBk YXRhW10pCj4gLXsKPiAtCXUzMiByZWc7Cj4gLQl1bnNpZ25lZCBpbnQgc3RhcnRfb2Zmc2V0Owo+ IC0JdW5zaWduZWQgaW50IGN1cl9kYXRhX2NvdW50Owo+IC0JdW5zaWduZWQgaW50IGN1cl9kYXRh X2lkeDsKPiAtCWludCBpOwo+IC0JaW50IHJldHZhbCA9IDA7Cj4gLQo+IC0JLyogQ2xlYXIgQVVY IENIIGRhdGEgYnVmZmVyICovCj4gLQlyZWcgPSBCVUZfQ0xSOwo+IC0Jd3JpdGVsKHJlZywgZHAt PnJlZ19iYXNlICsgQU5BTE9HSVhfRFBfQlVGRkVSX0RBVEFfQ1RMKTsKPiAtCj4gLQlzdGFydF9v ZmZzZXQgPSAwOwo+IC0Jd2hpbGUgKHN0YXJ0X29mZnNldCA8IGNvdW50KSB7Cj4gLQkJLyogQnVm ZmVyIHNpemUgb2YgQVVYIENIIGlzIDE2ICogNGJ5dGVzICovCj4gLQkJaWYgKChjb3VudCAtIHN0 YXJ0X29mZnNldCkgPiAxNikKPiAtCQkJY3VyX2RhdGFfY291bnQgPSAxNjsKPiAtCQllbHNlCj4g LQkJCWN1cl9kYXRhX2NvdW50ID0gY291bnQgLSBzdGFydF9vZmZzZXQ7Cj4gLQo+IC0JCS8qIEFV WCBDSCBSZXF1ZXN0IFRyYW5zYWN0aW9uIHByb2Nlc3MgKi8KPiAtCQlmb3IgKGkgPSAwOyBpIDwg MzsgaSsrKSB7Cj4gLQkJCS8qIFNlbGVjdCBEUENEIGRldmljZSBhZGRyZXNzICovCj4gLQkJCXJl ZyA9IEFVWF9BRERSXzdfMChyZWdfYWRkciArIHN0YXJ0X29mZnNldCk7Cj4gLQkJCXdyaXRlbChy ZWcsIGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0FVWF9BRERSXzdfMCk7Cj4gLQkJCXJlZyA9 IEFVWF9BRERSXzE1XzgocmVnX2FkZHIgKyBzdGFydF9vZmZzZXQpOwo+IC0JCQl3cml0ZWwocmVn LCBkcC0+cmVnX2Jhc2UgKyBBTkFMT0dJWF9EUF9BVVhfQUREUl8xNV84KTsKPiAtCQkJcmVnID0g QVVYX0FERFJfMTlfMTYocmVnX2FkZHIgKyBzdGFydF9vZmZzZXQpOwo+IC0JCQl3cml0ZWwocmVn LCBkcC0+cmVnX2Jhc2UgKyBBTkFMT0dJWF9EUF9BVVhfQUREUl8xOV8xNik7Cj4gLQo+IC0JCQkv Kgo+IC0JCQkgKiBTZXQgRGlzcGxheVBvcnQgdHJhbnNhY3Rpb24gYW5kIHJlYWQKPiAtCQkJICog SWYgYml0IDMgaXMgMSwgRGlzcGxheVBvcnQgdHJhbnNhY3Rpb24uCj4gLQkJCSAqIElmIEJpdCAz IGlzIDAsIEkyQyB0cmFuc2FjdGlvbi4KPiAtCQkJICovCj4gLQkJCXJlZyA9IEFVWF9MRU5HVEgo Y3VyX2RhdGFfY291bnQpIHwKPiAtCQkJCUFVWF9UWF9DT01NX0RQX1RSQU5TQUNUSU9OIHwgQVVY X1RYX0NPTU1fUkVBRDsKPiAtCQkJd3JpdGVsKHJlZywgZHAtPnJlZ19iYXNlICsgQU5BTE9HSVhf RFBfQVVYX0NIX0NUTF8xKTsKPiAtCj4gLQkJCS8qIFN0YXJ0IEFVWCB0cmFuc2FjdGlvbiAqLwo+ IC0JCQlyZXR2YWwgPSBhbmFsb2dpeF9kcF9zdGFydF9hdXhfdHJhbnNhY3Rpb24oZHApOwo+IC0J CQlpZiAocmV0dmFsID09IDApCj4gLQkJCQlicmVhazsKPiAtCj4gLQkJCWRldl9kYmcoZHAtPmRl diwgIiVzOiBBdXggVHJhbnNhY3Rpb24gZmFpbCFcbiIsCj4gLQkJCQlfX2Z1bmNfXyk7Cj4gLQkJ fQo+IC0KPiAtCQlmb3IgKGN1cl9kYXRhX2lkeCA9IDA7IGN1cl9kYXRhX2lkeCA8IGN1cl9kYXRh X2NvdW50Owo+IC0JCSAgICBjdXJfZGF0YV9pZHgrKykgewo+IC0JCQlyZWcgPSByZWFkbChkcC0+ cmVnX2Jhc2UgKyBBTkFMT0dJWF9EUF9CVUZfREFUQV8wCj4gLQkJCQkJCSArIDQgKiBjdXJfZGF0 YV9pZHgpOwo+IC0JCQlkYXRhW3N0YXJ0X29mZnNldCArIGN1cl9kYXRhX2lkeF0gPQo+IC0JCQkJ KHVuc2lnbmVkIGNoYXIpcmVnOwo+IC0JCX0KPiAtCj4gLQkJc3RhcnRfb2Zmc2V0ICs9IGN1cl9k YXRhX2NvdW50Owo+IC0JfQo+IC0KPiAtCXJldHVybiByZXR2YWw7Cj4gLX0KPiAtCj4gLWludCBh bmFsb2dpeF9kcF9zZWxlY3RfaTJjX2RldmljZShzdHJ1Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpk cCwKPiAtCQkJCSAgdW5zaWduZWQgaW50IGRldmljZV9hZGRyLAo+IC0JCQkJICB1bnNpZ25lZCBp bnQgcmVnX2FkZHIpCj4gLXsKPiAtCXUzMiByZWc7Cj4gLQlpbnQgcmV0dmFsOwo+IC0KPiAtCS8q IFNldCBFRElEIGRldmljZSBhZGRyZXNzICovCj4gLQlyZWcgPSBkZXZpY2VfYWRkcjsKPiAtCXdy aXRlbChyZWcsIGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0FVWF9BRERSXzdfMCk7Cj4gLQl3 cml0ZWwoMHgwLCBkcC0+cmVnX2Jhc2UgKyBBTkFMT0dJWF9EUF9BVVhfQUREUl8xNV84KTsKPiAt CXdyaXRlbCgweDAsIGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0FVWF9BRERSXzE5XzE2KTsK PiAtCj4gLQkvKiBTZXQgb2Zmc2V0IGZyb20gYmFzZSBhZGRyZXNzIG9mIEVESUQgZGV2aWNlICov Cj4gLQl3cml0ZWwocmVnX2FkZHIsIGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0JVRl9EQVRB XzApOwo+IC0KPiAtCS8qCj4gLQkgKiBTZXQgSTJDIHRyYW5zYWN0aW9uIGFuZCB3cml0ZSBhZGRy ZXNzCj4gLQkgKiBJZiBiaXQgMyBpcyAxLCBEaXNwbGF5UG9ydCB0cmFuc2FjdGlvbi4KPiAtCSAq IElmIEJpdCAzIGlzIDAsIEkyQyB0cmFuc2FjdGlvbi4KPiAtCSAqLwo+IC0JcmVnID0gQVVYX1RY X0NPTU1fSTJDX1RSQU5TQUNUSU9OIHwgQVVYX1RYX0NPTU1fTU9UIHwKPiAtCQlBVVhfVFhfQ09N TV9XUklURTsKPiAtCXdyaXRlbChyZWcsIGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0FVWF9D SF9DVExfMSk7Cj4gLQo+IC0JLyogU3RhcnQgQVVYIHRyYW5zYWN0aW9uICovCj4gLQlyZXR2YWwg PSBhbmFsb2dpeF9kcF9zdGFydF9hdXhfdHJhbnNhY3Rpb24oZHApOwo+IC0JaWYgKHJldHZhbCAh PSAwKQo+IC0JCWRldl9kYmcoZHAtPmRldiwgIiVzOiBBdXggVHJhbnNhY3Rpb24gZmFpbCFcbiIs IF9fZnVuY19fKTsKPiAtCj4gLQlyZXR1cm4gcmV0dmFsOwo+IC19Cj4gLQo+IC1pbnQgYW5hbG9n aXhfZHBfcmVhZF9ieXRlX2Zyb21faTJjKHN0cnVjdCBhbmFsb2dpeF9kcF9kZXZpY2UgKmRwLAo+ IC0JCQkJICAgdW5zaWduZWQgaW50IGRldmljZV9hZGRyLAo+IC0JCQkJICAgdW5zaWduZWQgaW50 IHJlZ19hZGRyLAo+IC0JCQkJICAgdW5zaWduZWQgaW50ICpkYXRhKQo+IC17Cj4gLQl1MzIgcmVn Owo+IC0JaW50IGk7Cj4gLQlpbnQgcmV0dmFsOwo+IC0KPiAtCWZvciAoaSA9IDA7IGkgPCAzOyBp KyspIHsKPiAtCQkvKiBDbGVhciBBVVggQ0ggZGF0YSBidWZmZXIgKi8KPiAtCQlyZWcgPSBCVUZf Q0xSOwo+IC0JCXdyaXRlbChyZWcsIGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0JVRkZFUl9E QVRBX0NUTCk7Cj4gLQo+IC0JCS8qIFNlbGVjdCBFRElEIGRldmljZSAqLwo+IC0JCXJldHZhbCA9 IGFuYWxvZ2l4X2RwX3NlbGVjdF9pMmNfZGV2aWNlKGRwLCBkZXZpY2VfYWRkciwKPiAtCQkJCQkJ ICAgICAgIHJlZ19hZGRyKTsKPiAtCQlpZiAocmV0dmFsICE9IDApCj4gLQkJCWNvbnRpbnVlOwo+ IC0KPiAtCQkvKgo+IC0JCSAqIFNldCBJMkMgdHJhbnNhY3Rpb24gYW5kIHJlYWQgZGF0YQo+IC0J CSAqIElmIGJpdCAzIGlzIDEsIERpc3BsYXlQb3J0IHRyYW5zYWN0aW9uLgo+IC0JCSAqIElmIEJp dCAzIGlzIDAsIEkyQyB0cmFuc2FjdGlvbi4KPiAtCQkgKi8KPiAtCQlyZWcgPSBBVVhfVFhfQ09N TV9JMkNfVFJBTlNBQ1RJT04gfAo+IC0JCQlBVVhfVFhfQ09NTV9SRUFEOwo+IC0JCXdyaXRlbChy ZWcsIGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0FVWF9DSF9DVExfMSk7Cj4gLQo+IC0JCS8q IFN0YXJ0IEFVWCB0cmFuc2FjdGlvbiAqLwo+IC0JCXJldHZhbCA9IGFuYWxvZ2l4X2RwX3N0YXJ0 X2F1eF90cmFuc2FjdGlvbihkcCk7Cj4gLQkJaWYgKHJldHZhbCA9PSAwKQo+IC0JCQlicmVhazsK PiAtCj4gLQkJZGV2X2RiZyhkcC0+ZGV2LCAiJXM6IEF1eCBUcmFuc2FjdGlvbiBmYWlsIVxuIiwg X19mdW5jX18pOwo+IC0JfQo+IC0KPiAtCS8qIFJlYWQgZGF0YSAqLwo+IC0JaWYgKHJldHZhbCA9 PSAwKQo+IC0JCSpkYXRhID0gcmVhZGwoZHAtPnJlZ19iYXNlICsgQU5BTE9HSVhfRFBfQlVGX0RB VEFfMCk7Cj4gLQo+IC0JcmV0dXJuIHJldHZhbDsKPiAtfQo+IC0KPiAtaW50IGFuYWxvZ2l4X2Rw X3JlYWRfYnl0ZXNfZnJvbV9pMmMoc3RydWN0IGFuYWxvZ2l4X2RwX2RldmljZSAqZHAsCj4gLQkJ CQkgICAgdW5zaWduZWQgaW50IGRldmljZV9hZGRyLAo+IC0JCQkJICAgIHVuc2lnbmVkIGludCBy ZWdfYWRkciwKPiAtCQkJCSAgICB1bnNpZ25lZCBpbnQgY291bnQsCj4gLQkJCQkgICAgdW5zaWdu ZWQgY2hhciBlZGlkW10pCj4gLXsKPiAtCXUzMiByZWc7Cj4gLQl1bnNpZ25lZCBpbnQgaSwgajsK PiAtCXVuc2lnbmVkIGludCBjdXJfZGF0YV9pZHg7Cj4gLQl1bnNpZ25lZCBpbnQgZGVmZXIgPSAw Owo+IC0JaW50IHJldHZhbCA9IDA7Cj4gLQo+IC0JZm9yIChpID0gMDsgaSA8IGNvdW50OyBpICs9 IDE2KSB7Cj4gLQkJZm9yIChqID0gMDsgaiA8IDM7IGorKykgewo+IC0JCQkvKiBDbGVhciBBVVgg Q0ggZGF0YSBidWZmZXIgKi8KPiAtCQkJcmVnID0gQlVGX0NMUjsKPiAtCQkJd3JpdGVsKHJlZywg ZHAtPnJlZ19iYXNlICsgQU5BTE9HSVhfRFBfQlVGRkVSX0RBVEFfQ1RMKTsKPiAtCj4gLQkJCS8q IFNldCBub3JtYWwgQVVYIENIIGNvbW1hbmQgKi8KPiAtCQkJcmVnID0gcmVhZGwoZHAtPnJlZ19i YXNlICsgQU5BTE9HSVhfRFBfQVVYX0NIX0NUTF8yKTsKPiAtCQkJcmVnICY9IH5BRERSX09OTFk7 Cj4gLQkJCXdyaXRlbChyZWcsIGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0FVWF9DSF9DVExf Mik7Cj4gLQo+IC0JCQkvKgo+IC0JCQkgKiBJZiBSeCBzZW5kcyBkZWZlciwgVHggc2VuZHMgb25s eSByZWFkcwo+IC0JCQkgKiByZXF1ZXN0IHdpdGhvdXQgc2VuZGluZyBhZGRyZXNzCj4gLQkJCSAq Lwo+IC0JCQlpZiAoIWRlZmVyKQo+IC0JCQkJcmV0dmFsID0gYW5hbG9naXhfZHBfc2VsZWN0X2ky Y19kZXZpY2UoZHAsCj4gLQkJCQkJCWRldmljZV9hZGRyLCByZWdfYWRkciArIGkpOwo+IC0JCQll bHNlCj4gLQkJCQlkZWZlciA9IDA7Cj4gLQo+IC0JCQlpZiAocmV0dmFsID09IDApIHsKPiAtCQkJ CS8qCj4gLQkJCQkgKiBTZXQgSTJDIHRyYW5zYWN0aW9uIGFuZCB3cml0ZSBkYXRhCj4gLQkJCQkg KiBJZiBiaXQgMyBpcyAxLCBEaXNwbGF5UG9ydCB0cmFuc2FjdGlvbi4KPiAtCQkJCSAqIElmIEJp dCAzIGlzIDAsIEkyQyB0cmFuc2FjdGlvbi4KPiAtCQkJCSAqLwo+IC0JCQkJcmVnID0gQVVYX0xF TkdUSCgxNikgfAo+IC0JCQkJCUFVWF9UWF9DT01NX0kyQ19UUkFOU0FDVElPTiB8Cj4gLQkJCQkJ QVVYX1RYX0NPTU1fUkVBRDsKPiAtCQkJCXdyaXRlbChyZWcsIGRwLT5yZWdfYmFzZSArCj4gLQkJ CQkJQU5BTE9HSVhfRFBfQVVYX0NIX0NUTF8xKTsKPiAtCj4gLQkJCQkvKiBTdGFydCBBVVggdHJh bnNhY3Rpb24gKi8KPiAtCQkJCXJldHZhbCA9IGFuYWxvZ2l4X2RwX3N0YXJ0X2F1eF90cmFuc2Fj dGlvbihkcCk7Cj4gLQkJCQlpZiAocmV0dmFsID09IDApCj4gLQkJCQkJYnJlYWs7Cj4gLQo+IC0J CQkJZGV2X2RiZyhkcC0+ZGV2LCAiJXM6IEF1eCBUcmFuc2FjdGlvbiBmYWlsIVxuIiwKPiAtCQkJ CQlfX2Z1bmNfXyk7Cj4gLQkJCX0KPiAtCQkJLyogQ2hlY2sgaWYgUnggc2VuZHMgZGVmZXIgKi8K PiAtCQkJcmVnID0gcmVhZGwoZHAtPnJlZ19iYXNlICsgQU5BTE9HSVhfRFBfQVVYX1JYX0NPTU0p Owo+IC0JCQlpZiAocmVnID09IEFVWF9SWF9DT01NX0FVWF9ERUZFUiB8fAo+IC0JCQkgICAgcmVn ID09IEFVWF9SWF9DT01NX0kyQ19ERUZFUikgewo+IC0JCQkJZGV2X2VycihkcC0+ZGV2LCAiRGVm ZXI6ICVkXG5cbiIsIHJlZyk7Cj4gLQkJCQlkZWZlciA9IDE7Cj4gLQkJCX0KPiAtCQl9Cj4gLQo+ IC0JCWZvciAoY3VyX2RhdGFfaWR4ID0gMDsgY3VyX2RhdGFfaWR4IDwgMTY7IGN1cl9kYXRhX2lk eCsrKSB7Cj4gLQkJCXJlZyA9IHJlYWRsKGRwLT5yZWdfYmFzZSArIEFOQUxPR0lYX0RQX0JVRl9E QVRBXzAKPiAtCQkJCQkJICsgNCAqIGN1cl9kYXRhX2lkeCk7Cj4gLQkJCWVkaWRbaSArIGN1cl9k YXRhX2lkeF0gPSAodW5zaWduZWQgY2hhcilyZWc7Cj4gLQkJfQo+IC0JfQo+IC0KPiAtCXJldHVy biByZXR2YWw7Cj4gLX0KPiAtCj4gICB2b2lkIGFuYWxvZ2l4X2RwX3NldF9saW5rX2JhbmR3aWR0 aChzdHJ1Y3QgYW5hbG9naXhfZHBfZGV2aWNlICpkcCwgdTMyIGJ3dHlwZSkKPiAgIHsKPiAgIAl1 MzIgcmVnOwoKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f CmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpo dHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934861AbcHEINX (ORCPT ); Fri, 5 Aug 2016 04:13:23 -0400 Received: from lucky1.263xmail.com ([211.157.147.133]:55748 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934750AbcHEINJ (ORCPT ); Fri, 5 Aug 2016 04:13:09 -0400 X-263anti-spam: KSV:0;BIG:0;ABS:1;DNS:0;ATT:0;SPF:S; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 1 X-SKE-CHECKED: 1 X-ADDR-CHECKED: 0 X-RL-SENDER: ykk@rock-chips.com X-FST-TO: dri-devel@lists.freedesktop.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: ykk@rock-chips.com X-UNIQUE-TAG: <3b7403d7d7f57858199c4eaaa6cf787c> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH] drm/bridge: analogix_dp: Remove duplicated code To: Tomeu Vizoso , linux-kernel@vger.kernel.org References: <1470291789-23402-1-git-send-email-tomeu.vizoso@collabora.com> Cc: Javier Martinez Canillas , Mika Kahola , Daniel Vetter , David Airlie , dri-devel@lists.freedesktop.org From: Yakir Yang Message-ID: <57A44A87.3000806@rock-chips.com> Date: Fri, 5 Aug 2016 16:12:55 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: <1470291789-23402-1-git-send-email-tomeu.vizoso@collabora.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Tomeu, Nice job ! Have a few nits bellow. ;) On 08/04/2016 02:23 PM, Tomeu Vizoso wrote: > Remove code for reading the EDID and DPCD fields and use the helpers > instead. > > Besides the obvious code reduction, other helpers are being added to the > core that could be used in this driver and will be good to be able to > use them instead of duplicating them. > > Signed-off-by: Tomeu Vizoso > Cc: Javier Martinez Canillas > Cc: Mika Kahola > Cc: Yakir Yang > Cc: Daniel Vetter > --- > drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 390 +++++++++++---------- > drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 39 +-- > drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 324 ----------------- > 3 files changed, 201 insertions(+), 552 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c > index 32715daf73cb..c81cb37e56b6 100644 > --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c > +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c > @@ -31,6 +31,7 @@ > #include > > #include "analogix_dp_core.h" > +#include "analogix_dp_reg.h" > > #define to_dp(nm) container_of(nm, struct analogix_dp_device, nm) > > @@ -97,150 +98,21 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp) > return 0; > } > > -static unsigned char analogix_dp_calc_edid_check_sum(unsigned char *edid_data) > -{ > - int i; > - unsigned char sum = 0; > - > - for (i = 0; i < EDID_BLOCK_LENGTH; i++) > - sum = sum + edid_data[i]; > - > - return sum; > -} > - > -static int analogix_dp_read_edid(struct analogix_dp_device *dp) > -{ > - unsigned char *edid = dp->edid; > - unsigned int extend_block = 0; > - unsigned char sum; > - unsigned char test_vector; > - int retval; > - > - /* > - * EDID device address is 0x50. > - * However, if necessary, you must have set upper address > - * into E-EDID in I2C device, 0x30. > - */ > - > - /* Read Extension Flag, Number of 128-byte EDID extension blocks */ > - retval = analogix_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR, > - EDID_EXTENSION_FLAG, > - &extend_block); > - if (retval) > - return retval; > - > - if (extend_block > 0) { > - dev_dbg(dp->dev, "EDID data includes a single extension!\n"); > - > - /* Read EDID data */ > - retval = analogix_dp_read_bytes_from_i2c(dp, > - I2C_EDID_DEVICE_ADDR, > - EDID_HEADER_PATTERN, > - EDID_BLOCK_LENGTH, > - &edid[EDID_HEADER_PATTERN]); > - if (retval != 0) { > - dev_err(dp->dev, "EDID Read failed!\n"); > - return -EIO; > - } > - sum = analogix_dp_calc_edid_check_sum(edid); > - if (sum != 0) { > - dev_err(dp->dev, "EDID bad checksum!\n"); > - return -EIO; > - } > - > - /* Read additional EDID data */ > - retval = analogix_dp_read_bytes_from_i2c(dp, > - I2C_EDID_DEVICE_ADDR, > - EDID_BLOCK_LENGTH, > - EDID_BLOCK_LENGTH, > - &edid[EDID_BLOCK_LENGTH]); > - if (retval != 0) { > - dev_err(dp->dev, "EDID Read failed!\n"); > - return -EIO; > - } > - sum = analogix_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]); > - if (sum != 0) { > - dev_err(dp->dev, "EDID bad checksum!\n"); > - return -EIO; > - } > - > - analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST, > - &test_vector); > - if (test_vector & DP_TEST_LINK_EDID_READ) { > - analogix_dp_write_byte_to_dpcd(dp, > - DP_TEST_EDID_CHECKSUM, > - edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]); > - analogix_dp_write_byte_to_dpcd(dp, > - DP_TEST_RESPONSE, > - DP_TEST_EDID_CHECKSUM_WRITE); > - } > - } else { > - dev_info(dp->dev, "EDID data does not include any extensions.\n"); > - > - /* Read EDID data */ > - retval = analogix_dp_read_bytes_from_i2c(dp, > - I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN, > - EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]); > - if (retval != 0) { > - dev_err(dp->dev, "EDID Read failed!\n"); > - return -EIO; > - } > - sum = analogix_dp_calc_edid_check_sum(edid); > - if (sum != 0) { > - dev_err(dp->dev, "EDID bad checksum!\n"); > - return -EIO; > - } > - > - analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST, > - &test_vector); > - if (test_vector & DP_TEST_LINK_EDID_READ) { > - analogix_dp_write_byte_to_dpcd(dp, > - DP_TEST_EDID_CHECKSUM, edid[EDID_CHECKSUM]); > - analogix_dp_write_byte_to_dpcd(dp, > - DP_TEST_RESPONSE, DP_TEST_EDID_CHECKSUM_WRITE); > - } > - } > - > - dev_dbg(dp->dev, "EDID Read success!\n"); > - return 0; > -} > - > -static int analogix_dp_handle_edid(struct analogix_dp_device *dp) > -{ > - u8 buf[12]; > - int i; > - int retval; > - > - /* Read DPCD DP_DPCD_REV~RECEIVE_PORT1_CAP_1 */ > - retval = analogix_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV, 12, buf); > - if (retval) > - return retval; > - > - /* Read EDID */ > - for (i = 0; i < 3; i++) { > - retval = analogix_dp_read_edid(dp); > - if (!retval) > - break; > - } > - > - return retval; > -} > - > static void > analogix_dp_enable_rx_to_enhanced_mode(struct analogix_dp_device *dp, > bool enable) > { > u8 data; > > - analogix_dp_read_byte_from_dpcd(dp, DP_LANE_COUNT_SET, &data); > + drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data); > > if (enable) > - analogix_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET, > - DP_LANE_COUNT_ENHANCED_FRAME_EN | > - DPCD_LANE_COUNT_SET(data)); > + drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, > + DP_LANE_COUNT_ENHANCED_FRAME_EN | > + DPCD_LANE_COUNT_SET(data)); > else > - analogix_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET, > - DPCD_LANE_COUNT_SET(data)); > + drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, > + DPCD_LANE_COUNT_SET(data)); > } > > static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp) > @@ -248,7 +120,7 @@ static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp) > u8 data; > int retval; > > - analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LANE_COUNT, &data); > + drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data); > retval = DPCD_ENHANCED_FRAME_CAP(data); > > return retval; > @@ -267,8 +139,8 @@ static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp) > { > analogix_dp_set_training_pattern(dp, DP_NONE); > > - analogix_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET, > - DP_TRAINING_PATTERN_DISABLE); > + drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, > + DP_TRAINING_PATTERN_DISABLE); > } > > static void > @@ -313,8 +185,8 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp) > /* Setup RX configuration */ > buf[0] = dp->link_train.link_rate; > buf[1] = dp->link_train.lane_count; > - retval = analogix_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET, 2, buf); > - if (retval) > + retval = drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, buf, 2); > + if (retval < 0) > return retval; > > /* Set TX pre-emphasis to minimum */ > @@ -338,20 +210,22 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp) > analogix_dp_set_training_pattern(dp, TRAINING_PTN1); > > /* Set RX training pattern */ > - retval = analogix_dp_write_byte_to_dpcd(dp, > - DP_TRAINING_PATTERN_SET, > - DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1); > - if (retval) > + retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, > + DP_LINK_SCRAMBLING_DISABLE | > + DP_TRAINING_PATTERN_1); 'DP_TRAINING_PATTERN_1' need align with 'DP_LINK_SCRAMBLING_DISABLE' > + if (retval < 0) > return retval; > > for (lane = 0; lane < lane_count; lane++) > buf[lane] = DP_TRAIN_PRE_EMPH_LEVEL_0 | > DP_TRAIN_VOLTAGE_SWING_LEVEL_0; > > - retval = analogix_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET, > - lane_count, buf); > + retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, buf, > + lane_count); > + if (retval < 0) > + return retval; > > - return retval; > + return 0; > } > > static unsigned char analogix_dp_get_lane_status(u8 link_status[2], int lane) > @@ -503,25 +377,23 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp) > > lane_count = dp->link_train.lane_count; > > - retval = analogix_dp_read_bytes_from_dpcd(dp, > - DP_LANE0_1_STATUS, 2, link_status); > - if (retval) > + retval = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status, 2); > + if (retval < 0) > return retval; > > - retval = analogix_dp_read_bytes_from_dpcd(dp, > - DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request); > - if (retval) > + retval = drm_dp_dpcd_read(&dp->aux, DP_ADJUST_REQUEST_LANE0_1, > + adjust_request, 2); > + if (retval < 0) > return retval; > > if (analogix_dp_clock_recovery_ok(link_status, lane_count) == 0) { > /* set training pattern 2 for EQ */ > analogix_dp_set_training_pattern(dp, TRAINING_PTN2); > > - retval = analogix_dp_write_byte_to_dpcd(dp, > - DP_TRAINING_PATTERN_SET, > - DP_LINK_SCRAMBLING_DISABLE | > - DP_TRAINING_PATTERN_2); > - if (retval) > + retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, > + DP_LINK_SCRAMBLING_DISABLE | > + DP_TRAINING_PATTERN_2); ditto > + if (retval < 0) > return retval; > > dev_info(dp->dev, "Link Training Clock Recovery success\n"); > @@ -559,13 +431,12 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp) > analogix_dp_set_lane_link_training(dp, > dp->link_train.training_lane[lane], lane); > > - retval = analogix_dp_write_bytes_to_dpcd(dp, > - DP_TRAINING_LANE0_SET, lane_count, > - dp->link_train.training_lane); > - if (retval) > + retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, > + dp->link_train.training_lane, lane_count); > + if (retval < 0) > return retval; > > - return retval; > + return 0; > } > > static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp) > @@ -578,9 +449,8 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp) > > lane_count = dp->link_train.lane_count; > > - retval = analogix_dp_read_bytes_from_dpcd(dp, > - DP_LANE0_1_STATUS, 2, link_status); > - if (retval) > + retval = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status, 2); > + if (retval < 0) > return retval; > > if (analogix_dp_clock_recovery_ok(link_status, lane_count)) { > @@ -588,14 +458,13 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp) > return -EIO; > } > > - retval = analogix_dp_read_bytes_from_dpcd(dp, > - DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request); > - if (retval) > + retval = drm_dp_dpcd_read(&dp->aux, DP_ADJUST_REQUEST_LANE0_1, adjust_request, 2); > + if (retval < 0) > return retval; > > - retval = analogix_dp_read_byte_from_dpcd(dp, > - DP_LANE_ALIGN_STATUS_UPDATED, &link_align); > - if (retval) > + retval = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED, > + &link_align); > + if (retval < 0) > return retval; > > analogix_dp_get_adjust_training_lane(dp, adjust_request); > @@ -636,10 +505,12 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp) > analogix_dp_set_lane_link_training(dp, > dp->link_train.training_lane[lane], lane); > > - retval = analogix_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET, > - lane_count, dp->link_train.training_lane); > + retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, > + dp->link_train.training_lane, lane_count); > + if (retval < 0) > + return retval; > > - return retval; > + return 0; > } > > static void analogix_dp_get_max_rx_bandwidth(struct analogix_dp_device *dp, > @@ -653,7 +524,7 @@ static void analogix_dp_get_max_rx_bandwidth(struct analogix_dp_device *dp, > * For DP rev.1.2, Maximum link rate of Main Link lanes > * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps, 0x14 = 5.4Gbps > */ > - analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LINK_RATE, &data); > + drm_dp_dpcd_readb(&dp->aux, DP_MAX_LINK_RATE, &data); > *bandwidth = data; > } > > @@ -666,7 +537,7 @@ static void analogix_dp_get_max_rx_lane_count(struct analogix_dp_device *dp, > * For DP rev.1.1, Maximum number of Main Link lanes > * 0x01 = 1 lane, 0x02 = 2 lanes, 0x04 = 4 lanes > */ > - analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LANE_COUNT, &data); > + drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data); > *lane_count = DPCD_MAX_LANE_COUNT(data); > } > > @@ -835,19 +706,15 @@ static void analogix_dp_enable_scramble(struct analogix_dp_device *dp, > if (enable) { > analogix_dp_enable_scrambling(dp); > > - analogix_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET, > - &data); > - analogix_dp_write_byte_to_dpcd(dp, > - DP_TRAINING_PATTERN_SET, > - (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE)); > + drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data); > + drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, > + (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE)); > } else { > analogix_dp_disable_scrambling(dp); > > - analogix_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET, > - &data); > - analogix_dp_write_byte_to_dpcd(dp, > - DP_TRAINING_PATTERN_SET, > - (u8)(data | DP_LINK_SCRAMBLING_DISABLE)); > + drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data); > + drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, > + (u8)(data | DP_LINK_SCRAMBLING_DISABLE)); > } > } > > @@ -926,12 +793,11 @@ static void analogix_dp_commit(struct analogix_dp_device *dp) > int analogix_dp_get_modes(struct drm_connector *connector) > { > struct analogix_dp_device *dp = to_dp(connector); > - struct edid *edid = (struct edid *)dp->edid; > int num_modes = 0; > > - if (analogix_dp_handle_edid(dp) == 0) { > - drm_mode_connector_update_edid_property(&dp->connector, edid); > - num_modes += drm_add_edid_modes(&dp->connector, edid); > + if ((dp->edid = drm_get_edid(connector, &dp->aux.ddc))) { You could remove the '->edid' variable from struct analogix_dp_device, cause we don't need this information at other places. You need to free the edid after parsed it, cause each time when you call drm_get_edid() helper, it would malloc a new space for 'edid'. Besides I would prefer move the statement out of the condition. struct edid *edid; edid = drm_get_edid(connector, &dp->aux.ddc); if (edid) { drm_mode_connector_update_edid_property(&dp->connector, edid); num_modes += drm_add_edid_modes(&dp->connector, edid); kfree(edid); } > + drm_mode_connector_update_edid_property(&dp->connector, dp->edid); > + num_modes += drm_add_edid_modes(&dp->connector, dp->edid); > } > > if (dp->plat_data->panel) > @@ -984,6 +850,138 @@ static const struct drm_connector_funcs analogix_dp_connector_funcs = { > .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, > }; > > +static ssize_t analogix_dpaux_transfer(struct drm_dp_aux *aux, > + struct drm_dp_aux_msg *msg) > +{ > + struct analogix_dp_device *dp = to_dp(aux); > + u32 reg; > + u8 *buffer = msg->buffer; > + int timeout_loop = 0; > + unsigned int i; > + int retval = 0; > + > + /* Buffer size of AUX CH is 16 bytes */ > + if (WARN_ON(msg->size > 16)) > + return -E2BIG; > + > + /* Clear AUX CH data buffer */ > + reg = BUF_CLR; > + writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); > + > + switch (msg->request & ~DP_AUX_I2C_MOT) { > + case DP_AUX_I2C_WRITE: > + reg = AUX_TX_COMM_WRITE | AUX_TX_COMM_I2C_TRANSACTION; > + if (msg->request & DP_AUX_I2C_MOT) > + reg |= AUX_TX_COMM_MOT; > + > + break; > + > + case DP_AUX_I2C_READ: > + reg = AUX_TX_COMM_READ | AUX_TX_COMM_I2C_TRANSACTION; > + if (msg->request & DP_AUX_I2C_MOT) > + reg |= AUX_TX_COMM_MOT; > + > + break; > + > + case DP_AUX_NATIVE_WRITE: > + reg = AUX_TX_COMM_WRITE | AUX_TX_COMM_DP_TRANSACTION; > + break; > + > + case DP_AUX_NATIVE_READ: > + reg = AUX_TX_COMM_READ | AUX_TX_COMM_DP_TRANSACTION; > + break; > + > + default: > + return -EINVAL; > + } > + > + reg |= AUX_LENGTH(msg->size); > + writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); > + > + /* Select DPCD device address */ > + reg = AUX_ADDR_7_0(msg->address); > + writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); > + reg = AUX_ADDR_15_8(msg->address); > + writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); > + reg = AUX_ADDR_19_16(msg->address); > + writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); > + > + if ((msg->request & DP_AUX_I2C_READ) == 0) { > + for (i = 0; i < msg->size; i++) { > + reg = buffer[i]; > + writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + > + 4 * i); > + retval++; > + } > + } > + > + /* Enable AUX CH operation */ > + reg = 0; > + > + /* Zero-sized messages specify address-only transactions. */ > + if (msg->size < 1) > + reg |= ADDR_ONLY; > + > + reg |= AUX_EN; > + writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); > + > + /* Is AUX CH command reply received? */ > + /* TODO: Wait for an interrupt instead of looping? */ > + reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); > + while (!(reg & RPLY_RECEIV)) { > + timeout_loop++; > + if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) { > + dev_err(dp->dev, "AUX CH command reply failed!\n"); > + return -ETIMEDOUT; > + } > + reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); > + usleep_range(10, 11); > + } > + > + /* Clear interrupt source for AUX CH command reply */ > + writel(RPLY_RECEIV, dp->reg_base + ANALOGIX_DP_INT_STA); > + > + /* Clear interrupt source for AUX CH access error */ > + reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); > + if (reg & AUX_ERR) { > + writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA); > + return -EREMOTEIO; > + } > + > + /* Check AUX CH error access status */ > + reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA); > + if ((reg & AUX_STATUS_MASK) != 0) { > + dev_err(dp->dev, "AUX CH error happens: %d\n\n", > + reg & AUX_STATUS_MASK); > + return -EREMOTEIO; > + } > + > + if (msg->request & DP_AUX_I2C_READ) { > + for (i = 0; i < msg->size; i++) { > + reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + > + 4 * i); > + buffer[i] = (unsigned char)reg; > + retval++; > + } > + } > + > + /* Check if Rx sends defer */ > + reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM); > + if (reg == AUX_RX_COMM_AUX_DEFER) > + msg->reply = DP_AUX_NATIVE_REPLY_DEFER; > + else if (reg == AUX_RX_COMM_I2C_DEFER) > + msg->reply = DP_AUX_I2C_REPLY_DEFER; > + else if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE || > + (msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_READ) > + msg->reply = DP_AUX_I2C_REPLY_ACK; > + else if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_NATIVE_WRITE || > + (msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_NATIVE_READ) > + msg->reply = DP_AUX_NATIVE_REPLY_ACK; > + > + return retval; > +} Would you like to move this function to 'analogix_dp_reg.c' ? > + > + > static int analogix_dp_bridge_attach(struct drm_bridge *bridge) > { > struct analogix_dp_device *dp = bridge->driver_private; > @@ -1355,6 +1353,14 @@ int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev, > dp->drm_dev = drm_dev; > dp->encoder = dp->plat_data->encoder; > > + dp->aux.name = "DP-AUX"; > + dp->aux.transfer = analogix_dpaux_transfer; > + dp->aux.dev = &pdev->dev; > + > + ret = drm_dp_aux_register(&dp->aux); > + if (ret) > + goto err_disable_pm_runtime; > + > ret = analogix_dp_create_bridge(drm_dev, dp); > if (ret) { > DRM_ERROR("failed to create bridge (%d)\n", ret); > @@ -1384,6 +1390,8 @@ void analogix_dp_unbind(struct device *dev, struct device *master, > } > > pm_runtime_disable(dev); > + > + kfree(dp->edid); Could remove this free code Thanks, - Yakir > } > EXPORT_SYMBOL_GPL(analogix_dp_unbind); > > diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h > index b45638043ec4..27eb27a71802 100644 > --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h > +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h > @@ -20,15 +20,6 @@ > #define MAX_CR_LOOP 5 > #define MAX_EQ_LOOP 5 > > -/* I2C EDID Chip ID, Slave Address */ > -#define I2C_EDID_DEVICE_ADDR 0x50 > -#define I2C_E_EDID_DEVICE_ADDR 0x30 > - > -#define EDID_BLOCK_LENGTH 0x80 > -#define EDID_HEADER_PATTERN 0x00 > -#define EDID_EXTENSION_FLAG 0x7e > -#define EDID_CHECKSUM 0x7f > - > /* DP_MAX_LANE_COUNT */ > #define DPCD_ENHANCED_FRAME_CAP(x) (((x) >> 7) & 0x1) > #define DPCD_MAX_LANE_COUNT(x) ((x) & 0x1f) > @@ -166,6 +157,7 @@ struct analogix_dp_device { > struct drm_device *drm_dev; > struct drm_connector connector; > struct drm_bridge *bridge; > + struct drm_dp_aux aux; > struct clk *clock; > unsigned int irq; > void __iomem *reg_base; > @@ -176,7 +168,7 @@ struct analogix_dp_device { > int dpms_mode; > int hpd_gpio; > bool force_hpd; > - unsigned char edid[EDID_BLOCK_LENGTH * 2]; > + struct edid *edid; > > struct analogix_dp_plat_data *plat_data; > }; > @@ -206,33 +198,6 @@ void analogix_dp_reset_aux(struct analogix_dp_device *dp); > void analogix_dp_init_aux(struct analogix_dp_device *dp); > int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp); > void analogix_dp_enable_sw_function(struct analogix_dp_device *dp); > -int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp); > -int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp, > - unsigned int reg_addr, > - unsigned char data); > -int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp, > - unsigned int reg_addr, > - unsigned char *data); > -int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp, > - unsigned int reg_addr, > - unsigned int count, > - unsigned char data[]); > -int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp, > - unsigned int reg_addr, > - unsigned int count, > - unsigned char data[]); > -int analogix_dp_select_i2c_device(struct analogix_dp_device *dp, > - unsigned int device_addr, > - unsigned int reg_addr); > -int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp, > - unsigned int device_addr, > - unsigned int reg_addr, > - unsigned int *data); > -int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp, > - unsigned int device_addr, > - unsigned int reg_addr, > - unsigned int count, > - unsigned char edid[]); > void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype); > void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype); > void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count); > diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c > index 48030f0cf497..eac61aa4224f 100644 > --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c > +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c > @@ -585,330 +585,6 @@ int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp, > return retval; > } > > -int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp, > - unsigned int reg_addr, > - unsigned char *data) > -{ > - u32 reg; > - int i; > - int retval; > - > - for (i = 0; i < 3; i++) { > - /* Clear AUX CH data buffer */ > - reg = BUF_CLR; > - writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); > - > - /* Select DPCD device address */ > - reg = AUX_ADDR_7_0(reg_addr); > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); > - reg = AUX_ADDR_15_8(reg_addr); > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); > - reg = AUX_ADDR_19_16(reg_addr); > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); > - > - /* > - * Set DisplayPort transaction and read 1 byte > - * If bit 3 is 1, DisplayPort transaction. > - * If Bit 3 is 0, I2C transaction. > - */ > - reg = AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_READ; > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); > - > - /* Start AUX transaction */ > - retval = analogix_dp_start_aux_transaction(dp); > - if (retval == 0) > - break; > - > - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__); > - } > - > - /* Read data buffer */ > - reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0); > - *data = (unsigned char)(reg & 0xff); > - > - return retval; > -} > - > -int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp, > - unsigned int reg_addr, > - unsigned int count, > - unsigned char data[]) > -{ > - u32 reg; > - unsigned int start_offset; > - unsigned int cur_data_count; > - unsigned int cur_data_idx; > - int i; > - int retval = 0; > - > - /* Clear AUX CH data buffer */ > - reg = BUF_CLR; > - writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); > - > - start_offset = 0; > - while (start_offset < count) { > - /* Buffer size of AUX CH is 16 * 4bytes */ > - if ((count - start_offset) > 16) > - cur_data_count = 16; > - else > - cur_data_count = count - start_offset; > - > - for (i = 0; i < 3; i++) { > - /* Select DPCD device address */ > - reg = AUX_ADDR_7_0(reg_addr + start_offset); > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); > - reg = AUX_ADDR_15_8(reg_addr + start_offset); > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); > - reg = AUX_ADDR_19_16(reg_addr + start_offset); > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); > - > - for (cur_data_idx = 0; cur_data_idx < cur_data_count; > - cur_data_idx++) { > - reg = data[start_offset + cur_data_idx]; > - writel(reg, dp->reg_base + > - ANALOGIX_DP_BUF_DATA_0 + > - 4 * cur_data_idx); > - } > - > - /* > - * Set DisplayPort transaction and write > - * If bit 3 is 1, DisplayPort transaction. > - * If Bit 3 is 0, I2C transaction. > - */ > - reg = AUX_LENGTH(cur_data_count) | > - AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_WRITE; > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); > - > - /* Start AUX transaction */ > - retval = analogix_dp_start_aux_transaction(dp); > - if (retval == 0) > - break; > - > - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", > - __func__); > - } > - > - start_offset += cur_data_count; > - } > - > - return retval; > -} > - > -int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp, > - unsigned int reg_addr, > - unsigned int count, > - unsigned char data[]) > -{ > - u32 reg; > - unsigned int start_offset; > - unsigned int cur_data_count; > - unsigned int cur_data_idx; > - int i; > - int retval = 0; > - > - /* Clear AUX CH data buffer */ > - reg = BUF_CLR; > - writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); > - > - start_offset = 0; > - while (start_offset < count) { > - /* Buffer size of AUX CH is 16 * 4bytes */ > - if ((count - start_offset) > 16) > - cur_data_count = 16; > - else > - cur_data_count = count - start_offset; > - > - /* AUX CH Request Transaction process */ > - for (i = 0; i < 3; i++) { > - /* Select DPCD device address */ > - reg = AUX_ADDR_7_0(reg_addr + start_offset); > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); > - reg = AUX_ADDR_15_8(reg_addr + start_offset); > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); > - reg = AUX_ADDR_19_16(reg_addr + start_offset); > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); > - > - /* > - * Set DisplayPort transaction and read > - * If bit 3 is 1, DisplayPort transaction. > - * If Bit 3 is 0, I2C transaction. > - */ > - reg = AUX_LENGTH(cur_data_count) | > - AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_READ; > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); > - > - /* Start AUX transaction */ > - retval = analogix_dp_start_aux_transaction(dp); > - if (retval == 0) > - break; > - > - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", > - __func__); > - } > - > - for (cur_data_idx = 0; cur_data_idx < cur_data_count; > - cur_data_idx++) { > - reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 > - + 4 * cur_data_idx); > - data[start_offset + cur_data_idx] = > - (unsigned char)reg; > - } > - > - start_offset += cur_data_count; > - } > - > - return retval; > -} > - > -int analogix_dp_select_i2c_device(struct analogix_dp_device *dp, > - unsigned int device_addr, > - unsigned int reg_addr) > -{ > - u32 reg; > - int retval; > - > - /* Set EDID device address */ > - reg = device_addr; > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); > - writel(0x0, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); > - writel(0x0, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); > - > - /* Set offset from base address of EDID device */ > - writel(reg_addr, dp->reg_base + ANALOGIX_DP_BUF_DATA_0); > - > - /* > - * Set I2C transaction and write address > - * If bit 3 is 1, DisplayPort transaction. > - * If Bit 3 is 0, I2C transaction. > - */ > - reg = AUX_TX_COMM_I2C_TRANSACTION | AUX_TX_COMM_MOT | > - AUX_TX_COMM_WRITE; > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); > - > - /* Start AUX transaction */ > - retval = analogix_dp_start_aux_transaction(dp); > - if (retval != 0) > - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__); > - > - return retval; > -} > - > -int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp, > - unsigned int device_addr, > - unsigned int reg_addr, > - unsigned int *data) > -{ > - u32 reg; > - int i; > - int retval; > - > - for (i = 0; i < 3; i++) { > - /* Clear AUX CH data buffer */ > - reg = BUF_CLR; > - writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); > - > - /* Select EDID device */ > - retval = analogix_dp_select_i2c_device(dp, device_addr, > - reg_addr); > - if (retval != 0) > - continue; > - > - /* > - * Set I2C transaction and read data > - * If bit 3 is 1, DisplayPort transaction. > - * If Bit 3 is 0, I2C transaction. > - */ > - reg = AUX_TX_COMM_I2C_TRANSACTION | > - AUX_TX_COMM_READ; > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); > - > - /* Start AUX transaction */ > - retval = analogix_dp_start_aux_transaction(dp); > - if (retval == 0) > - break; > - > - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__); > - } > - > - /* Read data */ > - if (retval == 0) > - *data = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0); > - > - return retval; > -} > - > -int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp, > - unsigned int device_addr, > - unsigned int reg_addr, > - unsigned int count, > - unsigned char edid[]) > -{ > - u32 reg; > - unsigned int i, j; > - unsigned int cur_data_idx; > - unsigned int defer = 0; > - int retval = 0; > - > - for (i = 0; i < count; i += 16) { > - for (j = 0; j < 3; j++) { > - /* Clear AUX CH data buffer */ > - reg = BUF_CLR; > - writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); > - > - /* Set normal AUX CH command */ > - reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); > - reg &= ~ADDR_ONLY; > - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); > - > - /* > - * If Rx sends defer, Tx sends only reads > - * request without sending address > - */ > - if (!defer) > - retval = analogix_dp_select_i2c_device(dp, > - device_addr, reg_addr + i); > - else > - defer = 0; > - > - if (retval == 0) { > - /* > - * Set I2C transaction and write data > - * If bit 3 is 1, DisplayPort transaction. > - * If Bit 3 is 0, I2C transaction. > - */ > - reg = AUX_LENGTH(16) | > - AUX_TX_COMM_I2C_TRANSACTION | > - AUX_TX_COMM_READ; > - writel(reg, dp->reg_base + > - ANALOGIX_DP_AUX_CH_CTL_1); > - > - /* Start AUX transaction */ > - retval = analogix_dp_start_aux_transaction(dp); > - if (retval == 0) > - break; > - > - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", > - __func__); > - } > - /* Check if Rx sends defer */ > - reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM); > - if (reg == AUX_RX_COMM_AUX_DEFER || > - reg == AUX_RX_COMM_I2C_DEFER) { > - dev_err(dp->dev, "Defer: %d\n\n", reg); > - defer = 1; > - } > - } > - > - for (cur_data_idx = 0; cur_data_idx < 16; cur_data_idx++) { > - reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 > - + 4 * cur_data_idx); > - edid[i + cur_data_idx] = (unsigned char)reg; > - } > - } > - > - return retval; > -} > - > void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype) > { > u32 reg;