From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57790) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1baZWt-0006cF-2y for qemu-devel@nongnu.org; Thu, 18 Aug 2016 22:27:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1baZWo-0007Yl-SN for qemu-devel@nongnu.org; Thu, 18 Aug 2016 22:27:29 -0400 Received: from [59.151.112.132] (port=45181 helo=heian.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1baZWo-0007XF-FJ for qemu-devel@nongnu.org; Thu, 18 Aug 2016 22:27:26 -0400 References: <1470799131-26024-1-git-send-email-caoj.fnst@cn.fujitsu.com> From: Cao jin Message-ID: <57B67083.9000706@cn.fujitsu.com> Date: Fri, 19 Aug 2016 10:35:47 +0800 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH RFC] msix_init: input params *_offset isn't the real one List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Marcel Apfelbaum , qemu-devel@nongnu.org Cc: mst@redhat.com, alex.williamson@redhat.com On 08/18/2016 06:54 PM, Marcel Apfelbaum wrote: > On 08/10/2016 06:18 AM, Cao jin wrote: >> The parameter table_offset & pba_offset is kind of confusing, they >> shouldn't >> include bir field. >> >> Signed-off-by: Cao jin >> --- >> > > Hi, > >> According to the passed arguments, I guess all the callers of msix_init() >> has the same feeling with me, but I am not quite sure about this, so, >> RFC. >> >> hw/pci/msix.c | 7 +++---- >> 1 file changed, 3 insertions(+), 4 deletions(-) >> >> diff --git a/hw/pci/msix.c b/hw/pci/msix.c >> index 0ec1cb1..3a16d83 100644 >> --- a/hw/pci/msix.c >> +++ b/hw/pci/msix.c >> @@ -264,8 +264,7 @@ int msix_init(struct PCIDevice *dev, unsigned >> short nentries, >> if ((table_bar_nr == pba_bar_nr && >> ranges_overlap(table_offset, table_size, pba_offset, >> pba_size)) || >> table_offset + table_size > memory_region_size(table_bar) || >> - pba_offset + pba_size > memory_region_size(pba_bar) || >> - (table_offset | pba_offset) & PCI_MSIX_FLAGS_BIRMASK) { >> + pba_offset + pba_size > memory_region_size(pba_bar)) { >> return -EINVAL; > > I think we should keep the '(table_offset | pba_offset) & > PCI_MSIX_FLAGS_BIRMASK)' > test since it is required by spec, please see: PCI Spec "6.8.2.4. Table > Offset/Table BIR for MSI-X" > > Table offset: ...The lower 3 Table BIR bits are masked off (set to > zero) by software > to form a 32-bit QWORD -aligned offset. > > This function gets the offset parameters as the whole 32-BIT QWORD and > checks it does not collide > with the BIR offset. > Hi Marcel, Thanks very much for pointing the accurate reference out. I also checked how kernel code handle this field, it is just like you said. Sorry for this noise. Cao jin > >> } >> >> @@ -282,8 +281,8 @@ int msix_init(struct PCIDevice *dev, unsigned >> short nentries, >> dev->msix_entries_nr = nentries; >> dev->msix_function_masked = true; >> >> - pci_set_long(config + PCI_MSIX_TABLE, table_offset | table_bar_nr); >> - pci_set_long(config + PCI_MSIX_PBA, pba_offset | pba_bar_nr); >> + pci_set_long(config + PCI_MSIX_TABLE, (table_offset << 3) | >> table_bar_nr); >> + pci_set_long(config + PCI_MSIX_PBA, (pba_offset << 3) | pba_bar_nr); >> > > Here is a similar issue. Your interpretation suggests we need to shift > left the offset > to make room for BIR, but I think current implementation looks at it > differently already > receiving the offset as a 32-bit QWORD and simply does not "look" to the > lower bits > implying them 0. > > Thanks, > Marcel >