diff for duplicates of <57D95BBC.9030405@hisilicon.com> diff --git a/a/1.txt b/N1/1.txt index a2da06b..9a8a667 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,7 +2,7 @@ Hi, Arnd On 2016/9/14 20:24, Arnd Bergmann wrote: > On Wednesday, September 14, 2016 8:15:51 PM CEST Zhichang Yuan wrote: ->> From: "zhichang.yuan" <yuanzhichang@hisilicon.com> +>> From: "zhichang.yuan" <yuanzhichang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> >> >> For arm64, there is no I/O space as other architectural platforms, such as >> X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs, @@ -18,7 +18,7 @@ On 2016/9/14 20:24, Arnd Bergmann wrote: >> those target peripherals will be called. Through this way, those upper layer >> drivers which depend on in/out can run on Hip06 without any changes. >> ->> Signed-off-by: zhichang.yuan <yuanzhichang@hisilicon.com> +>> Signed-off-by: zhichang.yuan <yuanzhichang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> > > Looks ok overall, but I have a couple of comments for details. > @@ -226,7 +226,7 @@ I had applied this way above. >> @@ -0,0 +1,49 @@ >> +/* >> + * Copyright (C) 2016 Hisilicon Limited, All Rights Reserved. ->> + * Author: Zhichang Yuan <yuanzhichang@hisilicon.com> +>> + * Author: Zhichang Yuan <yuanzhichang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> >> + * Author: Zou Rongrong <@huawei.com> >> + * >> + * This program is free software; you can redistribute it and/or modify @@ -263,4 +263,9 @@ Zhichang > Arnd > > . -> +> + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index 75355b4..780149a 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,35 +1,35 @@ "ref\01473855354-150093-1-git-send-email-yuanzhichang@hisilicon.com\0" "ref\01473855354-150093-2-git-send-email-yuanzhichang@hisilicon.com\0" "ref\08337589.pzGt0MZ9xn@wuerfel\0" - "From\0zhichang.yuan <yuanzhichang@hisilicon.com>\0" + "From\0zhichang.yuan <yuanzhichang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>\0" "Subject\0Re: [PATCH V3 1/4] ARM64 LPC: Indirect ISA port IO introduced\0" "Date\0Wed, 14 Sep 2016 22:16:28 +0800\0" - "To\0Arnd Bergmann <arnd@arndb.de>" - " <linux-arm-kernel@lists.infradead.org>\0" - "Cc\0<linux-kernel@vger.kernel.org>" - <linuxarm@huawei.com> - <devicetree@vger.kernel.org> - <lorenzo.pieralisi@arm.com> - <benh@kernel.crashing.org> - <minyard@acm.org> - <linux-pci@vger.kernel.org> - <gabriele.paoloni@huawei.com> - <john.garry@huawei.com> - <will.deacon@arm.com> - <xuwei5@hisilicon.com> - <linux-serial@vger.kernel.org> - <gregkh@linuxfoundation.org> - <zourongrong@gmail.com> - <liviu.dudau@arm.com> - <kantyzc@163.com> - " <zhichang.yuan02@gmail.com>\0" + "To\0Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>" + " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" + "Cc\0linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" + linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org + benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org + minyard-HInyCGIudOg@public.gmane.org + linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + gabriele.paoloni-hv44wF8Li93QT0dZR+AlfA@public.gmane.org + john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org + will.deacon-5wv7dgnIgG8@public.gmane.org + xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org + linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org + zourongrong-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org + liviu.dudau-5wv7dgnIgG8@public.gmane.org + kantyzc-9Onoh4P/yGk@public.gmane.org + " zhichang.yuan02-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0" "\00:1\0" "b\0" "Hi, Arnd\n" "\n" "On 2016/9/14 20:24, Arnd Bergmann wrote:\n" "> On Wednesday, September 14, 2016 8:15:51 PM CEST Zhichang Yuan wrote:\n" - ">> From: \"zhichang.yuan\" <yuanzhichang@hisilicon.com>\n" + ">> From: \"zhichang.yuan\" <yuanzhichang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>\n" ">>\n" ">> For arm64, there is no I/O space as other architectural platforms, such as\n" ">> X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs,\n" @@ -45,7 +45,7 @@ ">> those target peripherals will be called. Through this way, those upper layer\n" ">> drivers which depend on in/out can run on Hip06 without any changes.\n" ">>\n" - ">> Signed-off-by: zhichang.yuan <yuanzhichang@hisilicon.com>\n" + ">> Signed-off-by: zhichang.yuan <yuanzhichang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>\n" "> \n" "> Looks ok overall, but I have a couple of comments for details.\n" "> \n" @@ -253,7 +253,7 @@ ">> @@ -0,0 +1,49 @@\n" ">> +/*\n" ">> + * Copyright (C) 2016 Hisilicon Limited, All Rights Reserved.\n" - ">> + * Author: Zhichang Yuan <yuanzhichang@hisilicon.com>\n" + ">> + * Author: Zhichang Yuan <yuanzhichang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>\n" ">> + * Author: Zou Rongrong <@huawei.com>\n" ">> + *\n" ">> + * This program is free software; you can redistribute it and/or modify\n" @@ -290,6 +290,11 @@ "> \tArnd\n" "> \n" "> .\n" - > + "> \n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -83dddd2c9e997b0e3cb35c8f5840141190143646b89055e12e1470207d87202a +a19f129ca12d80ff8dc993e4dfbaa56641d6af540335c45a2d9dd0ea72bd5dcd
diff --git a/a/content_digest b/N2/content_digest index 75355b4..91da893 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,28 +1,10 @@ "ref\01473855354-150093-1-git-send-email-yuanzhichang@hisilicon.com\0" "ref\01473855354-150093-2-git-send-email-yuanzhichang@hisilicon.com\0" "ref\08337589.pzGt0MZ9xn@wuerfel\0" - "From\0zhichang.yuan <yuanzhichang@hisilicon.com>\0" - "Subject\0Re: [PATCH V3 1/4] ARM64 LPC: Indirect ISA port IO introduced\0" + "From\0yuanzhichang@hisilicon.com (zhichang.yuan)\0" + "Subject\0[PATCH V3 1/4] ARM64 LPC: Indirect ISA port IO introduced\0" "Date\0Wed, 14 Sep 2016 22:16:28 +0800\0" - "To\0Arnd Bergmann <arnd@arndb.de>" - " <linux-arm-kernel@lists.infradead.org>\0" - "Cc\0<linux-kernel@vger.kernel.org>" - <linuxarm@huawei.com> - <devicetree@vger.kernel.org> - <lorenzo.pieralisi@arm.com> - <benh@kernel.crashing.org> - <minyard@acm.org> - <linux-pci@vger.kernel.org> - <gabriele.paoloni@huawei.com> - <john.garry@huawei.com> - <will.deacon@arm.com> - <xuwei5@hisilicon.com> - <linux-serial@vger.kernel.org> - <gregkh@linuxfoundation.org> - <zourongrong@gmail.com> - <liviu.dudau@arm.com> - <kantyzc@163.com> - " <zhichang.yuan02@gmail.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi, Arnd\n" @@ -292,4 +274,4 @@ "> .\n" > -83dddd2c9e997b0e3cb35c8f5840141190143646b89055e12e1470207d87202a +f111830017711837545b8ebc1bdafb885d455cb98e43e2860a3ffbf93a593fc1
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