diff for duplicates of <57DC067B.3050003@arm.com>

diff --git a/a/1.txt b/N1/1.txt
index 8f3a6cc..272fe9c 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -61,7 +61,7 @@ On 16/09/16 04:21, AKASHI Takahiro wrote:
 Here is my logic, I may have missed something obvious, see what you think:
 
 SPSR_EL{1,2} shows the CPU mode 'M' in bits 0-4, From aarch64 bit 4 is always 0.
-From the register definitions in the ARM-ARM C5.2, likely values in 0-3 are:
+>From the register definitions in the ARM-ARM C5.2, likely values in 0-3 are:
 0100 EL1t
 0101 EL1h
 1000 EL2t
@@ -161,9 +161,3 @@ But I think we should leave it as it is for now,
 Thanks,
 
 James
-
-
-_______________________________________________
-kexec mailing list
-kexec@lists.infradead.org
-http://lists.infradead.org/mailman/listinfo/kexec
diff --git a/a/content_digest b/N1/content_digest
index 7b29b46..dce7cb9 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,19 +2,10 @@
  "ref\020160907042908.6232-3-takahiro.akashi@linaro.org\0"
  "ref\057D9925D.5000508@arm.com\0"
  "ref\020160915114815.GK16712@linaro.org\0"
- "From\0James Morse <james.morse@arm.com>\0"
- "Subject\0Re: [PATCH v26 2/7] arm64: kdump: implement machine_crash_shutdown()\0"
+ "From\0james.morse@arm.com (James Morse)\0"
+ "Subject\0[PATCH v26 2/7] arm64: kdump: implement machine_crash_shutdown()\0"
  "Date\0Fri, 16 Sep 2016 15:49:31 +0100\0"
- "To\0AKASHI Takahiro <takahiro.akashi@linaro.org>\0"
- "Cc\0mark.rutland@arm.com"
-  geoff@infradead.org
-  catalin.marinas@arm.com
-  will.deacon@arm.com
-  Marc Zyngier <Marc.Zyngier@arm.com>
-  bauerman@linux.vnet.ibm.com
-  dyoung@redhat.com
-  kexec@lists.infradead.org
- " linux-arm-kernel@lists.infradead.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On 16/09/16 04:21, AKASHI Takahiro wrote:\n"
@@ -80,7 +71,7 @@
  "Here is my logic, I may have missed something obvious, see what you think:\n"
  "\n"
  "SPSR_EL{1,2} shows the CPU mode 'M' in bits 0-4, From aarch64 bit 4 is always 0.\n"
- "From the register definitions in the ARM-ARM C5.2, likely values in 0-3 are:\n"
+ ">From the register definitions in the ARM-ARM C5.2, likely values in 0-3 are:\n"
  "0100 EL1t\n"
  "0101 EL1h\n"
  "1000 EL2t\n"
@@ -179,12 +170,6 @@
  "\n"
  "Thanks,\n"
  "\n"
- "James\n"
- "\n"
- "\n"
- "_______________________________________________\n"
- "kexec mailing list\n"
- "kexec@lists.infradead.org\n"
- http://lists.infradead.org/mailman/listinfo/kexec
+ James
 
-38dd6a0c631c46287cbdb177aa617c5ffbb3b6affe972498fc1aaadbb7c0e731
+9e6b19c07e038cb71626079280a0d06d479fe017517595fab067360bc3024286
