From: Alexander Graf <agraf@suse.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [RFC PATCH 01/10] sun6i: Restrict some register initialization to Allwinner A31 SoC
Date: Thu, 3 Nov 2016 09:52:24 +0100 [thread overview]
Message-ID: <581AFAC8.7080706@suse.de> (raw)
In-Reply-To: <1478137001-847-2-git-send-email-andre.przywara@arm.com>
On 11/03/2016 02:36 AM, Andre Przywara wrote:
> These days many Allwinner SoCs use clock_sun6i.c, although out of them
> only the (original sun6i) A31 has a second MBUS clock register.
> Also setting up the PRCM PLL_CTLR1 register to provide the proper voltage
> seems to be an A31-only feature as well.
> So restrict the initialization to this SoC only to avoid writing bogus
> values to (undefined) registers in other chips.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
(However I haven't counter-checked with specs)
Alex
next prev parent reply other threads:[~2016-11-03 8:52 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-03 1:36 [U-Boot] [RFC PATCH 00/10] sunxi: Allwinner A64 SPL support Andre Przywara
2016-11-03 1:36 ` [U-Boot] [RFC PATCH 01/10] sun6i: Restrict some register initialization to Allwinner A31 SoC Andre Przywara
2016-11-03 8:52 ` Alexander Graf [this message]
2016-11-04 13:18 ` Chen-Yu Tsai
2016-11-03 1:36 ` [U-Boot] [RFC PATCH 02/10] Makefile: use "arm64" architecture for U-Boot image files Andre Przywara
2016-11-03 8:54 ` Alexander Graf
2016-11-03 9:08 ` Andre Przywara
2016-11-03 9:10 ` Alexander Graf
2016-11-03 9:14 ` Andre Przywara
2016-11-05 16:11 ` Simon Glass
2016-11-03 1:36 ` [U-Boot] [RFC PATCH 03/10] sunxi: provide default DRAM config for sun50i in Kconfig Andre Przywara
2016-11-03 8:54 ` Alexander Graf
2016-11-03 9:10 ` Andre Przywara
2016-11-03 9:13 ` Hans de Goede
2016-11-03 9:17 ` Andre Przywara
2016-11-03 9:35 ` Hans de Goede
2016-11-03 1:36 ` [U-Boot] [RFC PATCH 04/10] sunxi: H3: add and rename some DRAM contoller registers Andre Przywara
2016-11-03 1:36 ` [U-Boot] [RFC PATCH 05/10] sunxi: H3: add DRAM controller single bit delay support Andre Przywara
2016-11-03 1:36 ` [U-Boot] [RFC PATCH 06/10] sunxi: A64: use H3 DRAM initialization code for A64 Andre Przywara
2016-11-03 1:36 ` [U-Boot] [RFC PATCH 07/10] sunxi: H3/A64: fix non-ODT setting Andre Przywara
2016-11-03 1:36 ` [U-Boot] [RFC PATCH 08/10] SPL: read and store arch property from U-Boot image Andre Przywara
2016-11-05 16:10 ` Simon Glass
2016-11-18 1:50 ` André Przywara
2016-11-19 13:49 ` Simon Glass
2016-11-19 16:35 ` André Przywara
2016-11-19 19:59 ` Simon Glass
2016-11-03 1:36 ` [U-Boot] [RFC PATCH 09/10] sunxi: introduce RMR switch to enter payloads in 64-bit mode Andre Przywara
2016-11-05 16:10 ` Simon Glass
2016-11-03 1:36 ` [U-Boot] [RFC PATCH 10/10] sunxi: A64: add 32-bit SPL support Andre Przywara
2016-11-03 8:49 ` [U-Boot] [RFC PATCH 00/10] sunxi: Allwinner A64 " Alexander Graf
2016-11-03 9:34 ` Hans de Goede
2016-11-03 9:51 ` Andre Przywara
2016-11-03 10:36 ` Alexander Graf
2016-11-03 10:49 ` Hans de Goede
2016-11-03 11:36 ` Alexander Graf
2016-11-03 9:38 ` Andre Przywara
2016-11-03 9:45 ` Hans de Goede
2016-11-09 9:21 ` Andre Przywara
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