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From: Peter Wu <lekensteyn@gmail.com>
To: Francois Romieu <romieu@fr.zoreil.com>
Cc: netdev@vger.kernel.org, nic_swsd@realtek.com,
	Hayes Wang <hayeswang@realtek.com>
Subject: Re: [PATCH] r8169: remember WOL preferences on driver load
Date: Wed, 14 Aug 2013 14:56:53 +0200	[thread overview]
Message-ID: <5823402.G5n4G2k0Uv@al> (raw)
In-Reply-To: <20130813212843.GB5635@electric-eye.fr.zoreil.com>

On Tuesday 13 August 2013 23:28:43 Francois Romieu wrote:
> > The r8168 vendor driver used to write to both Config1 and Config5, but
> > in recent versions, this is commented out. Here we keep writing PMEnable
> > to Config1 because there may be older chips where PMEnable is not sticky.
> 
> <sneak regression paranoia>
> Please include the bits you want to keep in the "&" mask.
> </sneak regression paranoia>

I previously tried:

    RTL_W8(Config5, RTL_R8(Config5) & (BWF | MWF | UWF | LanWake | PMEStatus));

but then I realized that the Realtek r8168 vendor driver does not touch this 
register on load. The bits not included in the above mask are 2, 3 and 7. On 
most datasheets for recent hardware, these are marked reserved.

For RTL8100C(L) (datasheet 1.3 from 2007), RTL8139D(L) (datasheet 1.3 from 
2005) and RTL8101L (1.6 from 2008)
- bit 2 is Link Down Power Saving mode (1=disable, 0=enable; loaded from 
EEPROM on RTL8139D(L))
- bit 3 is FIFOAddrPtr (internal use for testing FIFO SRAM, default 0)
- bit 7 is reserved

I'll let Hayes judge which approach is more appropriate.

Regards,
Peter

  reply	other threads:[~2013-08-14 12:56 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-13 20:19 [PATCH] r8169: remember WOL preferences on driver load Peter Wu
2013-08-13 21:28 ` Francois Romieu
2013-08-14 12:56   ` Peter Wu [this message]
2013-08-15  6:09     ` hayeswang
  -- strict thread matches above, loose matches on Subject: below --
2013-08-17  9:00 Peter Wu
2013-08-20 22:10 ` David Miller
2013-08-20 23:12   ` Francois Romieu
2013-08-20 23:48     ` David Miller

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