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diff --git a/a/1.txt b/N1/1.txt
index 50afde1..5633a07 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -7,8 +7,8 @@ On Friday 11 November 2016 12:00 AM, Mark Rutland wrote:
 >> 	1) Device tree bindings for Hisilicon SoC PMU.
 >> 	2) Add example for Hisilicon L3 cache, MN and DDRC PMU.
 >>
->> Signed-off-by: Anurup M<anurup.m@huawei.com>
->> Signed-off-by: Shaokun Zhang<zhangshaokun@hisilicon.com>
+>> Signed-off-by: Anurup M<anurup.m-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
+>> Signed-off-by: Shaokun Zhang<zhangshaokun-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
 >> ---
 >>   .../devicetree/bindings/arm/hisilicon/pmu.txt      | 127 +++++++++++++++++++++
 >>   1 file changed, 127 insertions(+)
@@ -166,7 +166,7 @@ Anurup
 >> +
 >> +Example:
 >> +	/* DDRC for CPU die scl #2 Channel #1 for hip05 */
->> +	pmu_sccl0_ddrc1: pmu_ddrc1 at 80358000 {
+>> +	pmu_sccl0_ddrc1: pmu_ddrc1@80358000 {
 >> +		 compatible = "hisilicon,hisi-pmu-ddrc-v1";
 >> +		 scl-id = <0x02>;
 >> +		 ch-id = <0x1>;
@@ -177,3 +177,8 @@ Anurup
 >> -- 
 >> 2.1.4
 >>
+
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index 0ad961c..f704b1d 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,10 +1,33 @@
  "ref\01478151727-20250-1-git-send-email-anurup.m@huawei.com\0"
  "ref\01478151727-20250-6-git-send-email-anurup.m@huawei.com\0"
  "ref\020161110183040.GD10137@leverpostej\0"
- "From\0anurupvasu@gmail.com (Anurup M)\0"
- "Subject\0[RESEND PATCH v1 05/11] dt-bindings: perf: hisi: Add Devicetree bindings for Hisilicon SoC PMU\0"
+ "From\0Anurup M <anurupvasu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
+ "Subject\0Re: [RESEND PATCH v1 05/11] dt-bindings: perf: hisi: Add Devicetree bindings for Hisilicon SoC PMU\0"
  "Date\0Mon, 14 Nov 2016 05:36:44 +0530\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>\0"
+ "Cc\0devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+  linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  will.deacon-5wv7dgnIgG8@public.gmane.org
+  corbet-T1hC0tSOHrs@public.gmane.org
+  catalin.marinas-5wv7dgnIgG8@public.gmane.org
+  robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
+  arnd-r2nGTMty4D4@public.gmane.org
+  f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
+  rmk+kernel-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org
+  krzk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
+  anurup.m-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
+  zhangshaokun-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org
+  tanxiaojun-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
+  xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org
+  sanil.kumar-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org
+  john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
+  gabriele.paoloni-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
+  shiju.jose-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
+  wangkefeng.wang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
+  guohanjun-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
+  shyju.pv-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
+ " linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "\n"
@@ -16,8 +39,8 @@
  ">> \t1) Device tree bindings for Hisilicon SoC PMU.\n"
  ">> \t2) Add example for Hisilicon L3 cache, MN and DDRC PMU.\n"
  ">>\n"
- ">> Signed-off-by: Anurup M<anurup.m@huawei.com>\n"
- ">> Signed-off-by: Shaokun Zhang<zhangshaokun@hisilicon.com>\n"
+ ">> Signed-off-by: Anurup M<anurup.m-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\n"
+ ">> Signed-off-by: Shaokun Zhang<zhangshaokun-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>\n"
  ">> ---\n"
  ">>   .../devicetree/bindings/arm/hisilicon/pmu.txt      | 127 +++++++++++++++++++++\n"
  ">>   1 file changed, 127 insertions(+)\n"
@@ -175,7 +198,7 @@
  ">> +\n"
  ">> +Example:\n"
  ">> +\t/* DDRC for CPU die scl #2 Channel #1 for hip05 */\n"
- ">> +\tpmu_sccl0_ddrc1: pmu_ddrc1 at 80358000 {\n"
+ ">> +\tpmu_sccl0_ddrc1: pmu_ddrc1@80358000 {\n"
  ">> +\t\t compatible = \"hisilicon,hisi-pmu-ddrc-v1\";\n"
  ">> +\t\t scl-id = <0x02>;\n"
  ">> +\t\t ch-id = <0x1>;\n"
@@ -185,6 +208,11 @@
  ">> +\t };\n"
  ">> -- \n"
  ">> 2.1.4\n"
- >>
+ ">>\n"
+ "\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
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+cba7a8380df0fecce3ceea50afb1718e8d3701b12ec856e83814f1ab9f0cb1e1

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