From mboxrd@z Thu Jan 1 00:00:00 1970 From: zourongrong@huawei.com (Rongrong Zou) Date: Thu, 17 Nov 2016 12:05:34 +0800 Subject: [PATCH v7 1/7] drm/hisilicon/hibmc: Add hisilicon hibmc drm master driver In-Reply-To: References: <1479303831-74134-1-git-send-email-zourongrong@gmail.com> <1479303831-74134-2-git-send-email-zourongrong@gmail.com> Message-ID: <582D2C8E.1090300@huawei.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Sean, Thanks for reviewing. ? 2016/11/16 23:42, Sean Paul ??: > On Wed, Nov 16, 2016 at 8:43 AM, Rongrong Zou wrote: >> Add DRM master driver for Hisilicon Hibmc SoC which used for >> Out-of-band management. Blow is the general hardware connection, >> both the Hibmc and the host CPU are on the same mother board. >> >> +----------+ +----------+ >> | | PCIe | Hibmc | >> |host CPU( |<----->| display | >> |arm64,x86)| |subsystem | >> +----------+ +----------+ >> >> Signed-off-by: Rongrong Zou >> --- > > In the future, please keep track of the differences between patch > versions. I noticed you have a short changelog in the cover letter, > but it really helps to add one per-patch as well, it makes reviewing > much simpler. > > Reviewed-by: Sean Paul Sorry for that, I will pay attention to it later, thanks. Regards, Rongrong. > > >> drivers/gpu/drm/hisilicon/Kconfig | 1 + >> drivers/gpu/drm/hisilicon/Makefile | 1 + >> drivers/gpu/drm/hisilicon/hibmc/Kconfig | 9 + >> drivers/gpu/drm/hisilicon/hibmc/Makefile | 4 + >> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 308 +++++++++++++++++++++++ >> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 41 +++ >> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h | 196 +++++++++++++++ >> 7 files changed, 560 insertions(+) >> create mode 100644 drivers/gpu/drm/hisilicon/hibmc/Kconfig >> create mode 100644 drivers/gpu/drm/hisilicon/hibmc/Makefile >> create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c >> create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h >> create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h >> >> diff --git a/drivers/gpu/drm/hisilicon/Kconfig b/drivers/gpu/drm/hisilicon/Kconfig >> index 558c61b..2fd2724 100644 >> --- a/drivers/gpu/drm/hisilicon/Kconfig >> +++ b/drivers/gpu/drm/hisilicon/Kconfig >> @@ -2,4 +2,5 @@ >> # hisilicon drm device configuration. >> # Please keep this list sorted alphabetically >> >> +source "drivers/gpu/drm/hisilicon/hibmc/Kconfig" >> source "drivers/gpu/drm/hisilicon/kirin/Kconfig" >> diff --git a/drivers/gpu/drm/hisilicon/Makefile b/drivers/gpu/drm/hisilicon/Makefile >> index e3f6d49..c8155bf 100644 >> --- a/drivers/gpu/drm/hisilicon/Makefile >> +++ b/drivers/gpu/drm/hisilicon/Makefile >> @@ -2,4 +2,5 @@ >> # Makefile for hisilicon drm drivers. >> # Please keep this list sorted alphabetically >> >> +obj-$(CONFIG_DRM_HISI_HIBMC) += hibmc/ >> obj-$(CONFIG_DRM_HISI_KIRIN) += kirin/ >> diff --git a/drivers/gpu/drm/hisilicon/hibmc/Kconfig b/drivers/gpu/drm/hisilicon/hibmc/Kconfig >> new file mode 100644 >> index 0000000..380622a >> --- /dev/null >> +++ b/drivers/gpu/drm/hisilicon/hibmc/Kconfig >> @@ -0,0 +1,9 @@ >> +config DRM_HISI_HIBMC >> + tristate "DRM Support for Hisilicon Hibmc" >> + depends on DRM && PCI >> + select DRM_KMS_HELPER >> + select DRM_TTM >> + >> + help >> + Choose this option if you have a Hisilicon Hibmc soc chipset. >> + If M is selected the module will be called hibmc-drm. >> diff --git a/drivers/gpu/drm/hisilicon/hibmc/Makefile b/drivers/gpu/drm/hisilicon/hibmc/Makefile >> new file mode 100644 >> index 0000000..47962a0 >> --- /dev/null >> +++ b/drivers/gpu/drm/hisilicon/hibmc/Makefile >> @@ -0,0 +1,4 @@ >> +ccflags-y := -Iinclude/drm >> +hibmc-drm-y := hibmc_drm_drv.o >> + >> +obj-$(CONFIG_DRM_HISI_HIBMC) += hibmc-drm.o >> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c >> new file mode 100644 >> index 0000000..6d20580 >> --- /dev/null >> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c >> @@ -0,0 +1,308 @@ >> +/* Hisilicon Hibmc SoC drm driver >> + * >> + * Based on the bochs drm driver. >> + * >> + * Copyright (c) 2016 Huawei Limited. >> + * >> + * Author: >> + * Rongrong Zou >> + * Rongrong Zou >> + * Jianhua Li >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License as published by >> + * the Free Software Foundation; either version 2 of the License, or >> + * (at your option) any later version. >> + * >> + */ >> + >> +#include >> +#include >> + >> +#include "hibmc_drm_drv.h" >> +#include "hibmc_drm_regs.h" >> + >> +static const struct file_operations hibmc_fops = { >> + .owner = THIS_MODULE, >> + .open = drm_open, >> + .release = drm_release, >> + .unlocked_ioctl = drm_ioctl, >> + .compat_ioctl = drm_compat_ioctl, >> + .poll = drm_poll, >> + .read = drm_read, >> + .llseek = no_llseek, >> +}; >> + >> +static int hibmc_enable_vblank(struct drm_device *dev, unsigned int pipe) >> +{ >> + return 0; >> +} >> + >> +static void hibmc_disable_vblank(struct drm_device *dev, unsigned int pipe) >> +{ >> +} >> + >> +static struct drm_driver hibmc_driver = { >> + .fops = &hibmc_fops, >> + .name = "hibmc", >> + .date = "20160828", >> + .desc = "hibmc drm driver", >> + .major = 1, >> + .minor = 0, >> + .get_vblank_counter = drm_vblank_no_hw_counter, >> + .enable_vblank = hibmc_enable_vblank, >> + .disable_vblank = hibmc_disable_vblank, >> +}; >> + >> +static int hibmc_pm_suspend(struct device *dev) >> +{ >> + return 0; >> +} >> + >> +static int hibmc_pm_resume(struct device *dev) >> +{ >> + return 0; >> +} >> + >> +static const struct dev_pm_ops hibmc_pm_ops = { >> + SET_SYSTEM_SLEEP_PM_OPS(hibmc_pm_suspend, >> + hibmc_pm_resume) >> +}; >> + >> +/* >> + * It can operate in one of three modes: 0, 1 or Sleep. >> + */ >> +void hibmc_set_power_mode(struct hibmc_drm_private *priv, >> + unsigned int power_mode) >> +{ >> + unsigned int control_value = 0; >> + void __iomem *mmio = priv->mmio; >> + unsigned int input = 1; >> + >> + if (power_mode > HIBMC_PW_MODE_CTL_MODE_SLEEP) >> + return; >> + >> + if (power_mode == HIBMC_PW_MODE_CTL_MODE_SLEEP) >> + input = 0; >> + >> + control_value = readl(mmio + HIBMC_POWER_MODE_CTRL); >> + control_value &= ~(HIBMC_PW_MODE_CTL_MODE_MASK | >> + HIBMC_PW_MODE_CTL_OSC_INPUT_MASK); >> + control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE, power_mode); >> + control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT, input); >> + writel(control_value, mmio + HIBMC_POWER_MODE_CTRL); >> +} >> + >> +void hibmc_set_current_gate(struct hibmc_drm_private *priv, unsigned int gate) >> +{ >> + unsigned int gate_reg; >> + unsigned int mode; >> + void __iomem *mmio = priv->mmio; >> + >> + /* Get current power mode. */ >> + mode = (readl(mmio + HIBMC_POWER_MODE_CTRL) & >> + HIBMC_PW_MODE_CTL_MODE_MASK) >> HIBMC_PW_MODE_CTL_MODE_SHIFT; >> + >> + switch (mode) { >> + case HIBMC_PW_MODE_CTL_MODE_MODE0: >> + gate_reg = HIBMC_MODE0_GATE; >> + break; >> + >> + case HIBMC_PW_MODE_CTL_MODE_MODE1: >> + gate_reg = HIBMC_MODE1_GATE; >> + break; >> + >> + default: >> + gate_reg = HIBMC_MODE0_GATE; >> + break; >> + } >> + writel(gate, mmio + gate_reg); >> +} >> + >> +static void hibmc_hw_config(struct hibmc_drm_private *priv) >> +{ >> + unsigned int reg; >> + >> + /* On hardware reset, power mode 0 is default. */ >> + hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_MODE0); >> + >> + /* Enable display power gate & LOCALMEM power gate*/ >> + reg = readl(priv->mmio + HIBMC_CURRENT_GATE); >> + reg &= ~HIBMC_CURR_GATE_DISPLAY_MASK; >> + reg &= ~HIBMC_CURR_GATE_LOCALMEM_MASK; >> + reg |= HIBMC_CURR_GATE_DISPLAY(1); >> + reg |= HIBMC_CURR_GATE_LOCALMEM(1); >> + >> + hibmc_set_current_gate(priv, reg); >> + >> + /* >> + * Reset the memory controller. If the memory controller >> + * is not reset in chip,the system might hang when sw accesses >> + * the memory.The memory should be resetted after >> + * changing the MXCLK. >> + */ >> + reg = readl(priv->mmio + HIBMC_MISC_CTRL); >> + reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK; >> + reg |= HIBMC_MSCCTL_LOCALMEM_RESET(0); >> + writel(reg, priv->mmio + HIBMC_MISC_CTRL); >> + >> + reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK; >> + reg |= HIBMC_MSCCTL_LOCALMEM_RESET(1); >> + >> + writel(reg, priv->mmio + HIBMC_MISC_CTRL); >> +} >> + >> +static int hibmc_hw_map(struct hibmc_drm_private *priv) >> +{ >> + struct drm_device *dev = priv->dev; >> + struct pci_dev *pdev = dev->pdev; >> + resource_size_t addr, size, ioaddr, iosize; >> + >> + ioaddr = pci_resource_start(pdev, 1); >> + iosize = pci_resource_len(pdev, 1); >> + priv->mmio = devm_ioremap_nocache(dev->dev, ioaddr, iosize); >> + if (!priv->mmio) { >> + DRM_ERROR("Cannot map mmio region\n"); >> + return -ENOMEM; >> + } >> + >> + addr = pci_resource_start(pdev, 0); >> + size = pci_resource_len(pdev, 0); >> + priv->fb_map = devm_ioremap(dev->dev, addr, size); >> + if (!priv->fb_map) { >> + DRM_ERROR("Cannot map framebuffer\n"); >> + return -ENOMEM; >> + } >> + priv->fb_base = addr; >> + priv->fb_size = size; >> + >> + return 0; >> +} >> + >> +static int hibmc_hw_init(struct hibmc_drm_private *priv) >> +{ >> + int ret; >> + >> + ret = hibmc_hw_map(priv); >> + if (ret) >> + return ret; >> + >> + hibmc_hw_config(priv); >> + >> + return 0; >> +} >> + >> +static int hibmc_unload(struct drm_device *dev) >> +{ >> + return 0; >> +} >> + >> +static int hibmc_load(struct drm_device *dev) >> +{ >> + struct hibmc_drm_private *priv; >> + int ret; >> + >> + priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL); >> + if (!priv) { >> + DRM_ERROR("no memory to allocate for hibmc_drm_private\n"); >> + return -ENOMEM; >> + } >> + dev->dev_private = priv; >> + priv->dev = dev; >> + >> + ret = hibmc_hw_init(priv); >> + if (ret) >> + goto err; >> + >> + return 0; >> + >> +err: >> + hibmc_unload(dev); >> + DRM_ERROR("failed to initialize drm driver: %d\n", ret); >> + return ret; >> +} >> + >> +static int hibmc_pci_probe(struct pci_dev *pdev, >> + const struct pci_device_id *ent) >> +{ >> + struct drm_device *dev; >> + int ret; >> + >> + dev = drm_dev_alloc(&hibmc_driver, &pdev->dev); >> + if (!dev) { >> + DRM_ERROR("failed to allocate drm_device\n"); >> + return -ENOMEM; >> + } >> + >> + dev->pdev = pdev; >> + pci_set_drvdata(pdev, dev); >> + >> + ret = pci_enable_device(pdev); >> + if (ret) { >> + DRM_ERROR("failed to enable pci device: %d\n", ret); >> + goto err_free; >> + } >> + >> + ret = hibmc_load(dev); >> + if (ret) { >> + DRM_ERROR("failed to load hibmc: %d\n", ret); >> + goto err_disable; >> + } >> + >> + ret = drm_dev_register(dev, 0); >> + if (ret) { >> + DRM_ERROR("failed to register drv for userspace access: %d\n", >> + ret); >> + goto err_unload; >> + } >> + return 0; >> + >> +err_unload: >> + hibmc_unload(dev); >> +err_disable: >> + pci_disable_device(pdev); >> +err_free: >> + drm_dev_unref(dev); >> + >> + return ret; >> +} >> + >> +static void hibmc_pci_remove(struct pci_dev *pdev) >> +{ >> + struct drm_device *dev = pci_get_drvdata(pdev); >> + >> + drm_dev_unregister(dev); >> + hibmc_unload(dev); >> + drm_dev_unref(dev); >> +} >> + >> +static struct pci_device_id hibmc_pci_table[] = { >> + {0x19e5, 0x1711, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, >> + {0,} >> +}; >> + >> +static struct pci_driver hibmc_pci_driver = { >> + .name = "hibmc-drm", >> + .id_table = hibmc_pci_table, >> + .probe = hibmc_pci_probe, >> + .remove = hibmc_pci_remove, >> + .driver.pm = &hibmc_pm_ops, >> +}; >> + >> +static int __init hibmc_init(void) >> +{ >> + return pci_register_driver(&hibmc_pci_driver); >> +} >> + >> +static void __exit hibmc_exit(void) >> +{ >> + return pci_unregister_driver(&hibmc_pci_driver); >> +} >> + >> +module_init(hibmc_init); >> +module_exit(hibmc_exit); >> + >> +MODULE_DEVICE_TABLE(pci, hibmc_pci_table); >> +MODULE_AUTHOR("RongrongZou "); >> +MODULE_DESCRIPTION("DRM Driver for Hisilicon Hibmc"); >> +MODULE_LICENSE("GPL v2"); >> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h >> new file mode 100644 >> index 0000000..840cd5a >> --- /dev/null >> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h >> @@ -0,0 +1,41 @@ >> +/* Hisilicon Hibmc SoC drm driver >> + * >> + * Based on the bochs drm driver. >> + * >> + * Copyright (c) 2016 Huawei Limited. >> + * >> + * Author: >> + * Rongrong Zou >> + * Rongrong Zou >> + * Jianhua Li >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License as published by >> + * the Free Software Foundation; either version 2 of the License, or >> + * (at your option) any later version. >> + * >> + */ >> + >> +#ifndef HIBMC_DRM_DRV_H >> +#define HIBMC_DRM_DRV_H >> + >> +#include >> + >> +struct hibmc_drm_private { >> + /* hw */ >> + void __iomem *mmio; >> + void __iomem *fb_map; >> + unsigned long fb_base; >> + unsigned long fb_size; >> + >> + /* drm */ >> + struct drm_device *dev; >> + >> +}; >> + >> +void hibmc_set_power_mode(struct hibmc_drm_private *priv, >> + unsigned int power_mode); >> +void hibmc_set_current_gate(struct hibmc_drm_private *priv, >> + unsigned int gate); >> + >> +#endif >> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h >> new file mode 100644 >> index 0000000..f7035bf >> --- /dev/null >> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h >> @@ -0,0 +1,196 @@ >> +/* Hisilicon Hibmc SoC drm driver >> + * >> + * Based on the bochs drm driver. >> + * >> + * Copyright (c) 2016 Huawei Limited. >> + * >> + * Author: >> + * Rongrong Zou >> + * Rongrong Zou >> + * Jianhua Li >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License as published by >> + * the Free Software Foundation; either version 2 of the License, or >> + * (at your option) any later version. >> + * >> + */ >> + >> +#ifndef HIBMC_DRM_HW_H >> +#define HIBMC_DRM_HW_H >> + >> +/* register definition */ >> +#define HIBMC_MISC_CTRL 0x4 >> + >> +#define HIBMC_MSCCTL_LOCALMEM_RESET(x) ((x) << 6) >> +#define HIBMC_MSCCTL_LOCALMEM_RESET_MASK 0x40 >> + >> +#define HIBMC_CURRENT_GATE 0x000040 >> +#define HIBMC_CURR_GATE_DISPLAY(x) ((x) << 2) >> +#define HIBMC_CURR_GATE_DISPLAY_MASK 0x4 >> + >> +#define HIBMC_CURR_GATE_LOCALMEM(x) ((x) << 1) >> +#define HIBMC_CURR_GATE_LOCALMEM_MASK 0x2 >> + >> +#define HIBMC_MODE0_GATE 0x000044 >> +#define HIBMC_MODE1_GATE 0x000048 >> +#define HIBMC_POWER_MODE_CTRL 0x00004C >> + >> +#define HIBMC_PW_MODE_CTL_OSC_INPUT(x) ((x) << 3) >> +#define HIBMC_PW_MODE_CTL_OSC_INPUT_MASK 0x8 >> + >> +#define HIBMC_PW_MODE_CTL_MODE(x) ((x) << 0) >> +#define HIBMC_PW_MODE_CTL_MODE_MASK 0x03 >> +#define HIBMC_PW_MODE_CTL_MODE_SHIFT 0 >> + >> +#define HIBMC_PW_MODE_CTL_MODE_MODE0 0 >> +#define HIBMC_PW_MODE_CTL_MODE_MODE1 1 >> +#define HIBMC_PW_MODE_CTL_MODE_SLEEP 2 >> + >> +#define HIBMC_PANEL_PLL_CTRL 0x00005C >> +#define HIBMC_CRT_PLL_CTRL 0x000060 >> + >> +#define HIBMC_PLL_CTRL_BYPASS(x) ((x) << 18) >> +#define HIBMC_PLL_CTRL_BYPASS_MASK 0x40000 >> + >> +#define HIBMC_PLL_CTRL_POWER(x) ((x) << 17) >> +#define HIBMC_PLL_CTRL_POWER_MASK 0x20000 >> + >> +#define HIBMC_PLL_CTRL_INPUT(x) ((x) << 16) >> +#define HIBMC_PLL_CTRL_INPUT_MASK 0x10000 >> + >> +#define HIBMC_PLL_CTRL_POD(x) ((x) << 14) >> +#define HIBMC_PLL_CTRL_POD_MASK 0xC000 >> + >> +#define HIBMC_PLL_CTRL_OD(x) ((x) << 12) >> +#define HIBMC_PLL_CTRL_OD_MASK 0x3000 >> + >> +#define HIBMC_PLL_CTRL_N(x) ((x) << 8) >> +#define HIBMC_PLL_CTRL_N_MASK 0xF00 >> + >> +#define HIBMC_PLL_CTRL_M(x) ((x) << 0) >> +#define HIBMC_PLL_CTRL_M_MASK 0xFF >> + >> +#define HIBMC_CRT_DISP_CTL 0x80200 >> + >> +#define HIBMC_CRT_DISP_CTL_CRTSELECT(x) ((x) << 25) >> +#define HIBMC_CRT_DISP_CTL_CRTSELECT_MASK 0x2000000 >> + >> +#define HIBMC_CRTSELECT_CRT 1 >> + >> +#define HIBMC_CRT_DISP_CTL_CLOCK_PHASE(x) ((x) << 14) >> +#define HIBMC_CRT_DISP_CTL_CLOCK_PHASE_MASK 0x4000 >> + >> +#define HIBMC_CRT_DISP_CTL_VSYNC_PHASE(x) ((x) << 13) >> +#define HIBMC_CRT_DISP_CTL_VSYNC_PHASE_MASK 0x2000 >> + >> +#define HIBMC_CRT_DISP_CTL_HSYNC_PHASE(x) ((x) << 12) >> +#define HIBMC_CRT_DISP_CTL_HSYNC_PHASE_MASK 0x1000 >> + >> +#define HIBMC_CRT_DISP_CTL_TIMING(x) ((x) << 8) >> +#define HIBMC_CRT_DISP_CTL_TIMING_MASK 0x100 >> + >> +#define HIBMC_CRT_DISP_CTL_PLANE(x) ((x) << 2) >> +#define HIBMC_CRT_DISP_CTL_PLANE_MASK 4 >> + >> +#define HIBMC_CRT_DISP_CTL_FORMAT(x) ((x) << 0) >> +#define HIBMC_CRT_DISP_CTL_FORMAT_MASK 0x03 >> + >> +#define HIBMC_CRT_FB_ADDRESS 0x080204 >> + >> +#define HIBMC_CRT_FB_WIDTH 0x080208 >> +#define HIBMC_CRT_FB_WIDTH_WIDTH(x) ((x) << 16) >> +#define HIBMC_CRT_FB_WIDTH_WIDTH_MASK 0x3FFF0000 >> +#define HIBMC_CRT_FB_WIDTH_OFFS(x) ((x) << 0) >> +#define HIBMC_CRT_FB_WIDTH_OFFS_MASK 0x3FFF >> + >> +#define HIBMC_CRT_HORZ_TOTAL 0x08020C >> +#define HIBMC_CRT_HORZ_TOTAL_TOTAL(x) ((x) << 16) >> +#define HIBMC_CRT_HORZ_TOTAL_TOTAL_MASK 0xFFF0000 >> + >> +#define HIBMC_CRT_HORZ_TOTAL_DISP_END(x) ((x) << 0) >> +#define HIBMC_CRT_HORZ_TOTAL_DISP_END_MASK 0xFFF >> + >> +#define HIBMC_CRT_HORZ_SYNC 0x080210 >> +#define HIBMC_CRT_HORZ_SYNC_WIDTH(x) ((x) << 16) >> +#define HIBMC_CRT_HORZ_SYNC_WIDTH_MASK 0xFF0000 >> + >> +#define HIBMC_CRT_HORZ_SYNC_START(x) ((x) << 0) >> +#define HIBMC_CRT_HORZ_SYNC_START_MASK 0xFFF >> + >> +#define HIBMC_CRT_VERT_TOTAL 0x080214 >> +#define HIBMC_CRT_VERT_TOTAL_TOTAL(x) ((x) << 16) >> +#define HIBMC_CRT_VERT_TOTAL_TOTAL_MASK 0x7FFF0000 >> + >> +#define HIBMC_CRT_VERT_TOTAL_DISP_END(x) ((x) << 0) >> +#define HIBMC_CRT_VERT_TOTAL_DISP_END_MASK 0x7FF >> + >> +#define HIBMC_CRT_VERT_SYNC 0x080218 >> +#define HIBMC_CRT_VERT_SYNC_HEIGHT(x) ((x) << 16) >> +#define HIBMC_CRT_VERT_SYNC_HEIGHT_MASK 0x3F0000 >> + >> +#define HIBMC_CRT_VERT_SYNC_START(x) ((x) << 0) >> +#define HIBMC_CRT_VERT_SYNC_START_MASK 0x7FF >> + >> +/* Auto Centering */ >> +#define HIBMC_CRT_AUTO_CENTERING_TL 0x080280 >> +#define HIBMC_CRT_AUTO_CENTERING_TL_TOP(x) ((x) << 16) >> +#define HIBMC_CRT_AUTO_CENTERING_TL_TOP_MASK 0x7FF0000 >> + >> +#define HIBMC_CRT_AUTO_CENTERING_TL_LEFT(x) ((x) << 0) >> +#define HIBMC_CRT_AUTO_CENTERING_TL_LEFT_MASK 0x7FF >> + >> +#define HIBMC_CRT_AUTO_CENTERING_BR 0x080284 >> +#define HIBMC_CRT_AUTO_CENTERING_BR_BOTTOM(x) ((x) << 16) >> +#define HIBMC_CRT_AUTO_CENTERING_BR_BOTTOM_MASK 0x7FF0000 >> + >> +#define HIBMC_CRT_AUTO_CENTERING_BR_RIGHT(x) ((x) << 0) >> +#define HIBMC_CRT_AUTO_CENTERING_BR_RIGHT_MASK 0x7FF >> + >> +/* register to control panel output */ >> +#define HIBMC_DISPLAY_CONTROL_HISILE 0x80288 >> +#define HIBMC_DISPLAY_CONTROL_FPVDDEN(x) ((x) << 0) >> +#define HIBMC_DISPLAY_CONTROL_PANELDATE(x) ((x) << 1) >> +#define HIBMC_DISPLAY_CONTROL_FPEN(x) ((x) << 2) >> +#define HIBMC_DISPLAY_CONTROL_VBIASEN(x) ((x) << 3) >> + >> +#define HIBMC_RAW_INTERRUPT 0x80290 >> +#define HIBMC_RAW_INTERRUPT_VBLANK(x) ((x) << 2) >> +#define HIBMC_RAW_INTERRUPT_VBLANK_MASK 0x4 >> + >> +#define HIBMC_RAW_INTERRUPT_EN 0x80298 >> +#define HIBMC_RAW_INTERRUPT_EN_VBLANK(x) ((x) << 2) >> +#define HIBMC_RAW_INTERRUPT_EN_VBLANK_MASK 0x4 >> + >> +/* register and values for PLL control */ >> +#define CRT_PLL1_HS 0x802a8 >> +#define CRT_PLL1_HS_OUTER_BYPASS(x) ((x) << 30) >> +#define CRT_PLL1_HS_INTER_BYPASS(x) ((x) << 29) >> +#define CRT_PLL1_HS_POWERON(x) ((x) << 24) >> + >> +#define CRT_PLL1_HS_25MHZ 0x23d40f02 >> +#define CRT_PLL1_HS_40MHZ 0x23940801 >> +#define CRT_PLL1_HS_65MHZ 0x23940d01 >> +#define CRT_PLL1_HS_78MHZ 0x23540F82 >> +#define CRT_PLL1_HS_74MHZ 0x23941dc2 >> +#define CRT_PLL1_HS_80MHZ 0x23941001 >> +#define CRT_PLL1_HS_80MHZ_1152 0x23540fc2 >> +#define CRT_PLL1_HS_108MHZ 0x23b41b01 >> +#define CRT_PLL1_HS_162MHZ 0x23480681 >> +#define CRT_PLL1_HS_148MHZ 0x23541dc2 >> +#define CRT_PLL1_HS_193MHZ 0x234807c1 >> + >> +#define CRT_PLL2_HS 0x802ac >> +#define CRT_PLL2_HS_25MHZ 0x206B851E >> +#define CRT_PLL2_HS_40MHZ 0x30000000 >> +#define CRT_PLL2_HS_65MHZ 0x40000000 >> +#define CRT_PLL2_HS_78MHZ 0x50E147AE >> +#define CRT_PLL2_HS_74MHZ 0x602B6AE7 >> +#define CRT_PLL2_HS_80MHZ 0x70000000 >> +#define CRT_PLL2_HS_108MHZ 0x80000000 >> +#define CRT_PLL2_HS_162MHZ 0xA0000000 >> +#define CRT_PLL2_HS_148MHZ 0xB0CCCCCD >> +#define CRT_PLL2_HS_193MHZ 0xC0872B02 >> + >> +#define HIBMC_FIELD(field, value) (field(value) & field##_MASK) >> +#endif >> -- >> 1.9.1 >> > _______________________________________________ > linuxarm mailing list > linuxarm at huawei.com > http://rnd-openeuler.huawei.com/mailman/listinfo/linuxarm > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rongrong Zou Subject: Re: [PATCH v7 1/7] drm/hisilicon/hibmc: Add hisilicon hibmc drm master driver Date: Thu, 17 Nov 2016 12:05:34 +0800 Message-ID: <582D2C8E.1090300@huawei.com> References: <1479303831-74134-1-git-send-email-zourongrong@gmail.com> <1479303831-74134-2-git-send-email-zourongrong@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Sean Paul , Rongrong Zou Cc: Mark Rutland , Archit , lijianhua@huawei.com, Daniel Vetter , Tomeu Vizoso , seanpaul@google.org, Dave Airlie , Jonathan Corbet , Emil Velikov , linuxarm@huawei.com, dri-devel , Xinliang Liu , james.xiong@huawei.com, Benjamin Gaignard , Daniel Stone , Linux ARM Kernel , shenhui@huawei.com List-Id: dri-devel@lists.freedesktop.org SGkgU2VhbiwKClRoYW5rcyBmb3IgcmV2aWV3aW5nLgoK5ZyoIDIwMTYvMTEvMTYgMjM6NDIsIFNl YW4gUGF1bCDlhpnpgZM6Cj4gT24gV2VkLCBOb3YgMTYsIDIwMTYgYXQgODo0MyBBTSwgUm9uZ3Jv bmcgWm91IDx6b3Vyb25ncm9uZ0BnbWFpbC5jb20+IHdyb3RlOgo+PiBBZGQgRFJNIG1hc3RlciBk cml2ZXIgZm9yIEhpc2lsaWNvbiBIaWJtYyBTb0Mgd2hpY2ggdXNlZCBmb3IKPj4gT3V0LW9mLWJh bmQgbWFuYWdlbWVudC4gQmxvdyBpcyB0aGUgZ2VuZXJhbCBoYXJkd2FyZSBjb25uZWN0aW9uLAo+ PiBib3RoIHRoZSBIaWJtYyBhbmQgdGhlIGhvc3QgQ1BVIGFyZSBvbiB0aGUgc2FtZSBtb3RoZXIg Ym9hcmQuCj4+Cj4+ICstLS0tLS0tLS0tKyAgICAgICArLS0tLS0tLS0tLSsKPj4gfCAgICAgICAg ICB8IFBDSWUgIHwgIEhpYm1jICAgfAo+PiB8aG9zdCBDUFUoIHw8LS0tLS0+fCBkaXNwbGF5ICB8 Cj4+IHxhcm02NCx4ODYpfCAgICAgICB8c3Vic3lzdGVtIHwKPj4gKy0tLS0tLS0tLS0rICAgICAg ICstLS0tLS0tLS0tKwo+Pgo+PiBTaWduZWQtb2ZmLWJ5OiBSb25ncm9uZyBab3UgPHpvdXJvbmdy b25nQGdtYWlsLmNvbT4KPj4gLS0tCj4KPiBJbiB0aGUgZnV0dXJlLCBwbGVhc2Uga2VlcCB0cmFj ayBvZiB0aGUgZGlmZmVyZW5jZXMgYmV0d2VlbiBwYXRjaAo+IHZlcnNpb25zLiBJIG5vdGljZWQg eW91IGhhdmUgYSBzaG9ydCBjaGFuZ2Vsb2cgaW4gdGhlIGNvdmVyIGxldHRlciwKPiBidXQgaXQg cmVhbGx5IGhlbHBzIHRvIGFkZCBvbmUgcGVyLXBhdGNoIGFzIHdlbGwsIGl0IG1ha2VzIHJldmll d2luZwo+IG11Y2ggc2ltcGxlci4KPgo+IFJldmlld2VkLWJ5OiBTZWFuIFBhdWwgPHNlYW5wYXVs QGNocm9taXVtLm9yZz4KClNvcnJ5IGZvciB0aGF0LCBJIHdpbGwgcGF5IGF0dGVudGlvbiB0byBp dCBsYXRlciwgdGhhbmtzLgoKUmVnYXJkcywKUm9uZ3JvbmcuCgo+Cj4KPj4gICBkcml2ZXJzL2dw dS9kcm0vaGlzaWxpY29uL0tjb25maWcgICAgICAgICAgICAgICAgfCAgIDEgKwo+PiAgIGRyaXZl cnMvZ3B1L2RybS9oaXNpbGljb24vTWFrZWZpbGUgICAgICAgICAgICAgICB8ICAgMSArCj4+ICAg ZHJpdmVycy9ncHUvZHJtL2hpc2lsaWNvbi9oaWJtYy9LY29uZmlnICAgICAgICAgIHwgICA5ICsK Pj4gICBkcml2ZXJzL2dwdS9kcm0vaGlzaWxpY29uL2hpYm1jL01ha2VmaWxlICAgICAgICAgfCAg IDQgKwo+PiAgIGRyaXZlcnMvZ3B1L2RybS9oaXNpbGljb24vaGlibWMvaGlibWNfZHJtX2Rydi5j ICB8IDMwOCArKysrKysrKysrKysrKysrKysrKysrKwo+PiAgIGRyaXZlcnMvZ3B1L2RybS9oaXNp bGljb24vaGlibWMvaGlibWNfZHJtX2Rydi5oICB8ICA0MSArKysKPj4gICBkcml2ZXJzL2dwdS9k cm0vaGlzaWxpY29uL2hpYm1jL2hpYm1jX2RybV9yZWdzLmggfCAxOTYgKysrKysrKysrKysrKysr Cj4+ICAgNyBmaWxlcyBjaGFuZ2VkLCA1NjAgaW5zZXJ0aW9ucygrKQo+PiAgIGNyZWF0ZSBtb2Rl IDEwMDY0NCBkcml2ZXJzL2dwdS9kcm0vaGlzaWxpY29uL2hpYm1jL0tjb25maWcKPj4gICBjcmVh dGUgbW9kZSAxMDA2NDQgZHJpdmVycy9ncHUvZHJtL2hpc2lsaWNvbi9oaWJtYy9NYWtlZmlsZQo+ PiAgIGNyZWF0ZSBtb2RlIDEwMDY0NCBkcml2ZXJzL2dwdS9kcm0vaGlzaWxpY29uL2hpYm1jL2hp Ym1jX2RybV9kcnYuYwo+PiAgIGNyZWF0ZSBtb2RlIDEwMDY0NCBkcml2ZXJzL2dwdS9kcm0vaGlz aWxpY29uL2hpYm1jL2hpYm1jX2RybV9kcnYuaAo+PiAgIGNyZWF0ZSBtb2RlIDEwMDY0NCBkcml2 ZXJzL2dwdS9kcm0vaGlzaWxpY29uL2hpYm1jL2hpYm1jX2RybV9yZWdzLmgKPj4KPj4gZGlmZiAt LWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9oaXNpbGljb24vS2NvbmZpZyBiL2RyaXZlcnMvZ3B1L2Ry bS9oaXNpbGljb24vS2NvbmZpZwo+PiBpbmRleCA1NThjNjFiLi4yZmQyNzI0IDEwMDY0NAo+PiAt LS0gYS9kcml2ZXJzL2dwdS9kcm0vaGlzaWxpY29uL0tjb25maWcKPj4gKysrIGIvZHJpdmVycy9n cHUvZHJtL2hpc2lsaWNvbi9LY29uZmlnCj4+IEBAIC0yLDQgKzIsNSBAQAo+PiAgICMgaGlzaWxp Y29uIGRybSBkZXZpY2UgY29uZmlndXJhdGlvbi4KPj4gICAjIFBsZWFzZSBrZWVwIHRoaXMgbGlz dCBzb3J0ZWQgYWxwaGFiZXRpY2FsbHkKPj4KPj4gK3NvdXJjZSAiZHJpdmVycy9ncHUvZHJtL2hp c2lsaWNvbi9oaWJtYy9LY29uZmlnIgo+PiAgIHNvdXJjZSAiZHJpdmVycy9ncHUvZHJtL2hpc2ls aWNvbi9raXJpbi9LY29uZmlnIgo+PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2hpc2ls aWNvbi9NYWtlZmlsZSBiL2RyaXZlcnMvZ3B1L2RybS9oaXNpbGljb24vTWFrZWZpbGUKPj4gaW5k ZXggZTNmNmQ0OS4uYzgxNTViZiAxMDA2NDQKPj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2hpc2ls aWNvbi9NYWtlZmlsZQo+PiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaGlzaWxpY29uL01ha2VmaWxl Cj4+IEBAIC0yLDQgKzIsNSBAQAo+PiAgICMgTWFrZWZpbGUgZm9yIGhpc2lsaWNvbiBkcm0gZHJp dmVycy4KPj4gICAjIFBsZWFzZSBrZWVwIHRoaXMgbGlzdCBzb3J0ZWQgYWxwaGFiZXRpY2FsbHkK Pj4KPj4gK29iai0kKENPTkZJR19EUk1fSElTSV9ISUJNQykgKz0gaGlibWMvCj4+ICAgb2JqLSQo Q09ORklHX0RSTV9ISVNJX0tJUklOKSArPSBraXJpbi8KPj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMv Z3B1L2RybS9oaXNpbGljb24vaGlibWMvS2NvbmZpZyBiL2RyaXZlcnMvZ3B1L2RybS9oaXNpbGlj b24vaGlibWMvS2NvbmZpZwo+PiBuZXcgZmlsZSBtb2RlIDEwMDY0NAo+PiBpbmRleCAwMDAwMDAw Li4zODA2MjJhCj4+IC0tLSAvZGV2L251bGwKPj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2hpc2ls aWNvbi9oaWJtYy9LY29uZmlnCj4+IEBAIC0wLDAgKzEsOSBAQAo+PiArY29uZmlnIERSTV9ISVNJ X0hJQk1DCj4+ICsgICAgICAgdHJpc3RhdGUgIkRSTSBTdXBwb3J0IGZvciBIaXNpbGljb24gSGli bWMiCj4+ICsgICAgICAgZGVwZW5kcyBvbiBEUk0gJiYgUENJCj4+ICsgICAgICAgc2VsZWN0IERS TV9LTVNfSEVMUEVSCj4+ICsgICAgICAgc2VsZWN0IERSTV9UVE0KPj4gKwo+PiArICAgICAgIGhl bHAKPj4gKyAgICAgICAgIENob29zZSB0aGlzIG9wdGlvbiBpZiB5b3UgaGF2ZSBhIEhpc2lsaWNv biBIaWJtYyBzb2MgY2hpcHNldC4KPj4gKyAgICAgICAgIElmIE0gaXMgc2VsZWN0ZWQgdGhlIG1v ZHVsZSB3aWxsIGJlIGNhbGxlZCBoaWJtYy1kcm0uCj4+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dw dS9kcm0vaGlzaWxpY29uL2hpYm1jL01ha2VmaWxlIGIvZHJpdmVycy9ncHUvZHJtL2hpc2lsaWNv bi9oaWJtYy9NYWtlZmlsZQo+PiBuZXcgZmlsZSBtb2RlIDEwMDY0NAo+PiBpbmRleCAwMDAwMDAw Li40Nzk2MmEwCj4+IC0tLSAvZGV2L251bGwKPj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2hpc2ls aWNvbi9oaWJtYy9NYWtlZmlsZQo+PiBAQCAtMCwwICsxLDQgQEAKPj4gK2NjZmxhZ3MteSA6PSAt SWluY2x1ZGUvZHJtCj4+ICtoaWJtYy1kcm0teSA6PSBoaWJtY19kcm1fZHJ2Lm8KPj4gKwo+PiAr b2JqLSQoQ09ORklHX0RSTV9ISVNJX0hJQk1DKSArPSBoaWJtYy1kcm0ubwo+PiBkaWZmIC0tZ2l0 IGEvZHJpdmVycy9ncHUvZHJtL2hpc2lsaWNvbi9oaWJtYy9oaWJtY19kcm1fZHJ2LmMgYi9kcml2 ZXJzL2dwdS9kcm0vaGlzaWxpY29uL2hpYm1jL2hpYm1jX2RybV9kcnYuYwo+PiBuZXcgZmlsZSBt b2RlIDEwMDY0NAo+PiBpbmRleCAwMDAwMDAwLi42ZDIwNTgwCj4+IC0tLSAvZGV2L251bGwKPj4g KysrIGIvZHJpdmVycy9ncHUvZHJtL2hpc2lsaWNvbi9oaWJtYy9oaWJtY19kcm1fZHJ2LmMKPj4g QEAgLTAsMCArMSwzMDggQEAKPj4gKy8qIEhpc2lsaWNvbiBIaWJtYyBTb0MgZHJtIGRyaXZlcgo+ PiArICoKPj4gKyAqIEJhc2VkIG9uIHRoZSBib2NocyBkcm0gZHJpdmVyLgo+PiArICoKPj4gKyAq IENvcHlyaWdodCAoYykgMjAxNiBIdWF3ZWkgTGltaXRlZC4KPj4gKyAqCj4+ICsgKiBBdXRob3I6 Cj4+ICsgKiAgICAgUm9uZ3JvbmcgWm91IDx6b3Vyb25ncm9uZ0BodWF3ZWkuY29tPgo+PiArICog ICAgIFJvbmdyb25nIFpvdSA8em91cm9uZ3JvbmdAZ21haWwuY29tPgo+PiArICogICAgIEppYW5o dWEgTGkgPGxpamlhbmh1YUBodWF3ZWkuY29tPgo+PiArICoKPj4gKyAqIFRoaXMgcHJvZ3JhbSBp cyBmcmVlIHNvZnR3YXJlOyB5b3UgY2FuIHJlZGlzdHJpYnV0ZSBpdCBhbmQvb3IgbW9kaWZ5Cj4+ ICsgKiBpdCB1bmRlciB0aGUgdGVybXMgb2YgdGhlIEdOVSBHZW5lcmFsIFB1YmxpYyBMaWNlbnNl IGFzIHB1Ymxpc2hlZCBieQo+PiArICogdGhlIEZyZWUgU29mdHdhcmUgRm91bmRhdGlvbjsgZWl0 aGVyIHZlcnNpb24gMiBvZiB0aGUgTGljZW5zZSwgb3IKPj4gKyAqIChhdCB5b3VyIG9wdGlvbikg YW55IGxhdGVyIHZlcnNpb24uCj4+ICsgKgo+PiArICovCj4+ICsKPj4gKyNpbmNsdWRlIDxsaW51 eC9jb25zb2xlLmg+Cj4+ICsjaW5jbHVkZSA8bGludXgvbW9kdWxlLmg+Cj4+ICsKPj4gKyNpbmNs dWRlICJoaWJtY19kcm1fZHJ2LmgiCj4+ICsjaW5jbHVkZSAiaGlibWNfZHJtX3JlZ3MuaCIKPj4g Kwo+PiArc3RhdGljIGNvbnN0IHN0cnVjdCBmaWxlX29wZXJhdGlvbnMgaGlibWNfZm9wcyA9IHsK Pj4gKyAgICAgICAub3duZXIgICAgICAgICAgPSBUSElTX01PRFVMRSwKPj4gKyAgICAgICAub3Bl biAgICAgICAgICAgPSBkcm1fb3BlbiwKPj4gKyAgICAgICAucmVsZWFzZSAgICAgICAgPSBkcm1f cmVsZWFzZSwKPj4gKyAgICAgICAudW5sb2NrZWRfaW9jdGwgPSBkcm1faW9jdGwsCj4+ICsgICAg ICAgLmNvbXBhdF9pb2N0bCAgID0gZHJtX2NvbXBhdF9pb2N0bCwKPj4gKyAgICAgICAucG9sbCAg ICAgICAgICAgPSBkcm1fcG9sbCwKPj4gKyAgICAgICAucmVhZCAgICAgICAgICAgPSBkcm1fcmVh ZCwKPj4gKyAgICAgICAubGxzZWVrICAgICAgICAgPSBub19sbHNlZWssCj4+ICt9Owo+PiArCj4+ ICtzdGF0aWMgaW50IGhpYm1jX2VuYWJsZV92Ymxhbmsoc3RydWN0IGRybV9kZXZpY2UgKmRldiwg dW5zaWduZWQgaW50IHBpcGUpCj4+ICt7Cj4+ICsgICAgICAgcmV0dXJuIDA7Cj4+ICt9Cj4+ICsK Pj4gK3N0YXRpYyB2b2lkIGhpYm1jX2Rpc2FibGVfdmJsYW5rKHN0cnVjdCBkcm1fZGV2aWNlICpk ZXYsIHVuc2lnbmVkIGludCBwaXBlKQo+PiArewo+PiArfQo+PiArCj4+ICtzdGF0aWMgc3RydWN0 IGRybV9kcml2ZXIgaGlibWNfZHJpdmVyID0gewo+PiArICAgICAgIC5mb3BzICAgICAgICAgICAg ICAgICAgID0gJmhpYm1jX2ZvcHMsCj4+ICsgICAgICAgLm5hbWUgICAgICAgICAgICAgICAgICAg PSAiaGlibWMiLAo+PiArICAgICAgIC5kYXRlICAgICAgICAgICAgICAgICAgID0gIjIwMTYwODI4 IiwKPj4gKyAgICAgICAuZGVzYyAgICAgICAgICAgICAgICAgICA9ICJoaWJtYyBkcm0gZHJpdmVy IiwKPj4gKyAgICAgICAubWFqb3IgICAgICAgICAgICAgICAgICA9IDEsCj4+ICsgICAgICAgLm1p bm9yICAgICAgICAgICAgICAgICAgPSAwLAo+PiArICAgICAgIC5nZXRfdmJsYW5rX2NvdW50ZXIg ICAgID0gZHJtX3ZibGFua19ub19od19jb3VudGVyLAo+PiArICAgICAgIC5lbmFibGVfdmJsYW5r ICAgICAgICAgID0gaGlibWNfZW5hYmxlX3ZibGFuaywKPj4gKyAgICAgICAuZGlzYWJsZV92Ymxh bmsgICAgICAgICA9IGhpYm1jX2Rpc2FibGVfdmJsYW5rLAo+PiArfTsKPj4gKwo+PiArc3RhdGlj IGludCBoaWJtY19wbV9zdXNwZW5kKHN0cnVjdCBkZXZpY2UgKmRldikKPj4gK3sKPj4gKyAgICAg ICByZXR1cm4gMDsKPj4gK30KPj4gKwo+PiArc3RhdGljIGludCBoaWJtY19wbV9yZXN1bWUoc3Ry dWN0IGRldmljZSAqZGV2KQo+PiArewo+PiArICAgICAgIHJldHVybiAwOwo+PiArfQo+PiArCj4+ ICtzdGF0aWMgY29uc3Qgc3RydWN0IGRldl9wbV9vcHMgaGlibWNfcG1fb3BzID0gewo+PiArICAg ICAgIFNFVF9TWVNURU1fU0xFRVBfUE1fT1BTKGhpYm1jX3BtX3N1c3BlbmQsCj4+ICsgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgaGlibWNfcG1fcmVzdW1lKQo+PiArfTsKPj4gKwo+PiAr LyoKPj4gKyAqIEl0IGNhbiBvcGVyYXRlIGluIG9uZSBvZiB0aHJlZSBtb2RlczogMCwgMSBvciBT bGVlcC4KPj4gKyAqLwo+PiArdm9pZCBoaWJtY19zZXRfcG93ZXJfbW9kZShzdHJ1Y3QgaGlibWNf ZHJtX3ByaXZhdGUgKnByaXYsCj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgdW5zaWduZWQg aW50IHBvd2VyX21vZGUpCj4+ICt7Cj4+ICsgICAgICAgdW5zaWduZWQgaW50IGNvbnRyb2xfdmFs dWUgPSAwOwo+PiArICAgICAgIHZvaWQgX19pb21lbSAgICptbWlvID0gcHJpdi0+bW1pbzsKPj4g KyAgICAgICB1bnNpZ25lZCBpbnQgaW5wdXQgPSAxOwo+PiArCj4+ICsgICAgICAgaWYgKHBvd2Vy X21vZGUgPiBISUJNQ19QV19NT0RFX0NUTF9NT0RFX1NMRUVQKQo+PiArICAgICAgICAgICAgICAg cmV0dXJuOwo+PiArCj4+ICsgICAgICAgaWYgKHBvd2VyX21vZGUgPT0gSElCTUNfUFdfTU9ERV9D VExfTU9ERV9TTEVFUCkKPj4gKyAgICAgICAgICAgICAgIGlucHV0ID0gMDsKPj4gKwo+PiArICAg ICAgIGNvbnRyb2xfdmFsdWUgPSByZWFkbChtbWlvICsgSElCTUNfUE9XRVJfTU9ERV9DVFJMKTsK Pj4gKyAgICAgICBjb250cm9sX3ZhbHVlICY9IH4oSElCTUNfUFdfTU9ERV9DVExfTU9ERV9NQVNL IHwKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgSElCTUNfUFdfTU9ERV9DVExfT1NDX0lO UFVUX01BU0spOwo+PiArICAgICAgIGNvbnRyb2xfdmFsdWUgfD0gSElCTUNfRklFTEQoSElCTUNf UFdfTU9ERV9DVExfTU9ERSwgcG93ZXJfbW9kZSk7Cj4+ICsgICAgICAgY29udHJvbF92YWx1ZSB8 PSBISUJNQ19GSUVMRChISUJNQ19QV19NT0RFX0NUTF9PU0NfSU5QVVQsIGlucHV0KTsKPj4gKyAg ICAgICB3cml0ZWwoY29udHJvbF92YWx1ZSwgbW1pbyArIEhJQk1DX1BPV0VSX01PREVfQ1RSTCk7 Cj4+ICt9Cj4+ICsKPj4gK3ZvaWQgaGlibWNfc2V0X2N1cnJlbnRfZ2F0ZShzdHJ1Y3QgaGlibWNf ZHJtX3ByaXZhdGUgKnByaXYsIHVuc2lnbmVkIGludCBnYXRlKQo+PiArewo+PiArICAgICAgIHVu c2lnbmVkIGludCBnYXRlX3JlZzsKPj4gKyAgICAgICB1bnNpZ25lZCBpbnQgbW9kZTsKPj4gKyAg ICAgICB2b2lkIF9faW9tZW0gICAqbW1pbyA9IHByaXYtPm1taW87Cj4+ICsKPj4gKyAgICAgICAv KiBHZXQgY3VycmVudCBwb3dlciBtb2RlLiAqLwo+PiArICAgICAgIG1vZGUgPSAocmVhZGwobW1p byArIEhJQk1DX1BPV0VSX01PREVfQ1RSTCkgJgo+PiArICAgICAgICAgICAgICAgSElCTUNfUFdf TU9ERV9DVExfTU9ERV9NQVNLKSA+PiBISUJNQ19QV19NT0RFX0NUTF9NT0RFX1NISUZUOwo+PiAr Cj4+ICsgICAgICAgc3dpdGNoIChtb2RlKSB7Cj4+ICsgICAgICAgY2FzZSBISUJNQ19QV19NT0RF X0NUTF9NT0RFX01PREUwOgo+PiArICAgICAgICAgICAgICAgZ2F0ZV9yZWcgPSBISUJNQ19NT0RF MF9HQVRFOwo+PiArICAgICAgICAgICAgICAgYnJlYWs7Cj4+ICsKPj4gKyAgICAgICBjYXNlIEhJ Qk1DX1BXX01PREVfQ1RMX01PREVfTU9ERTE6Cj4+ICsgICAgICAgICAgICAgICBnYXRlX3JlZyA9 IEhJQk1DX01PREUxX0dBVEU7Cj4+ICsgICAgICAgICAgICAgICBicmVhazsKPj4gKwo+PiArICAg ICAgIGRlZmF1bHQ6Cj4+ICsgICAgICAgICAgICAgICBnYXRlX3JlZyA9IEhJQk1DX01PREUwX0dB VEU7Cj4+ICsgICAgICAgICAgICAgICBicmVhazsKPj4gKyAgICAgICB9Cj4+ICsgICAgICAgd3Jp dGVsKGdhdGUsIG1taW8gKyBnYXRlX3JlZyk7Cj4+ICt9Cj4+ICsKPj4gK3N0YXRpYyB2b2lkIGhp Ym1jX2h3X2NvbmZpZyhzdHJ1Y3QgaGlibWNfZHJtX3ByaXZhdGUgKnByaXYpCj4+ICt7Cj4+ICsg ICAgICAgdW5zaWduZWQgaW50IHJlZzsKPj4gKwo+PiArICAgICAgIC8qIE9uIGhhcmR3YXJlIHJl c2V0LCBwb3dlciBtb2RlIDAgaXMgZGVmYXVsdC4gKi8KPj4gKyAgICAgICBoaWJtY19zZXRfcG93 ZXJfbW9kZShwcml2LCBISUJNQ19QV19NT0RFX0NUTF9NT0RFX01PREUwKTsKPj4gKwo+PiArICAg ICAgIC8qIEVuYWJsZSBkaXNwbGF5IHBvd2VyIGdhdGUgJiBMT0NBTE1FTSBwb3dlciBnYXRlKi8K Pj4gKyAgICAgICByZWcgPSByZWFkbChwcml2LT5tbWlvICsgSElCTUNfQ1VSUkVOVF9HQVRFKTsK Pj4gKyAgICAgICByZWcgJj0gfkhJQk1DX0NVUlJfR0FURV9ESVNQTEFZX01BU0s7Cj4+ICsgICAg ICAgcmVnICY9IH5ISUJNQ19DVVJSX0dBVEVfTE9DQUxNRU1fTUFTSzsKPj4gKyAgICAgICByZWcg fD0gSElCTUNfQ1VSUl9HQVRFX0RJU1BMQVkoMSk7Cj4+ICsgICAgICAgcmVnIHw9IEhJQk1DX0NV UlJfR0FURV9MT0NBTE1FTSgxKTsKPj4gKwo+PiArICAgICAgIGhpYm1jX3NldF9jdXJyZW50X2dh dGUocHJpdiwgcmVnKTsKPj4gKwo+PiArICAgICAgIC8qCj4+ICsgICAgICAgICogUmVzZXQgdGhl IG1lbW9yeSBjb250cm9sbGVyLiBJZiB0aGUgbWVtb3J5IGNvbnRyb2xsZXIKPj4gKyAgICAgICAg KiBpcyBub3QgcmVzZXQgaW4gY2hpcCx0aGUgc3lzdGVtIG1pZ2h0IGhhbmcgd2hlbiBzdyBhY2Nl c3Nlcwo+PiArICAgICAgICAqIHRoZSBtZW1vcnkuVGhlIG1lbW9yeSBzaG91bGQgYmUgcmVzZXR0 ZWQgYWZ0ZXIKPj4gKyAgICAgICAgKiBjaGFuZ2luZyB0aGUgTVhDTEsuCj4+ICsgICAgICAgICov Cj4+ICsgICAgICAgcmVnID0gcmVhZGwocHJpdi0+bW1pbyArIEhJQk1DX01JU0NfQ1RSTCk7Cj4+ ICsgICAgICAgcmVnICY9IH5ISUJNQ19NU0NDVExfTE9DQUxNRU1fUkVTRVRfTUFTSzsKPj4gKyAg ICAgICByZWcgfD0gSElCTUNfTVNDQ1RMX0xPQ0FMTUVNX1JFU0VUKDApOwo+PiArICAgICAgIHdy aXRlbChyZWcsIHByaXYtPm1taW8gKyBISUJNQ19NSVNDX0NUUkwpOwo+PiArCj4+ICsgICAgICAg cmVnICY9IH5ISUJNQ19NU0NDVExfTE9DQUxNRU1fUkVTRVRfTUFTSzsKPj4gKyAgICAgICByZWcg fD0gSElCTUNfTVNDQ1RMX0xPQ0FMTUVNX1JFU0VUKDEpOwo+PiArCj4+ICsgICAgICAgd3JpdGVs KHJlZywgcHJpdi0+bW1pbyArIEhJQk1DX01JU0NfQ1RSTCk7Cj4+ICt9Cj4+ICsKPj4gK3N0YXRp YyBpbnQgaGlibWNfaHdfbWFwKHN0cnVjdCBoaWJtY19kcm1fcHJpdmF0ZSAqcHJpdikKPj4gK3sK Pj4gKyAgICAgICBzdHJ1Y3QgZHJtX2RldmljZSAqZGV2ID0gcHJpdi0+ZGV2Owo+PiArICAgICAg IHN0cnVjdCBwY2lfZGV2ICpwZGV2ID0gZGV2LT5wZGV2Owo+PiArICAgICAgIHJlc291cmNlX3Np emVfdCBhZGRyLCBzaXplLCBpb2FkZHIsIGlvc2l6ZTsKPj4gKwo+PiArICAgICAgIGlvYWRkciA9 IHBjaV9yZXNvdXJjZV9zdGFydChwZGV2LCAxKTsKPj4gKyAgICAgICBpb3NpemUgPSBwY2lfcmVz b3VyY2VfbGVuKHBkZXYsIDEpOwo+PiArICAgICAgIHByaXYtPm1taW8gPSBkZXZtX2lvcmVtYXBf bm9jYWNoZShkZXYtPmRldiwgaW9hZGRyLCBpb3NpemUpOwo+PiArICAgICAgIGlmICghcHJpdi0+ bW1pbykgewo+PiArICAgICAgICAgICAgICAgRFJNX0VSUk9SKCJDYW5ub3QgbWFwIG1taW8gcmVn aW9uXG4iKTsKPj4gKyAgICAgICAgICAgICAgIHJldHVybiAtRU5PTUVNOwo+PiArICAgICAgIH0K Pj4gKwo+PiArICAgICAgIGFkZHIgPSBwY2lfcmVzb3VyY2Vfc3RhcnQocGRldiwgMCk7Cj4+ICsg ICAgICAgc2l6ZSA9IHBjaV9yZXNvdXJjZV9sZW4ocGRldiwgMCk7Cj4+ICsgICAgICAgcHJpdi0+ ZmJfbWFwID0gZGV2bV9pb3JlbWFwKGRldi0+ZGV2LCBhZGRyLCBzaXplKTsKPj4gKyAgICAgICBp ZiAoIXByaXYtPmZiX21hcCkgewo+PiArICAgICAgICAgICAgICAgRFJNX0VSUk9SKCJDYW5ub3Qg bWFwIGZyYW1lYnVmZmVyXG4iKTsKPj4gKyAgICAgICAgICAgICAgIHJldHVybiAtRU5PTUVNOwo+ PiArICAgICAgIH0KPj4gKyAgICAgICBwcml2LT5mYl9iYXNlID0gYWRkcjsKPj4gKyAgICAgICBw cml2LT5mYl9zaXplID0gc2l6ZTsKPj4gKwo+PiArICAgICAgIHJldHVybiAwOwo+PiArfQo+PiAr Cj4+ICtzdGF0aWMgaW50IGhpYm1jX2h3X2luaXQoc3RydWN0IGhpYm1jX2RybV9wcml2YXRlICpw cml2KQo+PiArewo+PiArICAgICAgIGludCByZXQ7Cj4+ICsKPj4gKyAgICAgICByZXQgPSBoaWJt Y19od19tYXAocHJpdik7Cj4+ICsgICAgICAgaWYgKHJldCkKPj4gKyAgICAgICAgICAgICAgIHJl dHVybiByZXQ7Cj4+ICsKPj4gKyAgICAgICBoaWJtY19od19jb25maWcocHJpdik7Cj4+ICsKPj4g KyAgICAgICByZXR1cm4gMDsKPj4gK30KPj4gKwo+PiArc3RhdGljIGludCBoaWJtY191bmxvYWQo c3RydWN0IGRybV9kZXZpY2UgKmRldikKPj4gK3sKPj4gKyAgICAgICByZXR1cm4gMDsKPj4gK30K Pj4gKwo+PiArc3RhdGljIGludCBoaWJtY19sb2FkKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYpCj4+ ICt7Cj4+ICsgICAgICAgc3RydWN0IGhpYm1jX2RybV9wcml2YXRlICpwcml2Owo+PiArICAgICAg IGludCByZXQ7Cj4+ICsKPj4gKyAgICAgICBwcml2ID0gZGV2bV9remFsbG9jKGRldi0+ZGV2LCBz aXplb2YoKnByaXYpLCBHRlBfS0VSTkVMKTsKPj4gKyAgICAgICBpZiAoIXByaXYpIHsKPj4gKyAg ICAgICAgICAgICAgIERSTV9FUlJPUigibm8gbWVtb3J5IHRvIGFsbG9jYXRlIGZvciBoaWJtY19k cm1fcHJpdmF0ZVxuIik7Cj4+ICsgICAgICAgICAgICAgICByZXR1cm4gLUVOT01FTTsKPj4gKyAg ICAgICB9Cj4+ICsgICAgICAgZGV2LT5kZXZfcHJpdmF0ZSA9IHByaXY7Cj4+ICsgICAgICAgcHJp di0+ZGV2ID0gZGV2Owo+PiArCj4+ICsgICAgICAgcmV0ID0gaGlibWNfaHdfaW5pdChwcml2KTsK Pj4gKyAgICAgICBpZiAocmV0KQo+PiArICAgICAgICAgICAgICAgZ290byBlcnI7Cj4+ICsKPj4g KyAgICAgICByZXR1cm4gMDsKPj4gKwo+PiArZXJyOgo+PiArICAgICAgIGhpYm1jX3VubG9hZChk ZXYpOwo+PiArICAgICAgIERSTV9FUlJPUigiZmFpbGVkIHRvIGluaXRpYWxpemUgZHJtIGRyaXZl cjogJWRcbiIsIHJldCk7Cj4+ICsgICAgICAgcmV0dXJuIHJldDsKPj4gK30KPj4gKwo+PiArc3Rh dGljIGludCBoaWJtY19wY2lfcHJvYmUoc3RydWN0IHBjaV9kZXYgKnBkZXYsCj4+ICsgICAgICAg ICAgICAgICAgICAgICAgICAgIGNvbnN0IHN0cnVjdCBwY2lfZGV2aWNlX2lkICplbnQpCj4+ICt7 Cj4+ICsgICAgICAgc3RydWN0IGRybV9kZXZpY2UgKmRldjsKPj4gKyAgICAgICBpbnQgcmV0Owo+ PiArCj4+ICsgICAgICAgZGV2ID0gZHJtX2Rldl9hbGxvYygmaGlibWNfZHJpdmVyLCAmcGRldi0+ ZGV2KTsKPj4gKyAgICAgICBpZiAoIWRldikgewo+PiArICAgICAgICAgICAgICAgRFJNX0VSUk9S KCJmYWlsZWQgdG8gYWxsb2NhdGUgZHJtX2RldmljZVxuIik7Cj4+ICsgICAgICAgICAgICAgICBy ZXR1cm4gLUVOT01FTTsKPj4gKyAgICAgICB9Cj4+ICsKPj4gKyAgICAgICBkZXYtPnBkZXYgPSBw ZGV2Owo+PiArICAgICAgIHBjaV9zZXRfZHJ2ZGF0YShwZGV2LCBkZXYpOwo+PiArCj4+ICsgICAg ICAgcmV0ID0gcGNpX2VuYWJsZV9kZXZpY2UocGRldik7Cj4+ICsgICAgICAgaWYgKHJldCkgewo+ PiArICAgICAgICAgICAgICAgRFJNX0VSUk9SKCJmYWlsZWQgdG8gZW5hYmxlIHBjaSBkZXZpY2U6 ICVkXG4iLCByZXQpOwo+PiArICAgICAgICAgICAgICAgZ290byBlcnJfZnJlZTsKPj4gKyAgICAg ICB9Cj4+ICsKPj4gKyAgICAgICByZXQgPSBoaWJtY19sb2FkKGRldik7Cj4+ICsgICAgICAgaWYg KHJldCkgewo+PiArICAgICAgICAgICAgICAgRFJNX0VSUk9SKCJmYWlsZWQgdG8gbG9hZCBoaWJt YzogJWRcbiIsIHJldCk7Cj4+ICsgICAgICAgICAgICAgICBnb3RvIGVycl9kaXNhYmxlOwo+PiAr ICAgICAgIH0KPj4gKwo+PiArICAgICAgIHJldCA9IGRybV9kZXZfcmVnaXN0ZXIoZGV2LCAwKTsK Pj4gKyAgICAgICBpZiAocmV0KSB7Cj4+ICsgICAgICAgICAgICAgICBEUk1fRVJST1IoImZhaWxl ZCB0byByZWdpc3RlciBkcnYgZm9yIHVzZXJzcGFjZSBhY2Nlc3M6ICVkXG4iLAo+PiArICAgICAg ICAgICAgICAgICAgICAgICAgIHJldCk7Cj4+ICsgICAgICAgICAgICAgICBnb3RvIGVycl91bmxv YWQ7Cj4+ICsgICAgICAgfQo+PiArICAgICAgIHJldHVybiAwOwo+PiArCj4+ICtlcnJfdW5sb2Fk Ogo+PiArICAgICAgIGhpYm1jX3VubG9hZChkZXYpOwo+PiArZXJyX2Rpc2FibGU6Cj4+ICsgICAg ICAgcGNpX2Rpc2FibGVfZGV2aWNlKHBkZXYpOwo+PiArZXJyX2ZyZWU6Cj4+ICsgICAgICAgZHJt X2Rldl91bnJlZihkZXYpOwo+PiArCj4+ICsgICAgICAgcmV0dXJuIHJldDsKPj4gK30KPj4gKwo+ PiArc3RhdGljIHZvaWQgaGlibWNfcGNpX3JlbW92ZShzdHJ1Y3QgcGNpX2RldiAqcGRldikKPj4g K3sKPj4gKyAgICAgICBzdHJ1Y3QgZHJtX2RldmljZSAqZGV2ID0gcGNpX2dldF9kcnZkYXRhKHBk ZXYpOwo+PiArCj4+ICsgICAgICAgZHJtX2Rldl91bnJlZ2lzdGVyKGRldik7Cj4+ICsgICAgICAg aGlibWNfdW5sb2FkKGRldik7Cj4+ICsgICAgICAgZHJtX2Rldl91bnJlZihkZXYpOwo+PiArfQo+ PiArCj4+ICtzdGF0aWMgc3RydWN0IHBjaV9kZXZpY2VfaWQgaGlibWNfcGNpX3RhYmxlW10gPSB7 Cj4+ICsgICAgICAgezB4MTllNSwgMHgxNzExLCBQQ0lfQU5ZX0lELCBQQ0lfQU5ZX0lELCAwLCAw LCAwfSwKPj4gKyAgICAgICB7MCx9Cj4+ICt9Owo+PiArCj4+ICtzdGF0aWMgc3RydWN0IHBjaV9k cml2ZXIgaGlibWNfcGNpX2RyaXZlciA9IHsKPj4gKyAgICAgICAubmFtZSA9ICAgICAgICAgImhp Ym1jLWRybSIsCj4+ICsgICAgICAgLmlkX3RhYmxlID0gICAgIGhpYm1jX3BjaV90YWJsZSwKPj4g KyAgICAgICAucHJvYmUgPSAgICAgICAgaGlibWNfcGNpX3Byb2JlLAo+PiArICAgICAgIC5yZW1v dmUgPSAgICAgICBoaWJtY19wY2lfcmVtb3ZlLAo+PiArICAgICAgIC5kcml2ZXIucG0gPSAgICAm aGlibWNfcG1fb3BzLAo+PiArfTsKPj4gKwo+PiArc3RhdGljIGludCBfX2luaXQgaGlibWNfaW5p dCh2b2lkKQo+PiArewo+PiArICAgICAgIHJldHVybiBwY2lfcmVnaXN0ZXJfZHJpdmVyKCZoaWJt Y19wY2lfZHJpdmVyKTsKPj4gK30KPj4gKwo+PiArc3RhdGljIHZvaWQgX19leGl0IGhpYm1jX2V4 aXQodm9pZCkKPj4gK3sKPj4gKyAgICAgICByZXR1cm4gcGNpX3VucmVnaXN0ZXJfZHJpdmVyKCZo aWJtY19wY2lfZHJpdmVyKTsKPj4gK30KPj4gKwo+PiArbW9kdWxlX2luaXQoaGlibWNfaW5pdCk7 Cj4+ICttb2R1bGVfZXhpdChoaWJtY19leGl0KTsKPj4gKwo+PiArTU9EVUxFX0RFVklDRV9UQUJM RShwY2ksIGhpYm1jX3BjaV90YWJsZSk7Cj4+ICtNT0RVTEVfQVVUSE9SKCJSb25ncm9uZ1pvdSA8 em91cm9uZ3JvbmdAaHVhd2VpLmNvbT4iKTsKPj4gK01PRFVMRV9ERVNDUklQVElPTigiRFJNIERy aXZlciBmb3IgSGlzaWxpY29uIEhpYm1jIik7Cj4+ICtNT0RVTEVfTElDRU5TRSgiR1BMIHYyIik7 Cj4+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaGlzaWxpY29uL2hpYm1jL2hpYm1jX2Ry bV9kcnYuaCBiL2RyaXZlcnMvZ3B1L2RybS9oaXNpbGljb24vaGlibWMvaGlibWNfZHJtX2Rydi5o Cj4+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0Cj4+IGluZGV4IDAwMDAwMDAuLjg0MGNkNWEKPj4gLS0t IC9kZXYvbnVsbAo+PiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaGlzaWxpY29uL2hpYm1jL2hpYm1j X2RybV9kcnYuaAo+PiBAQCAtMCwwICsxLDQxIEBACj4+ICsvKiBIaXNpbGljb24gSGlibWMgU29D IGRybSBkcml2ZXIKPj4gKyAqCj4+ICsgKiBCYXNlZCBvbiB0aGUgYm9jaHMgZHJtIGRyaXZlci4K Pj4gKyAqCj4+ICsgKiBDb3B5cmlnaHQgKGMpIDIwMTYgSHVhd2VpIExpbWl0ZWQuCj4+ICsgKgo+ PiArICogQXV0aG9yOgo+PiArICogICAgIFJvbmdyb25nIFpvdSA8em91cm9uZ3JvbmdAaHVhd2Vp LmNvbT4KPj4gKyAqICAgICBSb25ncm9uZyBab3UgPHpvdXJvbmdyb25nQGdtYWlsLmNvbT4KPj4g KyAqICAgICBKaWFuaHVhIExpIDxsaWppYW5odWFAaHVhd2VpLmNvbT4KPj4gKyAqCj4+ICsgKiBU aGlzIHByb2dyYW0gaXMgZnJlZSBzb2Z0d2FyZTsgeW91IGNhbiByZWRpc3RyaWJ1dGUgaXQgYW5k L29yIG1vZGlmeQo+PiArICogaXQgdW5kZXIgdGhlIHRlcm1zIG9mIHRoZSBHTlUgR2VuZXJhbCBQ dWJsaWMgTGljZW5zZSBhcyBwdWJsaXNoZWQgYnkKPj4gKyAqIHRoZSBGcmVlIFNvZnR3YXJlIEZv dW5kYXRpb247IGVpdGhlciB2ZXJzaW9uIDIgb2YgdGhlIExpY2Vuc2UsIG9yCj4+ICsgKiAoYXQg eW91ciBvcHRpb24pIGFueSBsYXRlciB2ZXJzaW9uLgo+PiArICoKPj4gKyAqLwo+PiArCj4+ICsj aWZuZGVmIEhJQk1DX0RSTV9EUlZfSAo+PiArI2RlZmluZSBISUJNQ19EUk1fRFJWX0gKPj4gKwo+ PiArI2luY2x1ZGUgPGRybS9kcm1QLmg+Cj4+ICsKPj4gK3N0cnVjdCBoaWJtY19kcm1fcHJpdmF0 ZSB7Cj4+ICsgICAgICAgLyogaHcgKi8KPj4gKyAgICAgICB2b2lkIF9faW9tZW0gICAqbW1pbzsK Pj4gKyAgICAgICB2b2lkIF9faW9tZW0gICAqZmJfbWFwOwo+PiArICAgICAgIHVuc2lnbmVkIGxv bmcgIGZiX2Jhc2U7Cj4+ICsgICAgICAgdW5zaWduZWQgbG9uZyAgZmJfc2l6ZTsKPj4gKwo+PiAr ICAgICAgIC8qIGRybSAqLwo+PiArICAgICAgIHN0cnVjdCBkcm1fZGV2aWNlICAqZGV2Owo+PiAr Cj4+ICt9Owo+PiArCj4+ICt2b2lkIGhpYm1jX3NldF9wb3dlcl9tb2RlKHN0cnVjdCBoaWJtY19k cm1fcHJpdmF0ZSAqcHJpdiwKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICB1bnNpZ25lZCBp bnQgcG93ZXJfbW9kZSk7Cj4+ICt2b2lkIGhpYm1jX3NldF9jdXJyZW50X2dhdGUoc3RydWN0IGhp Ym1jX2RybV9wcml2YXRlICpwcml2LAo+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgdW5z aWduZWQgaW50IGdhdGUpOwo+PiArCj4+ICsjZW5kaWYKPj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMv Z3B1L2RybS9oaXNpbGljb24vaGlibWMvaGlibWNfZHJtX3JlZ3MuaCBiL2RyaXZlcnMvZ3B1L2Ry bS9oaXNpbGljb24vaGlibWMvaGlibWNfZHJtX3JlZ3MuaAo+PiBuZXcgZmlsZSBtb2RlIDEwMDY0 NAo+PiBpbmRleCAwMDAwMDAwLi5mNzAzNWJmCj4+IC0tLSAvZGV2L251bGwKPj4gKysrIGIvZHJp dmVycy9ncHUvZHJtL2hpc2lsaWNvbi9oaWJtYy9oaWJtY19kcm1fcmVncy5oCj4+IEBAIC0wLDAg KzEsMTk2IEBACj4+ICsvKiBIaXNpbGljb24gSGlibWMgU29DIGRybSBkcml2ZXIKPj4gKyAqCj4+ ICsgKiBCYXNlZCBvbiB0aGUgYm9jaHMgZHJtIGRyaXZlci4KPj4gKyAqCj4+ICsgKiBDb3B5cmln aHQgKGMpIDIwMTYgSHVhd2VpIExpbWl0ZWQuCj4+ICsgKgo+PiArICogQXV0aG9yOgo+PiArICog ICAgIFJvbmdyb25nIFpvdSA8em91cm9uZ3JvbmdAaHVhd2VpLmNvbT4KPj4gKyAqICAgICBSb25n cm9uZyBab3UgPHpvdXJvbmdyb25nQGdtYWlsLmNvbT4KPj4gKyAqICAgICBKaWFuaHVhIExpIDxs aWppYW5odWFAaHVhd2VpLmNvbT4KPj4gKyAqCj4+ICsgKiBUaGlzIHByb2dyYW0gaXMgZnJlZSBz b2Z0d2FyZTsgeW91IGNhbiByZWRpc3RyaWJ1dGUgaXQgYW5kL29yIG1vZGlmeQo+PiArICogaXQg dW5kZXIgdGhlIHRlcm1zIG9mIHRoZSBHTlUgR2VuZXJhbCBQdWJsaWMgTGljZW5zZSBhcyBwdWJs aXNoZWQgYnkKPj4gKyAqIHRoZSBGcmVlIFNvZnR3YXJlIEZvdW5kYXRpb247IGVpdGhlciB2ZXJz aW9uIDIgb2YgdGhlIExpY2Vuc2UsIG9yCj4+ICsgKiAoYXQgeW91ciBvcHRpb24pIGFueSBsYXRl ciB2ZXJzaW9uLgo+PiArICoKPj4gKyAqLwo+PiArCj4+ICsjaWZuZGVmIEhJQk1DX0RSTV9IV19I Cj4+ICsjZGVmaW5lIEhJQk1DX0RSTV9IV19ICj4+ICsKPj4gKy8qIHJlZ2lzdGVyIGRlZmluaXRp b24gKi8KPj4gKyNkZWZpbmUgSElCTUNfTUlTQ19DVFJMICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAweDQKPj4gKwo+PiArI2RlZmluZSBISUJNQ19NU0NDVExfTE9DQUxNRU1fUkVTRVQo eCkgICAgICAgICAoKHgpIDw8IDYpCj4+ICsjZGVmaW5lIEhJQk1DX01TQ0NUTF9MT0NBTE1FTV9S RVNFVF9NQVNLICAgICAgIDB4NDAKPj4gKwo+PiArI2RlZmluZSBISUJNQ19DVVJSRU5UX0dBVEUg ICAgICAgICAgICAgICAgICAgICAweDAwMDA0MAo+PiArI2RlZmluZSBISUJNQ19DVVJSX0dBVEVf RElTUExBWSh4KSAgICAgICAgICAgICAoKHgpIDw8IDIpCj4+ICsjZGVmaW5lIEhJQk1DX0NVUlJf R0FURV9ESVNQTEFZX01BU0sgICAgICAgICAgIDB4NAo+PiArCj4+ICsjZGVmaW5lIEhJQk1DX0NV UlJfR0FURV9MT0NBTE1FTSh4KSAgICAgICAgICAgICgoeCkgPDwgMSkKPj4gKyNkZWZpbmUgSElC TUNfQ1VSUl9HQVRFX0xPQ0FMTUVNX01BU0sgICAgICAgICAgMHgyCj4+ICsKPj4gKyNkZWZpbmUg SElCTUNfTU9ERTBfR0FURSAgICAgICAgICAgICAgICAgICAgICAgMHgwMDAwNDQKPj4gKyNkZWZp bmUgSElCTUNfTU9ERTFfR0FURSAgICAgICAgICAgICAgICAgICAgICAgMHgwMDAwNDgKPj4gKyNk ZWZpbmUgSElCTUNfUE9XRVJfTU9ERV9DVFJMICAgICAgICAgICAgICAgICAgMHgwMDAwNEMKPj4g Kwo+PiArI2RlZmluZSBISUJNQ19QV19NT0RFX0NUTF9PU0NfSU5QVVQoeCkgICAgICAgICAoKHgp IDw8IDMpCj4+ICsjZGVmaW5lIEhJQk1DX1BXX01PREVfQ1RMX09TQ19JTlBVVF9NQVNLICAgICAg IDB4OAo+PiArCj4+ICsjZGVmaW5lIEhJQk1DX1BXX01PREVfQ1RMX01PREUoeCkgICAgICAgICAg ICAgICgoeCkgPDwgMCkKPj4gKyNkZWZpbmUgSElCTUNfUFdfTU9ERV9DVExfTU9ERV9NQVNLICAg ICAgICAgICAgMHgwMwo+PiArI2RlZmluZSBISUJNQ19QV19NT0RFX0NUTF9NT0RFX1NISUZUICAg ICAgICAgICAwCj4+ICsKPj4gKyNkZWZpbmUgSElCTUNfUFdfTU9ERV9DVExfTU9ERV9NT0RFMCAg ICAgICAgICAgMAo+PiArI2RlZmluZSBISUJNQ19QV19NT0RFX0NUTF9NT0RFX01PREUxICAgICAg ICAgICAxCj4+ICsjZGVmaW5lIEhJQk1DX1BXX01PREVfQ1RMX01PREVfU0xFRVAgICAgICAgICAg IDIKPj4gKwo+PiArI2RlZmluZSBISUJNQ19QQU5FTF9QTExfQ1RSTCAgICAgICAgICAgICAgICAg ICAweDAwMDA1Qwo+PiArI2RlZmluZSBISUJNQ19DUlRfUExMX0NUUkwgICAgICAgICAgICAgICAg ICAgICAweDAwMDA2MAo+PiArCj4+ICsjZGVmaW5lIEhJQk1DX1BMTF9DVFJMX0JZUEFTUyh4KSAg ICAgICAgICAgICAgICgoeCkgPDwgMTgpCj4+ICsjZGVmaW5lIEhJQk1DX1BMTF9DVFJMX0JZUEFT U19NQVNLICAgICAgICAgICAgIDB4NDAwMDAKPj4gKwo+PiArI2RlZmluZSBISUJNQ19QTExfQ1RS TF9QT1dFUih4KSAgICAgICAgICAgICAgICAgICAgICAgICgoeCkgPDwgMTcpCj4+ICsjZGVmaW5l IEhJQk1DX1BMTF9DVFJMX1BPV0VSX01BU0sgICAgICAgICAgICAgIDB4MjAwMDAKPj4gKwo+PiAr I2RlZmluZSBISUJNQ19QTExfQ1RSTF9JTlBVVCh4KSAgICAgICAgICAgICAgICAgICAgICAgICgo eCkgPDwgMTYpCj4+ICsjZGVmaW5lIEhJQk1DX1BMTF9DVFJMX0lOUFVUX01BU0sgICAgICAgICAg ICAgIDB4MTAwMDAKPj4gKwo+PiArI2RlZmluZSBISUJNQ19QTExfQ1RSTF9QT0QoeCkgICAgICAg ICAgICAgICAgICAoKHgpIDw8IDE0KQo+PiArI2RlZmluZSBISUJNQ19QTExfQ1RSTF9QT0RfTUFT SyAgICAgICAgICAgICAgICAgICAgICAgIDB4QzAwMAo+PiArCj4+ICsjZGVmaW5lIEhJQk1DX1BM TF9DVFJMX09EKHgpICAgICAgICAgICAgICAgICAgICgoeCkgPDwgMTIpCj4+ICsjZGVmaW5lIEhJ Qk1DX1BMTF9DVFJMX09EX01BU0sgICAgICAgICAgICAgICAgIDB4MzAwMAo+PiArCj4+ICsjZGVm aW5lIEhJQk1DX1BMTF9DVFJMX04oeCkgICAgICAgICAgICAgICAgICAgICgoeCkgPDwgOCkKPj4g KyNkZWZpbmUgSElCTUNfUExMX0NUUkxfTl9NQVNLICAgICAgICAgICAgICAgICAgMHhGMDAKPj4g Kwo+PiArI2RlZmluZSBISUJNQ19QTExfQ1RSTF9NKHgpICAgICAgICAgICAgICAgICAgICAoKHgp IDw8IDApCj4+ICsjZGVmaW5lIEhJQk1DX1BMTF9DVFJMX01fTUFTSyAgICAgICAgICAgICAgICAg IDB4RkYKPj4gKwo+PiArI2RlZmluZSBISUJNQ19DUlRfRElTUF9DVEwgICAgICAgICAgICAgICAg ICAgICAweDgwMjAwCj4+ICsKPj4gKyNkZWZpbmUgSElCTUNfQ1JUX0RJU1BfQ1RMX0NSVFNFTEVD VCh4KSAgICAgICAgICAgICAgICAoKHgpIDw8IDI1KQo+PiArI2RlZmluZSBISUJNQ19DUlRfRElT UF9DVExfQ1JUU0VMRUNUX01BU0sgICAgICAweDIwMDAwMDAKPj4gKwo+PiArI2RlZmluZSBISUJN Q19DUlRTRUxFQ1RfQ1JUICAgICAgICAgICAgICAgICAgICAxCj4+ICsKPj4gKyNkZWZpbmUgSElC TUNfQ1JUX0RJU1BfQ1RMX0NMT0NLX1BIQVNFKHgpICAgICAgKCh4KSA8PCAxNCkKPj4gKyNkZWZp bmUgSElCTUNfQ1JUX0RJU1BfQ1RMX0NMT0NLX1BIQVNFX01BU0sgICAgMHg0MDAwCj4+ICsKPj4g KyNkZWZpbmUgSElCTUNfQ1JUX0RJU1BfQ1RMX1ZTWU5DX1BIQVNFKHgpICAgICAgKCh4KSA8PCAx MykKPj4gKyNkZWZpbmUgSElCTUNfQ1JUX0RJU1BfQ1RMX1ZTWU5DX1BIQVNFX01BU0sgICAgMHgy MDAwCj4+ICsKPj4gKyNkZWZpbmUgSElCTUNfQ1JUX0RJU1BfQ1RMX0hTWU5DX1BIQVNFKHgpICAg ICAgKCh4KSA8PCAxMikKPj4gKyNkZWZpbmUgSElCTUNfQ1JUX0RJU1BfQ1RMX0hTWU5DX1BIQVNF X01BU0sgICAgMHgxMDAwCj4+ICsKPj4gKyNkZWZpbmUgSElCTUNfQ1JUX0RJU1BfQ1RMX1RJTUlO Ryh4KSAgICAgICAgICAgKCh4KSA8PCA4KQo+PiArI2RlZmluZSBISUJNQ19DUlRfRElTUF9DVExf VElNSU5HX01BU0sgICAgICAgICAweDEwMAo+PiArCj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9ESVNQ X0NUTF9QTEFORSh4KSAgICAgICAgICAgICgoeCkgPDwgMikKPj4gKyNkZWZpbmUgSElCTUNfQ1JU X0RJU1BfQ1RMX1BMQU5FX01BU0sgICAgICAgICAgNAo+PiArCj4+ICsjZGVmaW5lIEhJQk1DX0NS VF9ESVNQX0NUTF9GT1JNQVQoeCkgICAgICAgICAgICgoeCkgPDwgMCkKPj4gKyNkZWZpbmUgSElC TUNfQ1JUX0RJU1BfQ1RMX0ZPUk1BVF9NQVNLICAgICAgICAgMHgwMwo+PiArCj4+ICsjZGVmaW5l IEhJQk1DX0NSVF9GQl9BRERSRVNTICAgICAgICAgICAgICAgICAgIDB4MDgwMjA0Cj4+ICsKPj4g KyNkZWZpbmUgSElCTUNfQ1JUX0ZCX1dJRFRIICAgICAgICAgICAgICAgICAgICAgMHgwODAyMDgK Pj4gKyNkZWZpbmUgSElCTUNfQ1JUX0ZCX1dJRFRIX1dJRFRIKHgpICAgICAgICAgICAgKCh4KSA8 PCAxNikKPj4gKyNkZWZpbmUgSElCTUNfQ1JUX0ZCX1dJRFRIX1dJRFRIX01BU0sgICAgICAgICAg MHgzRkZGMDAwMAo+PiArI2RlZmluZSBISUJNQ19DUlRfRkJfV0lEVEhfT0ZGUyh4KSAgICAgICAg ICAgICAoKHgpIDw8IDApCj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9GQl9XSURUSF9PRkZTX01BU0sg ICAgICAgICAgIDB4M0ZGRgo+PiArCj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9IT1JaX1RPVEFMICAg ICAgICAgICAgICAgICAgIDB4MDgwMjBDCj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9IT1JaX1RPVEFM X1RPVEFMKHgpICAgICAgICAgICgoeCkgPDwgMTYpCj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9IT1Ja X1RPVEFMX1RPVEFMX01BU0sgICAgICAgICAgICAgICAgMHhGRkYwMDAwCj4+ICsKPj4gKyNkZWZp bmUgSElCTUNfQ1JUX0hPUlpfVE9UQUxfRElTUF9FTkQoeCkgICAgICAgKCh4KSA8PCAwKQo+PiAr I2RlZmluZSBISUJNQ19DUlRfSE9SWl9UT1RBTF9ESVNQX0VORF9NQVNLICAgICAweEZGRgo+PiAr Cj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9IT1JaX1NZTkMgICAgICAgICAgICAgICAgICAgIDB4MDgw MjEwCj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9IT1JaX1NZTkNfV0lEVEgoeCkgICAgICAgICAgICgo eCkgPDwgMTYpCj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9IT1JaX1NZTkNfV0lEVEhfTUFTSyAgICAg ICAgIDB4RkYwMDAwCj4+ICsKPj4gKyNkZWZpbmUgSElCTUNfQ1JUX0hPUlpfU1lOQ19TVEFSVCh4 KSAgICAgICAgICAgKCh4KSA8PCAwKQo+PiArI2RlZmluZSBISUJNQ19DUlRfSE9SWl9TWU5DX1NU QVJUX01BU0sgICAgICAgICAweEZGRgo+PiArCj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9WRVJUX1RP VEFMICAgICAgICAgICAgICAgICAgIDB4MDgwMjE0Cj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9WRVJU X1RPVEFMX1RPVEFMKHgpICAgICAgICAgICgoeCkgPDwgMTYpCj4+ICsjZGVmaW5lIEhJQk1DX0NS VF9WRVJUX1RPVEFMX1RPVEFMX01BU0sgICAgICAgICAgICAgICAgMHg3RkZGMDAwMAo+PiArCj4+ ICsjZGVmaW5lIEhJQk1DX0NSVF9WRVJUX1RPVEFMX0RJU1BfRU5EKHgpICAgICAgICgoeCkgPDwg MCkKPj4gKyNkZWZpbmUgSElCTUNfQ1JUX1ZFUlRfVE9UQUxfRElTUF9FTkRfTUFTSyAgICAgMHg3 RkYKPj4gKwo+PiArI2RlZmluZSBISUJNQ19DUlRfVkVSVF9TWU5DICAgICAgICAgICAgICAgICAg ICAweDA4MDIxOAo+PiArI2RlZmluZSBISUJNQ19DUlRfVkVSVF9TWU5DX0hFSUdIVCh4KSAgICAg ICAgICAoKHgpIDw8IDE2KQo+PiArI2RlZmluZSBISUJNQ19DUlRfVkVSVF9TWU5DX0hFSUdIVF9N QVNLICAgICAgICAgICAgICAgIDB4M0YwMDAwCj4+ICsKPj4gKyNkZWZpbmUgSElCTUNfQ1JUX1ZF UlRfU1lOQ19TVEFSVCh4KSAgICAgICAgICAgKCh4KSA8PCAwKQo+PiArI2RlZmluZSBISUJNQ19D UlRfVkVSVF9TWU5DX1NUQVJUX01BU0sgICAgICAgICAweDdGRgo+PiArCj4+ICsvKiBBdXRvIENl bnRlcmluZyAqLwo+PiArI2RlZmluZSBISUJNQ19DUlRfQVVUT19DRU5URVJJTkdfVEwgICAgICAg ICAgICAweDA4MDI4MAo+PiArI2RlZmluZSBISUJNQ19DUlRfQVVUT19DRU5URVJJTkdfVExfVE9Q KHgpICAgICAoKHgpIDw8IDE2KQo+PiArI2RlZmluZSBISUJNQ19DUlRfQVVUT19DRU5URVJJTkdf VExfVE9QX01BU0sgICAweDdGRjAwMDAKPj4gKwo+PiArI2RlZmluZSBISUJNQ19DUlRfQVVUT19D RU5URVJJTkdfVExfTEVGVCh4KSAgICAoKHgpIDw8IDApCj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9B VVRPX0NFTlRFUklOR19UTF9MRUZUX01BU0sgIDB4N0ZGCj4+ICsKPj4gKyNkZWZpbmUgSElCTUNf Q1JUX0FVVE9fQ0VOVEVSSU5HX0JSICAgICAgICAgICAgMHgwODAyODQKPj4gKyNkZWZpbmUgSElC TUNfQ1JUX0FVVE9fQ0VOVEVSSU5HX0JSX0JPVFRPTSh4KSAgKCh4KSA8PCAxNikKPj4gKyNkZWZp bmUgSElCTUNfQ1JUX0FVVE9fQ0VOVEVSSU5HX0JSX0JPVFRPTV9NQVNLICAgICAgICAweDdGRjAw MDAKPj4gKwo+PiArI2RlZmluZSBISUJNQ19DUlRfQVVUT19DRU5URVJJTkdfQlJfUklHSFQoeCkg ICAoKHgpIDw8IDApCj4+ICsjZGVmaW5lIEhJQk1DX0NSVF9BVVRPX0NFTlRFUklOR19CUl9SSUdI VF9NQVNLIDB4N0ZGCj4+ICsKPj4gKy8qIHJlZ2lzdGVyIHRvIGNvbnRyb2wgcGFuZWwgb3V0cHV0 ICovCj4+ICsjZGVmaW5lIEhJQk1DX0RJU1BMQVlfQ09OVFJPTF9ISVNJTEUgICAgICAgICAgIDB4 ODAyODgKPj4gKyNkZWZpbmUgSElCTUNfRElTUExBWV9DT05UUk9MX0ZQVkRERU4oeCkgICAgICAg KCh4KSA8PCAwKQo+PiArI2RlZmluZSBISUJNQ19ESVNQTEFZX0NPTlRST0xfUEFORUxEQVRFKHgp ICAgICAoKHgpIDw8IDEpCj4+ICsjZGVmaW5lIEhJQk1DX0RJU1BMQVlfQ09OVFJPTF9GUEVOKHgp ICAgICAgICAgICgoeCkgPDwgMikKPj4gKyNkZWZpbmUgSElCTUNfRElTUExBWV9DT05UUk9MX1ZC SUFTRU4oeCkgICAgICAgKCh4KSA8PCAzKQo+PiArCj4+ICsjZGVmaW5lIEhJQk1DX1JBV19JTlRF UlJVUFQgICAgICAgICAgICAgICAgICAgIDB4ODAyOTAKPj4gKyNkZWZpbmUgSElCTUNfUkFXX0lO VEVSUlVQVF9WQkxBTksoeCkgICAgICAgICAgKCh4KSA8PCAyKQo+PiArI2RlZmluZSBISUJNQ19S QVdfSU5URVJSVVBUX1ZCTEFOS19NQVNLICAgICAgICAgICAgICAgIDB4NAo+PiArCj4+ICsjZGVm aW5lIEhJQk1DX1JBV19JTlRFUlJVUFRfRU4gICAgICAgICAgICAgICAgIDB4ODAyOTgKPj4gKyNk ZWZpbmUgSElCTUNfUkFXX0lOVEVSUlVQVF9FTl9WQkxBTksoeCkgICAgICAgKCh4KSA8PCAyKQo+ PiArI2RlZmluZSBISUJNQ19SQVdfSU5URVJSVVBUX0VOX1ZCTEFOS19NQVNLICAgICAweDQKPj4g Kwo+PiArLyogcmVnaXN0ZXIgYW5kIHZhbHVlcyBmb3IgUExMIGNvbnRyb2wgKi8KPj4gKyNkZWZp bmUgQ1JUX1BMTDFfSFMgICAgICAgICAgICAgICAgICAgICAgICAgICAgMHg4MDJhOAo+PiArI2Rl ZmluZSBDUlRfUExMMV9IU19PVVRFUl9CWVBBU1MoeCkgICAgICAgICAgICAoKHgpIDw8IDMwKQo+ PiArI2RlZmluZSBDUlRfUExMMV9IU19JTlRFUl9CWVBBU1MoeCkgICAgICAgICAgICAoKHgpIDw8 IDI5KQo+PiArI2RlZmluZSBDUlRfUExMMV9IU19QT1dFUk9OKHgpICAgICAgICAgICAgICAgICAo KHgpIDw8IDI0KQo+PiArCj4+ICsjZGVmaW5lIENSVF9QTEwxX0hTXzI1TUhaICAgICAgICAgICAg ICAgICAgICAgIDB4MjNkNDBmMDIKPj4gKyNkZWZpbmUgQ1JUX1BMTDFfSFNfNDBNSFogICAgICAg ICAgICAgICAgICAgICAgMHgyMzk0MDgwMQo+PiArI2RlZmluZSBDUlRfUExMMV9IU182NU1IWiAg ICAgICAgICAgICAgICAgICAgICAweDIzOTQwZDAxCj4+ICsjZGVmaW5lIENSVF9QTEwxX0hTXzc4 TUhaICAgICAgICAgICAgICAgICAgICAgIDB4MjM1NDBGODIKPj4gKyNkZWZpbmUgQ1JUX1BMTDFf SFNfNzRNSFogICAgICAgICAgICAgICAgICAgICAgMHgyMzk0MWRjMgo+PiArI2RlZmluZSBDUlRf UExMMV9IU184ME1IWiAgICAgICAgICAgICAgICAgICAgICAweDIzOTQxMDAxCj4+ICsjZGVmaW5l IENSVF9QTEwxX0hTXzgwTUhaXzExNTIgICAgICAgICAgICAgICAgIDB4MjM1NDBmYzIKPj4gKyNk ZWZpbmUgQ1JUX1BMTDFfSFNfMTA4TUhaICAgICAgICAgICAgICAgICAgICAgMHgyM2I0MWIwMQo+ PiArI2RlZmluZSBDUlRfUExMMV9IU18xNjJNSFogICAgICAgICAgICAgICAgICAgICAweDIzNDgw NjgxCj4+ICsjZGVmaW5lIENSVF9QTEwxX0hTXzE0OE1IWiAgICAgICAgICAgICAgICAgICAgIDB4 MjM1NDFkYzIKPj4gKyNkZWZpbmUgQ1JUX1BMTDFfSFNfMTkzTUhaICAgICAgICAgICAgICAgICAg ICAgMHgyMzQ4MDdjMQo+PiArCj4+ICsjZGVmaW5lIENSVF9QTEwyX0hTICAgICAgICAgICAgICAg ICAgICAgICAgICAgIDB4ODAyYWMKPj4gKyNkZWZpbmUgQ1JUX1BMTDJfSFNfMjVNSFogICAgICAg ICAgICAgICAgICAgICAgMHgyMDZCODUxRQo+PiArI2RlZmluZSBDUlRfUExMMl9IU180ME1IWiAg ICAgICAgICAgICAgICAgICAgICAweDMwMDAwMDAwCj4+ICsjZGVmaW5lIENSVF9QTEwyX0hTXzY1 TUhaICAgICAgICAgICAgICAgICAgICAgIDB4NDAwMDAwMDAKPj4gKyNkZWZpbmUgQ1JUX1BMTDJf SFNfNzhNSFogICAgICAgICAgICAgICAgICAgICAgMHg1MEUxNDdBRQo+PiArI2RlZmluZSBDUlRf UExMMl9IU183NE1IWiAgICAgICAgICAgICAgICAgICAgICAweDYwMkI2QUU3Cj4+ICsjZGVmaW5l IENSVF9QTEwyX0hTXzgwTUhaICAgICAgICAgICAgICAgICAgICAgIDB4NzAwMDAwMDAKPj4gKyNk ZWZpbmUgQ1JUX1BMTDJfSFNfMTA4TUhaICAgICAgICAgICAgICAgICAgICAgMHg4MDAwMDAwMAo+ PiArI2RlZmluZSBDUlRfUExMMl9IU18xNjJNSFogICAgICAgICAgICAgICAgICAgICAweEEwMDAw MDAwCj4+ICsjZGVmaW5lIENSVF9QTEwyX0hTXzE0OE1IWiAgICAgICAgICAgICAgICAgICAgIDB4 QjBDQ0NDQ0QKPj4gKyNkZWZpbmUgQ1JUX1BMTDJfSFNfMTkzTUhaICAgICAgICAgICAgICAgICAg ICAgMHhDMDg3MkIwMgo+PiArCj4+ICsjZGVmaW5lIEhJQk1DX0ZJRUxEKGZpZWxkLCB2YWx1ZSkg KGZpZWxkKHZhbHVlKSAmIGZpZWxkIyNfTUFTSykKPj4gKyNlbmRpZgo+PiAtLQo+PiAxLjkuMQo+ Pgo+IF9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCj4gbGlu dXhhcm0gbWFpbGluZyBsaXN0Cj4gbGludXhhcm1AaHVhd2VpLmNvbQo+IGh0dHA6Ly9ybmQtb3Bl bmV1bGVyLmh1YXdlaS5jb20vbWFpbG1hbi9saXN0aW5mby9saW51eGFybQo+Cj4gLgo+CgpfX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1hcm0ta2Vy bmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0 cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVs Cg==