PM / devfreq: exynos-bus: need for suspend OPP?

[Tobias Jakobi <tjakobi@math.uni-bielefeld.de>]

Hello everyone,

I was thinking about the following. At the moment we have a suspend OPP
for cpufreq-dt in place for the Exynos4412 SoC (added in
1605b60ad064c7019db8ade07f0b7bdc8c197b93). The rationale behind is that
the board using the SoC might not have some PMIC reset in place. In case
the board goes into reboot with a low OPP (i.e. low frequency, but also
low core voltage), this results in a hang when the first-stage
bootloaders sets its default core frequency.

So this is properly handled in the kernel just fine, except for some
corner cases like emergency reboot.

But some time ago devfreq support for the various busses in the
Exynos4412 was added. On the ODROID boards e.g. this adjust MIF and INT
voltage.

Let us take the DMC bus. Operating frequency is 100~400MHz and voltage
is 900~1050mV.

Now let's look at the corresponding board file
(http://git.denx.de/?p=u-boot.git;a=blob;f=board/samsung/odroid/odroid.c#l234)
in upstream u-boot. If I read this correctly DMC is set to 400MHz there.

Here's the question. Could this, similar to the cpufreq/core frequency
issue, pose a problem when the kernel goes into reboot when DMC is on
the lowest OPP state?

I'm not saying that it does. This just came to my mind during some
recent discussion.


With best wishes,
Tobias