From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: boris.ostrovsky@oracle.com, xen-devel@lists.xen.org,
sherry.hurwitz@amd.com
Subject: Re: [PATCH] AMD IOMMU: Support IOAPIC IDs larger than 128
Date: Fri, 2 Dec 2016 10:48:29 +0700 [thread overview]
Message-ID: <5840EF0D.4090405@amd.com> (raw)
In-Reply-To: <58401E7F02000078001242E0@prv-mh.provo.novell.com>
Hi Jan,
On 12/01/2016 06:58 PM, Jan Beulich wrote:
>>>> On 01.12.16 at 12:04, <suravee.suthikulpanit@amd.com> wrote:
>> Currently, the driver uses the APIC ID to index into the ioapic_sbdf array.
>> The current MAX_IO_APICS is 128, which causes the driver initialization
>> to fail on the system with IOAPIC ID >= 128.
>>
>> Instead, this patch adds APIC ID in the struct ioapic_sbdf,
>> which is used to match the entry when searching through the array.
>
> Wouldn't it have been a lot simpler to just bump the array size to
> 256? I'll comment on the rest of the patch anyway ...
Yes, it would, and that's what I originally tried. However, I was
thinking that it would be unnecessarily waste of space since that would
affect serveral structures i.e.
* mp_ioapic_routing[MAX_IO_APICS]
* mp_ioapics[MAX_IO_APICS]
* nr_ioapic_entries[MAX_IO_APICS]
* vector_map[MAX_IO_APICS]
* ioapic_sbdf[MAX_IO_APICS]
If you think this is a reasonable change, I can simplify the patch. The
number 256 should be reasonable for x1APIC since it only supports 8-bit
APIC ID. However, this might be an issue later on with 32-bit APIC ID w/
x2APIC.
Thanks,
Suravee
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next prev parent reply other threads:[~2016-12-02 3:48 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-01 11:04 [PATCH] AMD IOMMU: Support IOAPIC IDs larger than 128 Suravee Suthikulpanit
2016-12-01 11:58 ` Jan Beulich
2016-12-02 3:48 ` Suravee Suthikulpanit [this message]
2016-12-02 7:45 ` Jan Beulich
2016-12-05 4:30 ` Suravee Suthikulpanit
2016-12-05 7:46 ` Jan Beulich
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