[PATCH xf86-video-ati] Calculate log base 2 in radeon.h based on clz for all platforms

From: Jochen Rollwagen <joro-2013-zqRNUXuvxA0b1SvskN2V4Q@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: [PATCH xf86-video-ati] Calculate log base 2 in radeon.h based on clz for all platforms
Date: Fri, 2 Dec 2016 11:07:02 +0100	[thread overview]
Message-ID: <584147C6.8000004@t-online.de> (raw)

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This commit replaces the inline assembler code (for x86 platforms) and 
loop (for non-x86 platforms) in RADEONLog2 with a one-liner version 
based on clz (count leading zeroes).
---
  src/radeon.h |   13 +------------
  1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/src/radeon.h b/src/radeon.h
index 5797bed..23ecfeb 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -935,18 +935,7 @@ enum {
  static __inline__ int
  RADEONLog2(int val)
  {
-    int bits;
-#if (defined __i386__ || defined __x86_64__) && (defined __GNUC__)
-    __asm volatile("bsrl    %1, %0"
-        : "=r" (bits)
-        : "c" (val)
-    );
-    return bits;
-#else
-    for (bits = 0; val != 0; val >>= 1, ++bits)
-        ;
-    return bits - 1;
-#endif
+    return (31 - __builtin_clz(val));
  }

  #define RADEON_TILING_MASK                0xff
-- 
1.7.9.5


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>From 350d663a5ce85d51632a6fa56d28afa2447c6558 Mon Sep 17 00:00:00 2001
From: Jochen Rollwagen <joro-2013-zqRNUXuvxA0b1SvskN2V4Q@public.gmane.org>
Date: Fri, 2 Dec 2016 10:56:39 +0100
Subject: [PATCH] Calculate log base 2 in radeon.h based on clz for all
 platforms

This commit replaces the inline assembler code (for x86 platforms) and loop (for non-x86 platforms) in RADEONLog2 with a one-liner version based on clz (count leading zeroes).
---
 src/radeon.h |   13 +------------
 1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/src/radeon.h b/src/radeon.h
index 5797bed..23ecfeb 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -935,18 +935,7 @@ enum {
 static __inline__ int
 RADEONLog2(int val)
 {
-	int bits;
-#if (defined __i386__ || defined __x86_64__) && (defined __GNUC__)
-	__asm volatile("bsrl	%1, %0"
-		: "=r" (bits)
-		: "c" (val)
-	);
-	return bits;
-#else
-	for (bits = 0; val != 0; val >>= 1, ++bits)
-		;
-	return bits - 1;
-#endif
+	return (31 - __builtin_clz(val));
 }
 
 #define RADEON_TILING_MASK				0xff
-- 
1.7.9.5


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