From mboxrd@z Thu Jan  1 00:00:00 1970
From: tanxiaojun@huawei.com (Tan Xiaojun)
Date: Wed, 28 Dec 2016 11:42:12 +0800
Subject: [QUESTION] Arm64: Query L3 cache info via DT
Message-ID: <58633494.9030708@huawei.com>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

Hi.

I saw you discussed how to achieve querying cache information and tend to implement the external ones(like L3 cache) via DT a few months ago.

http://lists.infradead.org/pipermail/linux-arm-kernel/2016-February/405399.html

Are these implementations progressing? Forgive me to take the liberty to ask, we care about this thing.

If you've already implemented some codes, we can help with testing (in Hisilicon D02, D03, D05) after you send it to the mail-list.

We can try our best to help if there is any difficulty.


Thanks.
Xiaojun.