From mboxrd@z Thu Jan 1 00:00:00 1970 From: puck.chen@hisilicon.com (Chen Feng) Date: Fri, 6 Jan 2017 08:59:19 +0800 Subject: [RESEND 2/2] arm64: dts: Add dts files for Hisilicon Hi3660 SoC In-Reply-To: <20170105141456.GA5710@hector.attlocal.net> References: <1482744972-56622-1-git-send-email-puck.chen@hisilicon.com> <1482744972-56622-2-git-send-email-puck.chen@hisilicon.com> <20170105141456.GA5710@hector.attlocal.net> Message-ID: <586EEBE7.4050709@hisilicon.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2017/1/5 22:14, Andy Gross wrote: > On Mon, Dec 26, 2016 at 05:36:12PM +0800, Chen Feng wrote: >> Add initial dtsi file to support Hisilicon Hi3660 SoC with >> support of Octal core CPUs in two clusters(4 * A53 & 4 * A73). >> >> Also add dts file to support HiKey960 development board which >> based on Hi3660 SoC. >> The output console is earlycon "earlycon=pl011,0xfdf05000". >> And the con_init uart5 with a fixed clock, which already >> configured at bootloader. >> >> When clock is available, the uart5 will be modified. >> >> Tested on HiKey960 Board. >> >> Signed-off-by: Chen Feng >> --- >> arch/arm64/boot/dts/hisilicon/Makefile | 1 + >> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 34 +++++ >> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 156 ++++++++++++++++++++++ >> 3 files changed, 191 insertions(+) >> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660.dtsi >> >> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile >> index d5f43a0..b633b5d 100644 >> --- a/arch/arm64/boot/dts/hisilicon/Makefile >> +++ b/arch/arm64/boot/dts/hisilicon/Makefile >> @@ -1,4 +1,5 @@ >> dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb >> +dtb-$(CONFIG_ARCH_HISI) += hi3660-hikey960.dtb >> dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb >> dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb >> >> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >> new file mode 100644 >> index 0000000..3d7aead >> --- /dev/null >> +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >> @@ -0,0 +1,34 @@ >> +/* >> + * dts file for Hisilicon HiKey960 Development Board >> + * >> + * Copyright (C) 2016, Hisilicon Ltd. >> + * >> + */ >> + >> +/dts-v1/; >> + >> +#include "hi3660.dtsi" >> + >> +/ { >> + model = "HiKey960"; >> + compatible = "hisilicon,hi3660"; >> + >> + aliases { >> + serial5 = &uart5; /* console UART */ >> + }; >> + >> + chosen { >> + stdout-path = "serial5:115200n8"; >> + }; >> + >> + memory at 0 { >> + device_type = "memory"; >> + reg = <0x0 0x00400000 0x0 0xBFE00000>; > > Use lower case letters for hex numbers. 0xbfe00000. > ok, thanks! >> + }; >> + >> + soc { >> + uart5: uart at fdf05000 { >> + status = "ok"; >> + }; >> + }; >> +}; > > > > Regards, > > Andy > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chen Feng Subject: Re: [RESEND 2/2] arm64: dts: Add dts files for Hisilicon Hi3660 SoC Date: Fri, 6 Jan 2017 08:59:19 +0800 Message-ID: <586EEBE7.4050709@hisilicon.com> References: <1482744972-56622-1-git-send-email-puck.chen@hisilicon.com> <1482744972-56622-2-git-send-email-puck.chen@hisilicon.com> <20170105141456.GA5710@hector.attlocal.net> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20170105141456.GA5710-3KkwrOJo9xYlRp7syxWybdHuzzzSOjJt@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Andy Gross Cc: xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, catalin.marinas-5wv7dgnIgG8@public.gmane.org, will.deacon-5wv7dgnIgG8@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, suzhuangluan-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, xuyiping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org List-Id: devicetree@vger.kernel.org On 2017/1/5 22:14, Andy Gross wrote: > On Mon, Dec 26, 2016 at 05:36:12PM +0800, Chen Feng wrote: >> Add initial dtsi file to support Hisilicon Hi3660 SoC with >> support of Octal core CPUs in two clusters(4 * A53 & 4 * A73). >> >> Also add dts file to support HiKey960 development board which >> based on Hi3660 SoC. >> The output console is earlycon "earlycon=pl011,0xfdf05000". >> And the con_init uart5 with a fixed clock, which already >> configured at bootloader. >> >> When clock is available, the uart5 will be modified. >> >> Tested on HiKey960 Board. >> >> Signed-off-by: Chen Feng >> --- >> arch/arm64/boot/dts/hisilicon/Makefile | 1 + >> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 34 +++++ >> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 156 ++++++++++++++++++++++ >> 3 files changed, 191 insertions(+) >> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660.dtsi >> >> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile >> index d5f43a0..b633b5d 100644 >> --- a/arch/arm64/boot/dts/hisilicon/Makefile >> +++ b/arch/arm64/boot/dts/hisilicon/Makefile >> @@ -1,4 +1,5 @@ >> dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb >> +dtb-$(CONFIG_ARCH_HISI) += hi3660-hikey960.dtb >> dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb >> dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb >> >> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >> new file mode 100644 >> index 0000000..3d7aead >> --- /dev/null >> +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >> @@ -0,0 +1,34 @@ >> +/* >> + * dts file for Hisilicon HiKey960 Development Board >> + * >> + * Copyright (C) 2016, Hisilicon Ltd. >> + * >> + */ >> + >> +/dts-v1/; >> + >> +#include "hi3660.dtsi" >> + >> +/ { >> + model = "HiKey960"; >> + compatible = "hisilicon,hi3660"; >> + >> + aliases { >> + serial5 = &uart5; /* console UART */ >> + }; >> + >> + chosen { >> + stdout-path = "serial5:115200n8"; >> + }; >> + >> + memory@0 { >> + device_type = "memory"; >> + reg = <0x0 0x00400000 0x0 0xBFE00000>; > > Use lower case letters for hex numbers. 0xbfe00000. > ok, thanks! >> + }; >> + >> + soc { >> + uart5: uart@fdf05000 { >> + status = "ok"; >> + }; >> + }; >> +}; > > > > Regards, > > Andy > > . > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1162341AbdAFBD2 (ORCPT ); Thu, 5 Jan 2017 20:03:28 -0500 Received: from szxga01-in.huawei.com ([58.251.152.64]:30230 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753975AbdAFBDS (ORCPT ); Thu, 5 Jan 2017 20:03:18 -0500 Subject: Re: [RESEND 2/2] arm64: dts: Add dts files for Hisilicon Hi3660 SoC To: Andy Gross References: <1482744972-56622-1-git-send-email-puck.chen@hisilicon.com> <1482744972-56622-2-git-send-email-puck.chen@hisilicon.com> <20170105141456.GA5710@hector.attlocal.net> CC: , , , , , , , , , From: Chen Feng Message-ID: <586EEBE7.4050709@hisilicon.com> Date: Fri, 6 Jan 2017 08:59:19 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <20170105141456.GA5710@hector.attlocal.net> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.142.193.64] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020201.586EEBF3.003D,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: fde45b0ef3bd0bb6de441c05e9f3504d Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2017/1/5 22:14, Andy Gross wrote: > On Mon, Dec 26, 2016 at 05:36:12PM +0800, Chen Feng wrote: >> Add initial dtsi file to support Hisilicon Hi3660 SoC with >> support of Octal core CPUs in two clusters(4 * A53 & 4 * A73). >> >> Also add dts file to support HiKey960 development board which >> based on Hi3660 SoC. >> The output console is earlycon "earlycon=pl011,0xfdf05000". >> And the con_init uart5 with a fixed clock, which already >> configured at bootloader. >> >> When clock is available, the uart5 will be modified. >> >> Tested on HiKey960 Board. >> >> Signed-off-by: Chen Feng >> --- >> arch/arm64/boot/dts/hisilicon/Makefile | 1 + >> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 34 +++++ >> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 156 ++++++++++++++++++++++ >> 3 files changed, 191 insertions(+) >> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660.dtsi >> >> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile >> index d5f43a0..b633b5d 100644 >> --- a/arch/arm64/boot/dts/hisilicon/Makefile >> +++ b/arch/arm64/boot/dts/hisilicon/Makefile >> @@ -1,4 +1,5 @@ >> dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb >> +dtb-$(CONFIG_ARCH_HISI) += hi3660-hikey960.dtb >> dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb >> dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb >> >> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >> new file mode 100644 >> index 0000000..3d7aead >> --- /dev/null >> +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >> @@ -0,0 +1,34 @@ >> +/* >> + * dts file for Hisilicon HiKey960 Development Board >> + * >> + * Copyright (C) 2016, Hisilicon Ltd. >> + * >> + */ >> + >> +/dts-v1/; >> + >> +#include "hi3660.dtsi" >> + >> +/ { >> + model = "HiKey960"; >> + compatible = "hisilicon,hi3660"; >> + >> + aliases { >> + serial5 = &uart5; /* console UART */ >> + }; >> + >> + chosen { >> + stdout-path = "serial5:115200n8"; >> + }; >> + >> + memory@0 { >> + device_type = "memory"; >> + reg = <0x0 0x00400000 0x0 0xBFE00000>; > > Use lower case letters for hex numbers. 0xbfe00000. > ok, thanks! >> + }; >> + >> + soc { >> + uart5: uart@fdf05000 { >> + status = "ok"; >> + }; >> + }; >> +}; > > > > Regards, > > Andy > > . >