diff for duplicates of <587CAEBD.1010803@ti.com>

diff --git a/a/1.txt b/N1/1.txt
index d0a6a42..8b75049 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,14 +1,16 @@
 Hi Joao,
 
 On Monday 16 January 2017 03:57 PM, Joao Pinto wrote:
-> 
+> =
+
 > Hi,
-> 
-> Às 5:21 AM de 1/16/2017, Kishon Vijay Abraham I escreveu:
+> =
+
+> =C0s 5:21 AM de 1/16/2017, Kishon Vijay Abraham I escreveu:
 >> Hi Joao,
 >>
 >> On Friday 13 January 2017 10:19 PM, Joao Pinto wrote:
->>> Às 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
+>>> =C0s 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
 >>>> Split pcie-designware.c into pcie-designware-host.c that contains
 >>>> the host specific parts of the driver and pcie-designware.c that
 >>>> contains the parts used by both host driver and endpoint driver.
@@ -16,8 +18,10 @@ On Monday 16 January 2017 03:57 PM, Joao Pinto wrote:
 >>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
 >>>> ---
 >>>>  drivers/pci/dwc/Makefile               |    2 +-
->>>>  drivers/pci/dwc/pcie-designware-host.c |  619 ++++++++++++++++++++++++++++++++
->>>>  drivers/pci/dwc/pcie-designware.c      |  613 +------------------------------
+>>>>  drivers/pci/dwc/pcie-designware-host.c |  619 +++++++++++++++++++++++=
++++++++++
+>>>>  drivers/pci/dwc/pcie-designware.c      |  613 +----------------------=
+--------
 >>>>  drivers/pci/dwc/pcie-designware.h      |    8 +
 >>>>  4 files changed, 634 insertions(+), 608 deletions(-)
 >>>>  create mode 100644 drivers/pci/dwc/pcie-designware-host.c
@@ -33,22 +37,29 @@ On Monday 16 January 2017 03:57 PM, Joao Pinto wrote:
 >>>> -static void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,
 >>>> -				      int type, u64 cpu_addr, u64 pci_addr,
 >>>> -				      u32 size)
->>>> +void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
+>>>> +void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int ty=
+pe,
 >>>> +			       u64 cpu_addr, u64 pci_addr, u32 size)
 >>>>  {
 >>>>  	u32 retries, val;
->>>>  
->>>> @@ -186,220 +151,6 @@ static void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,
+>>>>  =
+
+>>>> @@ -186,220 +151,6 @@ static void dw_pcie_prog_outbound_atu(struct dw_=
+pcie *pci, int index,
 >>>>  	dev_err(pci->dev, "iATU is not being enabled\n");
 >>>>  }
 >>>
->>> Kishon, iATU only makes sense in The Root Complex (host), so it should be inside
+>>> Kishon, iATU only makes sense in The Root Complex (host), so it should =
+be inside
 >>> the pcie-designware-host.
 >>
->> That is not true. Outbound ATU should be programmed to access host side buffers
+>> That is not true. Outbound ATU should be programmed to access host side =
+buffers
 >> and inbound ATU should be programmed for the host to access EP mem space.
-> 
-> Sorry, I was not clear enough. What I was trying to suggest is, since the ATU
+> =
+
+> Sorry, I was not clear enough. What I was trying to suggest is, since the=
+ ATU
 > programming is done by the host, wouldn't be better to include it in the
 > pcie-designware-host? It is just an architectural detail.
 
@@ -60,3 +71,8 @@ pcie-designware.c
 
 Thanks
 Kishon
+
+_______________________________________________
+linux-arm-kernel mailing list
+linux-arm-kernel@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index 8a8ed97..d9eca0e 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -26,14 +26,16 @@
  "Hi Joao,\n"
  "\n"
  "On Monday 16 January 2017 03:57 PM, Joao Pinto wrote:\n"
- "> \n"
+ "> =\n"
+ "\n"
  "> Hi,\n"
- "> \n"
- "> \303\200s 5:21 AM de 1/16/2017, Kishon Vijay Abraham I escreveu:\n"
+ "> =\n"
+ "\n"
+ "> =C0s 5:21 AM de 1/16/2017, Kishon Vijay Abraham I escreveu:\n"
  ">> Hi Joao,\n"
  ">>\n"
  ">> On Friday 13 January 2017 10:19 PM, Joao Pinto wrote:\n"
- ">>> \303\200s 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:\n"
+ ">>> =C0s 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:\n"
  ">>>> Split pcie-designware.c into pcie-designware-host.c that contains\n"
  ">>>> the host specific parts of the driver and pcie-designware.c that\n"
  ">>>> contains the parts used by both host driver and endpoint driver.\n"
@@ -41,8 +43,10 @@
  ">>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>\n"
  ">>>> ---\n"
  ">>>>  drivers/pci/dwc/Makefile               |    2 +-\n"
- ">>>>  drivers/pci/dwc/pcie-designware-host.c |  619 ++++++++++++++++++++++++++++++++\n"
- ">>>>  drivers/pci/dwc/pcie-designware.c      |  613 +------------------------------\n"
+ ">>>>  drivers/pci/dwc/pcie-designware-host.c |  619 +++++++++++++++++++++++=\n"
+ "+++++++++\n"
+ ">>>>  drivers/pci/dwc/pcie-designware.c      |  613 +----------------------=\n"
+ "--------\n"
  ">>>>  drivers/pci/dwc/pcie-designware.h      |    8 +\n"
  ">>>>  4 files changed, 634 insertions(+), 608 deletions(-)\n"
  ">>>>  create mode 100644 drivers/pci/dwc/pcie-designware-host.c\n"
@@ -58,22 +62,29 @@
  ">>>> -static void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,\n"
  ">>>> -\t\t\t\t      int type, u64 cpu_addr, u64 pci_addr,\n"
  ">>>> -\t\t\t\t      u32 size)\n"
- ">>>> +void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,\n"
+ ">>>> +void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int ty=\n"
+ "pe,\n"
  ">>>> +\t\t\t       u64 cpu_addr, u64 pci_addr, u32 size)\n"
  ">>>>  {\n"
  ">>>>  \tu32 retries, val;\n"
- ">>>>  \n"
- ">>>> @@ -186,220 +151,6 @@ static void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,\n"
+ ">>>>  =\n"
+ "\n"
+ ">>>> @@ -186,220 +151,6 @@ static void dw_pcie_prog_outbound_atu(struct dw_=\n"
+ "pcie *pci, int index,\n"
  ">>>>  \tdev_err(pci->dev, \"iATU is not being enabled\\n\");\n"
  ">>>>  }\n"
  ">>>\n"
- ">>> Kishon, iATU only makes sense in The Root Complex (host), so it should be inside\n"
+ ">>> Kishon, iATU only makes sense in The Root Complex (host), so it should =\n"
+ "be inside\n"
  ">>> the pcie-designware-host.\n"
  ">>\n"
- ">> That is not true. Outbound ATU should be programmed to access host side buffers\n"
+ ">> That is not true. Outbound ATU should be programmed to access host side =\n"
+ "buffers\n"
  ">> and inbound ATU should be programmed for the host to access EP mem space.\n"
- "> \n"
- "> Sorry, I was not clear enough. What I was trying to suggest is, since the ATU\n"
+ "> =\n"
+ "\n"
+ "> Sorry, I was not clear enough. What I was trying to suggest is, since the=\n"
+ " ATU\n"
  "> programming is done by the host, wouldn't be better to include it in the\n"
  "> pcie-designware-host? It is just an architectural detail.\n"
  "\n"
@@ -84,6 +95,11 @@
  "pcie-designware.c\n"
  "\n"
  "Thanks\n"
- Kishon
+ "Kishon\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-arm-kernel mailing list\n"
+ "linux-arm-kernel@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-dca936a4586748d934f6aaa0db6a0b4b266948511111fb5f024b062841733157
+f0b23478b724d8c671e5e34852ce9b9cb9f287ca6bc80a23695994d24223533f
