From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Zhong Subject: Re: [PATCH v2 11/11] drm/rockchip/dsi: fix insufficient bandwidth of some panel Date: Wed, 15 Feb 2017 12:12:22 +0800 Message-ID: <58A3D526.7060707@rock-chips.com> References: <1484561311-494-1-git-send-email-zyw@rock-chips.com> <1484561311-494-12-git-send-email-zyw@rock-chips.com> <20170116124453.2154def9.john@metanate.com> <587DE489.2010004@rock-chips.com> <20170117105450.360c6c69.john@metanate.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170117105450.360c6c69.john@metanate.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: John Keeping Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, pawel.moll@arm.com, linux-rockchip@lists.infradead.org, yzq@rock-chips.com, linux-kernel@vger.kernel.org, dianders@chromium.org, dri-devel@lists.freedesktop.org, tfiga@chromium.org, robh+dt@kernel.org, galak@codeaurora.org, linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org SGkgSm9obgoKT24gMDEvMTcvMjAxNyAwNjo1NCBQTSwgSm9obiBLZWVwaW5nIHdyb3RlOgo+IE9u IFR1ZSwgMTcgSmFuIDIwMTcgMTc6MzE6NTMgKzA4MDAsIENocmlzIFpob25nIHdyb3RlOgo+Cj4+ IE9uIDAxLzE2LzIwMTcgMDg6NDQgUE0sIEpvaG4gS2VlcGluZyB3cm90ZToKPj4+IE9uIE1vbiwg MTYgSmFuIDIwMTcgMTg6MDg6MzEgKzA4MDAsIENocmlzIFpob25nIHdyb3RlOgo+Pj4gICAKPj4+ PiBTZXQgdGhlIGxhbmVzIGJwcyB0byAxIC8gMC45IHRpbWVzIG9mIHBjbGssIHRoZSBtYXJnaW4g aXMgbm90IGVub3VnaAo+Pj4+IGZvciBzb21lIHBhbmVsLCBpdCB3aWxsIGNhdXNlIHRoZSBzY3Jl ZW4gZGlzcGxheSBpcyBub3Qgbm9ybWFsLCBzbwo+Pj4+IGluY3JlYXNlcyB0aGUgYmFkbndpZHRo IHRvIDEgLyAwLjguCj4+Pj4KPj4+PiBTaWduZWQtb2ZmLWJ5OiBDaHJpcyBaaG9uZyA8enl3QHJv Y2stY2hpcHMuY29tPgo+Pj4+Cj4+Pj4gLS0tCj4+Pj4KPj4+PiAgICBkcml2ZXJzL2dwdS9kcm0v cm9ja2NoaXAvZHctbWlwaS1kc2kuYyB8IDQgKystLQo+Pj4+ICAgIDEgZmlsZSBjaGFuZ2VkLCAy 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YWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: zyw@rock-chips.com (Chris Zhong) Date: Wed, 15 Feb 2017 12:12:22 +0800 Subject: [PATCH v2 11/11] drm/rockchip/dsi: fix insufficient bandwidth of some panel In-Reply-To: <20170117105450.360c6c69.john@metanate.com> References: <1484561311-494-1-git-send-email-zyw@rock-chips.com> <1484561311-494-12-git-send-email-zyw@rock-chips.com> <20170116124453.2154def9.john@metanate.com> <587DE489.2010004@rock-chips.com> <20170117105450.360c6c69.john@metanate.com> Message-ID: <58A3D526.7060707@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi John On 01/17/2017 06:54 PM, John Keeping wrote: > On Tue, 17 Jan 2017 17:31:53 +0800, Chris Zhong wrote: > >> On 01/16/2017 08:44 PM, John Keeping wrote: >>> On Mon, 16 Jan 2017 18:08:31 +0800, Chris Zhong wrote: >>> >>>> Set the lanes bps to 1 / 0.9 times of pclk, the margin is not enough >>>> for some panel, it will cause the screen display is not normal, so >>>> increases the badnwidth to 1 / 0.8. >>>> >>>> Signed-off-by: Chris Zhong >>>> >>>> --- >>>> >>>> drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++-- >>>> 1 file changed, 2 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c >>>> index 9dfa73d..5a973fe 100644 >>>> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c >>>> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c >>>> @@ -501,8 +501,8 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi) >>>> >>>> mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC); >>>> if (mpclk) { >>>> - /* take 1 / 0.9, since mbps must big than bandwidth of RGB */ >>>> - tmp = mpclk * (bpp / dsi->lanes) * 10 / 9; >>>> + /* take 1 / 0.8, since mbps must big than bandwidth of RGB */ >>>> + tmp = mpclk * (bpp / dsi->lanes) * 10 / 8; >>> This and patch 9 are just hacking around the underlying problem in order >>> to make particular panels work. I'm pretty sure the actual issue is the >>> use of hardcoded values when configuring the PHY, since the PHY >>> parameters are specified in clock cycles but the MIPI spec requires >>> absolute time durations. >>> >>> I posted a series addressing this a while ago, although I screwed up >>> sending it so some patches were included twice and since no one >>> expressed any interest I didn't post a cleaned up version. >>> >>> The relevant patch is here: >>> >>> https://patchwork.kernel.org/patch/9340193/ >> Thanks very much, your patches are very useful for me. It looks your >> method is correct. >> And I am very confused why Mark Yao and me did not receive your patches >> before, >> although we have subscribed the . >> >> In addition, could you tell me which device ware you testing with these >> mipi patches. >> I going to test them these day. > I'm using RK3288 and I tested my patches with three different MIPI > displays, two of which require commands to be sent in order to set up > the panel. > > Thanks for testing the patches. > > > John I think we really need this patch, one mipi panel hit this problem again, with all your 24 patches and my 6 MIPI DSI patches So I will update my series to v7, and add this patch into it. > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751725AbdBOEMu (ORCPT ); Tue, 14 Feb 2017 23:12:50 -0500 Received: from regular1.263xmail.com ([211.150.99.134]:56832 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751410AbdBOEMs (ORCPT ); Tue, 14 Feb 2017 23:12:48 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: zyw@rock-chips.com X-FST-TO: mark.yao@rock-chips.com X-SENDER-IP: 220.128.92.125 X-LOGIN-NAME: zyw@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH v2 11/11] drm/rockchip/dsi: fix insufficient bandwidth of some panel To: John Keeping References: <1484561311-494-1-git-send-email-zyw@rock-chips.com> <1484561311-494-12-git-send-email-zyw@rock-chips.com> <20170116124453.2154def9.john@metanate.com> <587DE489.2010004@rock-chips.com> <20170117105450.360c6c69.john@metanate.com> Cc: dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com, mark.rutland@arm.com, devicetree@vger.kernel.org, robh+dt@kernel.org, galak@codeaurora.org, pawel.moll@arm.com, seanpaul@chromium.org, David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Mark Yao From: Chris Zhong Message-ID: <58A3D526.7060707@rock-chips.com> Date: Wed, 15 Feb 2017 12:12:22 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-Version: 1.0 In-Reply-To: <20170117105450.360c6c69.john@metanate.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi John On 01/17/2017 06:54 PM, John Keeping wrote: > On Tue, 17 Jan 2017 17:31:53 +0800, Chris Zhong wrote: > >> On 01/16/2017 08:44 PM, John Keeping wrote: >>> On Mon, 16 Jan 2017 18:08:31 +0800, Chris Zhong wrote: >>> >>>> Set the lanes bps to 1 / 0.9 times of pclk, the margin is not enough >>>> for some panel, it will cause the screen display is not normal, so >>>> increases the badnwidth to 1 / 0.8. >>>> >>>> Signed-off-by: Chris Zhong >>>> >>>> --- >>>> >>>> drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++-- >>>> 1 file changed, 2 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c >>>> index 9dfa73d..5a973fe 100644 >>>> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c >>>> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c >>>> @@ -501,8 +501,8 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi) >>>> >>>> mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC); >>>> if (mpclk) { >>>> - /* take 1 / 0.9, since mbps must big than bandwidth of RGB */ >>>> - tmp = mpclk * (bpp / dsi->lanes) * 10 / 9; >>>> + /* take 1 / 0.8, since mbps must big than bandwidth of RGB */ >>>> + tmp = mpclk * (bpp / dsi->lanes) * 10 / 8; >>> This and patch 9 are just hacking around the underlying problem in order >>> to make particular panels work. I'm pretty sure the actual issue is the >>> use of hardcoded values when configuring the PHY, since the PHY >>> parameters are specified in clock cycles but the MIPI spec requires >>> absolute time durations. >>> >>> I posted a series addressing this a while ago, although I screwed up >>> sending it so some patches were included twice and since no one >>> expressed any interest I didn't post a cleaned up version. >>> >>> The relevant patch is here: >>> >>> https://patchwork.kernel.org/patch/9340193/ >> Thanks very much, your patches are very useful for me. It looks your >> method is correct. >> And I am very confused why Mark Yao and me did not receive your patches >> before, >> although we have subscribed the . >> >> In addition, could you tell me which device ware you testing with these >> mipi patches. >> I going to test them these day. > I'm using RK3288 and I tested my patches with three different MIPI > displays, two of which require commands to be sent in order to set up > the panel. > > Thanks for testing the patches. > > > John I think we really need this patch, one mipi panel hit this problem again, with all your 24 patches and my 6 MIPI DSI patches So I will update my series to v7, and add this patch into it. > >