All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <58BE42B2.20305@ti.com>

diff --git a/a/1.txt b/N1/1.txt
index 05a923d..b796b15 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,7 +1,7 @@
 Hi Joao,
 
 On Friday 17 February 2017 10:50 PM, Joao Pinto wrote:
-> Às 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:
+> =C0s 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:
 >> Add endpoint mode support to designware driver. This uses the
 >> EP Core layer introduced recently to add endpoint mode support.
 >> *Any* function driver can now use this designware device
@@ -11,7 +11,8 @@ On Friday 17 February 2017 10:50 PM, Joao Pinto wrote:
 >> ---
 >>  drivers/pci/dwc/Kconfig              |    5 +
 >>  drivers/pci/dwc/Makefile             |    1 +
->>  drivers/pci/dwc/pcie-designware-ep.c |  342 ++++++++++++++++++++++++++++++++++
+>>  drivers/pci/dwc/pcie-designware-ep.c |  342 +++++++++++++++++++++++++++=
++++++++
 >>  drivers/pci/dwc/pcie-designware.c    |   51 +++++
 >>  drivers/pci/dwc/pcie-designware.h    |   72 +++++++
 >>  5 files changed, 471 insertions(+)
@@ -20,19 +21,22 @@ On Friday 17 February 2017 10:50 PM, Joao Pinto wrote:
 
 <snip>
 
->> diff --git a/drivers/pci/dwc/pcie-designware.c b/drivers/pci/dwc/pcie-designware.c
+>> diff --git a/drivers/pci/dwc/pcie-designware.c b/drivers/pci/dwc/pcie-de=
+signware.c
 >> index 686945d..49b28c8 100644
 >> --- a/drivers/pci/dwc/pcie-designware.c
 >> +++ b/drivers/pci/dwc/pcie-designware.c
->> @@ -173,6 +173,57 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
+>> @@ -173,6 +173,57 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci,=
+ int index, int type,
 >>  	dev_err(pci->dev, "iATU is not being enabled\n");
 >>  }
->>  
+>>  =
+
 >> +int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar,
 >> +			     u64 cpu_addr, enum dw_pcie_as_type as_type)
 >> +{
 >> +	int type;
->> +	void __iomem *base = pci->dbi_base;
+>> +	void __iomem *base =3D pci->dbi_base;
 >> +
 >> +	dw_pcie_write_dbi(pci, base, PCIE_ATU_VIEWPORT, 0x4,
 >> +			  PCIE_ATU_REGION_INBOUND | index);
@@ -43,10 +47,10 @@ On Friday 17 February 2017 10:50 PM, Joao Pinto wrote:
 >> +
 >> +	switch (as_type) {
 >> +	case DW_PCIE_AS_MEM:
->> +		type = PCIE_ATU_TYPE_MEM;
+>> +		type =3D PCIE_ATU_TYPE_MEM;
 >> +		break;
 >> +	case DW_PCIE_AS_IO:
->> +		type = PCIE_ATU_TYPE_IO;
+>> +		type =3D PCIE_ATU_TYPE_IO;
 >> +		break;
 >> +	default:
 >> +		return -EINVAL;
@@ -58,12 +62,20 @@ On Friday 17 February 2017 10:50 PM, Joao Pinto wrote:
 >> +	return 0;
 >> +}
 >> +
-> 
-> This Atu programming is for PCI Cores <= 4.70. Please follow the same approach as:
-> https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/tree/drivers/pci/dwc/pcie-designware.c?h=pci/host-designware#n95
+> =
+
+> This Atu programming is for PCI Cores <=3D 4.70. Please follow the same a=
+pproach as:
+> https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/tree/drivers=
+/pci/dwc/pcie-designware.c?h=3Dpci/host-designware#n95
 
 Can you provide PCIE_GET_ATU_INB_UNR_REG_OFFSET (similar to
 PCIE_GET_ATU_OUTB_UNR_REG_OFFSET)?
 
 Thanks
 Kishon
+
+_______________________________________________
+linux-arm-kernel mailing list
+linux-arm-kernel@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index 7d849bd..78e8691 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -19,7 +19,7 @@
  "Hi Joao,\n"
  "\n"
  "On Friday 17 February 2017 10:50 PM, Joao Pinto wrote:\n"
- "> \303\200s 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:\n"
+ "> =C0s 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:\n"
  ">> Add endpoint mode support to designware driver. This uses the\n"
  ">> EP Core layer introduced recently to add endpoint mode support.\n"
  ">> *Any* function driver can now use this designware device\n"
@@ -29,7 +29,8 @@
  ">> ---\n"
  ">>  drivers/pci/dwc/Kconfig              |    5 +\n"
  ">>  drivers/pci/dwc/Makefile             |    1 +\n"
- ">>  drivers/pci/dwc/pcie-designware-ep.c |  342 ++++++++++++++++++++++++++++++++++\n"
+ ">>  drivers/pci/dwc/pcie-designware-ep.c |  342 +++++++++++++++++++++++++++=\n"
+ "+++++++\n"
  ">>  drivers/pci/dwc/pcie-designware.c    |   51 +++++\n"
  ">>  drivers/pci/dwc/pcie-designware.h    |   72 +++++++\n"
  ">>  5 files changed, 471 insertions(+)\n"
@@ -38,19 +39,22 @@
  "\n"
  "<snip>\n"
  "\n"
- ">> diff --git a/drivers/pci/dwc/pcie-designware.c b/drivers/pci/dwc/pcie-designware.c\n"
+ ">> diff --git a/drivers/pci/dwc/pcie-designware.c b/drivers/pci/dwc/pcie-de=\n"
+ "signware.c\n"
  ">> index 686945d..49b28c8 100644\n"
  ">> --- a/drivers/pci/dwc/pcie-designware.c\n"
  ">> +++ b/drivers/pci/dwc/pcie-designware.c\n"
- ">> @@ -173,6 +173,57 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,\n"
+ ">> @@ -173,6 +173,57 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci,=\n"
+ " int index, int type,\n"
  ">>  \tdev_err(pci->dev, \"iATU is not being enabled\\n\");\n"
  ">>  }\n"
- ">>  \n"
+ ">>  =\n"
+ "\n"
  ">> +int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar,\n"
  ">> +\t\t\t     u64 cpu_addr, enum dw_pcie_as_type as_type)\n"
  ">> +{\n"
  ">> +\tint type;\n"
- ">> +\tvoid __iomem *base = pci->dbi_base;\n"
+ ">> +\tvoid __iomem *base =3D pci->dbi_base;\n"
  ">> +\n"
  ">> +\tdw_pcie_write_dbi(pci, base, PCIE_ATU_VIEWPORT, 0x4,\n"
  ">> +\t\t\t  PCIE_ATU_REGION_INBOUND | index);\n"
@@ -61,10 +65,10 @@
  ">> +\n"
  ">> +\tswitch (as_type) {\n"
  ">> +\tcase DW_PCIE_AS_MEM:\n"
- ">> +\t\ttype = PCIE_ATU_TYPE_MEM;\n"
+ ">> +\t\ttype =3D PCIE_ATU_TYPE_MEM;\n"
  ">> +\t\tbreak;\n"
  ">> +\tcase DW_PCIE_AS_IO:\n"
- ">> +\t\ttype = PCIE_ATU_TYPE_IO;\n"
+ ">> +\t\ttype =3D PCIE_ATU_TYPE_IO;\n"
  ">> +\t\tbreak;\n"
  ">> +\tdefault:\n"
  ">> +\t\treturn -EINVAL;\n"
@@ -76,14 +80,22 @@
  ">> +\treturn 0;\n"
  ">> +}\n"
  ">> +\n"
- "> \n"
- "> This Atu programming is for PCI Cores <= 4.70. Please follow the same approach as:\n"
- "> https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/tree/drivers/pci/dwc/pcie-designware.c?h=pci/host-designware#n95\n"
+ "> =\n"
+ "\n"
+ "> This Atu programming is for PCI Cores <=3D 4.70. Please follow the same a=\n"
+ "pproach as:\n"
+ "> https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/tree/drivers=\n"
+ "/pci/dwc/pcie-designware.c?h=3Dpci/host-designware#n95\n"
  "\n"
  "Can you provide PCIE_GET_ATU_INB_UNR_REG_OFFSET (similar to\n"
  "PCIE_GET_ATU_OUTB_UNR_REG_OFFSET)?\n"
  "\n"
  "Thanks\n"
- Kishon
+ "Kishon\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-arm-kernel mailing list\n"
+ "linux-arm-kernel@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-e2e513f4c81e000e35b1c5eb9405dcf87e7db37037a5be357f6ed91d7674ccc7
+7c0ffcb1e32289e4896afe76e19a53700475d9799cb928ec5c1a3462ab86e9bf

diff --git a/a/1.txt b/N2/1.txt
index 05a923d..03da1cb 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -1,7 +1,7 @@
 Hi Joao,
 
 On Friday 17 February 2017 10:50 PM, Joao Pinto wrote:
-> Às 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:
+> ?s 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:
 >> Add endpoint mode support to designware driver. This uses the
 >> EP Core layer introduced recently to add endpoint mode support.
 >> *Any* function driver can now use this designware device
diff --git a/a/content_digest b/N2/content_digest
index 7d849bd..4593112 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,25 +1,16 @@
  "ref\01487325042-28227-1-git-send-email-kishon@ti.com\0"
  "ref\01487325042-28227-9-git-send-email-kishon@ti.com\0"
  "ref\045e5288e-d11f-c855-af9b-692a42d878c6@synopsys.com\0"
- "From\0Kishon Vijay Abraham I <kishon@ti.com>\0"
- "Subject\0Re: [PATCH v2 08/22] PCI: dwc: designware: Add EP mode support\0"
+ "From\0kishon@ti.com (Kishon Vijay Abraham I)\0"
+ "Subject\0[PATCH v2 08/22] PCI: dwc: designware: Add EP mode support\0"
  "Date\0Tue, 7 Mar 2017 10:48:42 +0530\0"
- "To\0Joao Pinto <Joao.Pinto@synopsys.com>"
-  Bjorn Helgaas <bhelgaas@google.com>
- " Jingoo Han <jingoohan1@gmail.com>\0"
- "Cc\0devicetree@vger.kernel.org"
-  linux-doc@vger.kernel.org
-  linux-pci@vger.kernel.org
-  nsekhar@ti.com
-  linux-kernel@vger.kernel.org
-  linux-omap@vger.kernel.org
- " linux-arm-kernel@lists.infradead.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Hi Joao,\n"
  "\n"
  "On Friday 17 February 2017 10:50 PM, Joao Pinto wrote:\n"
- "> \303\200s 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:\n"
+ "> ?s 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:\n"
  ">> Add endpoint mode support to designware driver. This uses the\n"
  ">> EP Core layer introduced recently to add endpoint mode support.\n"
  ">> *Any* function driver can now use this designware device\n"
@@ -86,4 +77,4 @@
  "Thanks\n"
  Kishon
 
-e2e513f4c81e000e35b1c5eb9405dcf87e7db37037a5be357f6ed91d7674ccc7
+5ec8f5f15076d43d22484f05801e051b1f8c1fc1a1b13629ee2597b192baae5c

diff --git a/a/content_digest b/N3/content_digest
index 7d849bd..c930312 100644
--- a/a/content_digest
+++ b/N3/content_digest
@@ -7,13 +7,13 @@
  "To\0Joao Pinto <Joao.Pinto@synopsys.com>"
   Bjorn Helgaas <bhelgaas@google.com>
  " Jingoo Han <jingoohan1@gmail.com>\0"
- "Cc\0devicetree@vger.kernel.org"
-  linux-doc@vger.kernel.org
-  linux-pci@vger.kernel.org
-  nsekhar@ti.com
-  linux-kernel@vger.kernel.org
-  linux-omap@vger.kernel.org
- " linux-arm-kernel@lists.infradead.org\0"
+ "Cc\0<linux-pci@vger.kernel.org>"
+  <linux-doc@vger.kernel.org>
+  <linux-kernel@vger.kernel.org>
+  <devicetree@vger.kernel.org>
+  <linux-omap@vger.kernel.org>
+  <linux-arm-kernel@lists.infradead.org>
+ " <nsekhar@ti.com>\0"
  "\00:1\0"
  "b\0"
  "Hi Joao,\n"
@@ -86,4 +86,4 @@
  "Thanks\n"
  Kishon
 
-e2e513f4c81e000e35b1c5eb9405dcf87e7db37037a5be357f6ed91d7674ccc7
+ec57ac78fc6138dbc291e4ee005fe3d0ebf40b96b236ae2d579ee2131b3711e3

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.