From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?B?6ZmI5Lqu?= Subject: Re: [PATCH v2 4/6] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs Date: Thu, 23 Mar 2017 10:06:02 +0800 Message-ID: <58D32D8A.1030506@rock-chips.com> References: <1489670244-13328-1-git-send-email-cl@rock-chips.com> <1489670244-13328-5-git-send-email-cl@rock-chips.com> <14610453.rKm3MBREMz@diego> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <14610453.rKm3MBREMz@diego> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: =?UTF-8?Q?Heiko_St=c3=bcbner?= Cc: mark.rutland@arm.com, wsa@the-dreams.de, linux-iio@vger.kernel.org, catalin.marinas@arm.com, shawn.lin@rock-chips.com, will.deacon@arm.com, kever.yang@rock-chips.com, dianders@chromium.org, yamada.masahiro@socionext.com, tony.xie@rock-chips.com, linux-i2c@vger.kernel.org, pmeerw@pmeerw.net, lars@metafoo.de, zhengxing@rock-chips.com, khilman@baylibre.com, linux-rockchip@lists.infradead.org, jay.xu@rock-chips.com, wxt@rock-chips.com, huangtao@rock-chips.com, devicetree@vger.kernel.org, zhangqing@rock-chips.com, paweljarosz3691@gmail.com, arnd@arndb.de, yhx@rock-chips.com, knaack.h@gmx.de, robh+dt@kernel.org, matthias.bgg@gmail.com, rocky.hao@rock-chips.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, david.wu@rock-chips.com, fabio.estevam@nxp.com, andy.yan@rock-chips.com, akpm@linux-foundation.org, shawnguo@kernel.org, afaerber@suse.de, jic23@kernel List-Id: linux-i2c@vger.kernel.org SGnvvIwgSGVpa28K5ZyoIDIwMTflubQwM+aciDIx5pelIDE2OjU1LCBIZWlrbyBTdMO8Ym5lciDl hpnpgZM6Cj4gSGksCj4KPiBBbSBEb25uZXJzdGFnLCAxNi4gTcOkcnogMjAxNywgMjE6MTc6MjIg Q0VUIHNjaHJpZWIgY2xAcm9jay1jaGlwcy5jb206Cj4+IEZyb206IExpYW5nIENoZW4gPGNsQHJv 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LCBzbyB3ZSBzZXQgI2FkZHJlc3MtY2VsbHMgPSA8Mj4gdG8ga2VlcCBjb21wYXRpYmlsaXR5PwoK CgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgt YXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQu b3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJt LWtlcm5lbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from regular1.263xmail.com ([211.150.99.132]:50897 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752715AbdCWCIc (ORCPT ); Wed, 22 Mar 2017 22:08:32 -0400 Subject: Re: [PATCH v2 4/6] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs To: =?UTF-8?Q?Heiko_St=c3=bcbner?= References: <1489670244-13328-1-git-send-email-cl@rock-chips.com> <1489670244-13328-5-git-send-email-cl@rock-chips.com> <14610453.rKm3MBREMz@diego> Cc: robh+dt@kernel.org, mark.rutland@arm.com, zhengxing@rock-chips.com, andy.yan@rock-chips.com, jay.xu@rock-chips.com, matthias.bgg@gmail.com, paweljarosz3691@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, wsa@the-dreams.de, linux-i2c@vger.kernel.org, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, wxt@rock-chips.com, david.wu@rock-chips.com, linux-iio@vger.kernel.org, shawn.lin@rock-chips.com, akpm@linux-foundation.org, dianders@chromium.org, yamada.masahiro@socionext.com, catalin.marinas@arm.com, will.deacon@arm.com, afaerber@suse.de, shawnguo@kernel.org, khilman@baylibre.com, arnd@arndb.de, fabio.estevam@nxp.com, zhangqing@rock-chips.com, kever.yang@rock-chips.com, tony.xie@rock-chips.com, huangtao@rock-chips.com, yhx@rock-chips.com, rocky.hao@rock-chips.com From: =?UTF-8?B?6ZmI5Lqu?= Message-ID: <58D32D8A.1030506@rock-chips.com> Date: Thu, 23 Mar 2017 10:06:02 +0800 MIME-Version: 1.0 In-Reply-To: <14610453.rKm3MBREMz@diego> Content-Type: text/plain; charset=UTF-8; format=flowed Sender: linux-iio-owner@vger.kernel.org List-Id: linux-iio@vger.kernel.org Hi， Heiko 在 2017年03月21日 16:55, Heiko Stübner 写道: > Hi, > > Am Donnerstag, 16. März 2017, 21:17:22 CET schrieb cl@rock-chips.com: >> From: Liang Chen >> >> This patch adds core dtsi file for Rockchip RK3328 SoCs. >> >> Signed-off-by: Liang Chen >> --- >> arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1362 >> ++++++++++++++++++++++++++++++ 1 file changed, 1362 insertions(+) >> create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi >> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi new file mode 100644 >> index 0000000..a92955c >> --- /dev/null >> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi >> @@ -0,0 +1,1362 @@ >> +/* >> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd >> + * >> + * This file is dual-licensed: you can use it either under the terms >> + * of the GPL or the X11 license, at your option. Note that this dual >> + * licensing only applies to this file, and not this project as a >> + * whole. >> + * >> + * a) This library is free software; you can redistribute it and/or >> + * modify it under the terms of the GNU General Public License as >> + * published by the Free Software Foundation; either version 2 of the >> + * License, or (at your option) any later version. >> + * >> + * This library is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + * >> + * Or, alternatively, >> + * >> + * b) Permission is hereby granted, free of charge, to any person >> + * obtaining a copy of this software and associated documentation >> + * files (the "Software"), to deal in the Software without >> + * restriction, including without limitation the rights to use, >> + * copy, modify, merge, publish, distribute, sublicense, and/or >> + * sell copies of the Software, and to permit persons to whom the >> + * Software is furnished to do so, subject to the following >> + * conditions: >> + * >> + * The above copyright notice and this permission notice shall be >> + * included in all copies or substantial portions of the Software. >> + * >> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, >> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES >> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND >> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT >> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, >> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING >> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR >> + * OTHER DEALINGS IN THE SOFTWARE. >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +/ { >> + compatible = "rockchip,rk3328"; >> + >> + interrupt-parent = <&gic>; >> + #address-cells = <2>; >> + #size-cells = <2>; >> + >> + aliases { >> + serial0 = &uart0; >> + serial1 = &uart1; >> + serial2 = &uart2; >> + i2c0 = &i2c0; >> + i2c1 = &i2c1; >> + i2c2 = &i2c2; >> + i2c3 = &i2c3; >> + }; >> + >> + cpus { >> + #address-cells = <2>; > #address-cells = <1>? You most likely don't need the 2 field cpu regs? This is likely copy from juno board of arm, and i find that #address-cells = <1> in some boards and #address-cells = <2> in the other boards. All of ROCKCHIP Socs set #address-cells = <2>, so we set #address-cells = <2> to keep compatibility? From mboxrd@z Thu Jan 1 00:00:00 1970 From: cl@rock-chips.com (=?UTF-8?B?6ZmI5Lqu?=) Date: Thu, 23 Mar 2017 10:06:02 +0800 Subject: [PATCH v2 4/6] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs In-Reply-To: <14610453.rKm3MBREMz@diego> References: <1489670244-13328-1-git-send-email-cl@rock-chips.com> <1489670244-13328-5-git-send-email-cl@rock-chips.com> <14610453.rKm3MBREMz@diego> Message-ID: <58D32D8A.1030506@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi? Heiko ? 2017?03?21? 16:55, Heiko St?bner ??: > Hi, > > Am Donnerstag, 16. M?rz 2017, 21:17:22 CET schrieb cl at rock-chips.com: >> From: Liang Chen >> >> This patch adds core dtsi file for Rockchip RK3328 SoCs. >> >> Signed-off-by: Liang Chen >> --- >> arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1362 >> ++++++++++++++++++++++++++++++ 1 file changed, 1362 insertions(+) >> create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi >> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi new file mode 100644 >> index 0000000..a92955c >> --- /dev/null >> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi >> @@ -0,0 +1,1362 @@ >> +/* >> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd >> + * >> + * This file is dual-licensed: you can use it either under the terms >> + * of the GPL or the X11 license, at your option. Note that this dual >> + * licensing only applies to this file, and not this project as a >> + * whole. >> + * >> + * a) This library is free software; you can redistribute it and/or >> + * modify it under the terms of the GNU General Public License as >> + * published by the Free Software Foundation; either version 2 of the >> + * License, or (at your option) any later version. >> + * >> + * This library is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + * >> + * Or, alternatively, >> + * >> + * b) Permission is hereby granted, free of charge, to any person >> + * obtaining a copy of this software and associated documentation >> + * files (the "Software"), to deal in the Software without >> + * restriction, including without limitation the rights to use, >> + * copy, modify, merge, publish, distribute, sublicense, and/or >> + * sell copies of the Software, and to permit persons to whom the >> + * Software is furnished to do so, subject to the following >> + * conditions: >> + * >> + * The above copyright notice and this permission notice shall be >> + * included in all copies or substantial portions of the Software. >> + * >> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, >> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES >> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND >> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT >> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, >> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING >> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR >> + * OTHER DEALINGS IN THE SOFTWARE. >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +/ { >> + compatible = "rockchip,rk3328"; >> + >> + interrupt-parent = <&gic>; >> + #address-cells = <2>; >> + #size-cells = <2>; >> + >> + aliases { >> + serial0 = &uart0; >> + serial1 = &uart1; >> + serial2 = &uart2; >> + i2c0 = &i2c0; >> + i2c1 = &i2c1; >> + i2c2 = &i2c2; >> + i2c3 = &i2c3; >> + }; >> + >> + cpus { >> + #address-cells = <2>; > #address-cells = <1>? You most likely don't need the 2 field cpu regs? This is likely copy from juno board of arm, and i find that #address-cells = <1> in some boards and #address-cells = <2> in the other boards. All of ROCKCHIP Socs set #address-cells = <2>, so we set #address-cells = <2> to keep compatibility?