Re: [PATCH 1/8] drm/amdgpu: add VMHUB to ring association

[zhoucm1 <david1.zhou-5C7GfCeVMHo@public.gmane.org>]

On 2017年04月08日 00:59, Andres Rodriguez wrote:
> Some minor nitpicks as replies to the other emails.
>
> With those fixed, this series is:
Looks good to me.

David
> Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
>
> I've learned about VMHUB from your patches, so take it with a little 
> grain of salt though.
>
> On 2017-04-07 12:11 PM, Christian König wrote:
>> From: Christian König <christian.koenig@amd.com>
>>
>> Add the info which ring belonging to which VMHUB.
>>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>> ---
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 +
>>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c    | 3 +++
>>  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c   | 1 +
>>  drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c    | 2 ++
>>  drivers/gpu/drm/amd/amdgpu/vce_v4_0.c    | 1 +
>>  5 files changed, 8 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
>> index 7479e47..45bb87b 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
>> @@ -99,6 +99,7 @@ struct amdgpu_ring_funcs {
>>      uint32_t        align_mask;
>>      u32            nop;
>>      bool            support_64bit_ptrs;
>> +    unsigned        vmhub;
>>
>>      /* ring read/write ptr handling */
>>      u64 (*get_rptr)(struct amdgpu_ring *ring);
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
>> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> index cb6c7eb8..71b092b 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> @@ -3456,6 +3456,7 @@ static const struct amdgpu_ring_funcs 
>> gfx_v9_0_ring_funcs_gfx = {
>>      .align_mask = 0xff,
>>      .nop = PACKET3(PACKET3_NOP, 0x3FFF),
>>      .support_64bit_ptrs = true,
>> +    .vmhub = AMDGPU_GFXHUB,
>>      .get_rptr = gfx_v9_0_ring_get_rptr_gfx,
>>      .get_wptr = gfx_v9_0_ring_get_wptr_gfx,
>>      .set_wptr = gfx_v9_0_ring_set_wptr_gfx,
>> @@ -3500,6 +3501,7 @@ static const struct amdgpu_ring_funcs 
>> gfx_v9_0_ring_funcs_compute = {
>>      .align_mask = 0xff,
>>      .nop = PACKET3(PACKET3_NOP, 0x3FFF),
>>      .support_64bit_ptrs = true,
>> +    .vmhub = AMDGPU_GFXHUB,
>>      .get_rptr = gfx_v9_0_ring_get_rptr_compute,
>>      .get_wptr = gfx_v9_0_ring_get_wptr_compute,
>>      .set_wptr = gfx_v9_0_ring_set_wptr_compute,
>> @@ -3529,6 +3531,7 @@ static const struct amdgpu_ring_funcs 
>> gfx_v9_0_ring_funcs_kiq = {
>>      .align_mask = 0xff,
>>      .nop = PACKET3(PACKET3_NOP, 0x3FFF),
>>      .support_64bit_ptrs = true,
>> +    .vmhub = AMDGPU_GFXHUB,
>>      .get_rptr = gfx_v9_0_ring_get_rptr_compute,
>>      .get_wptr = gfx_v9_0_ring_get_wptr_compute,
>>      .set_wptr = gfx_v9_0_ring_set_wptr_compute,
>> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 
>> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
>> index d40eb31..8cbb49d 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
>> @@ -1473,6 +1473,7 @@ static const struct amdgpu_ring_funcs 
>> sdma_v4_0_ring_funcs = {
>>      .align_mask = 0xf,
>>      .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
>>      .support_64bit_ptrs = true,
>> +    .vmhub = AMDGPU_MMHUB,
>>      .get_rptr = sdma_v4_0_ring_get_rptr,
>>      .get_wptr = sdma_v4_0_ring_get_wptr,
>>      .set_wptr = sdma_v4_0_ring_set_wptr,
>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 
>> b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> index 819148a..fa80465 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> @@ -1448,6 +1448,7 @@ static const struct amdgpu_ring_funcs 
>> uvd_v7_0_ring_vm_funcs = {
>>      .align_mask = 0xf,
>>      .nop = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP), 0),
>>      .support_64bit_ptrs = false,
>> +    .vmhub = AMDGPU_MMHUB,
>>      .get_rptr = uvd_v7_0_ring_get_rptr,
>>      .get_wptr = uvd_v7_0_ring_get_wptr,
>>      .set_wptr = uvd_v7_0_ring_set_wptr,
>> @@ -1475,6 +1476,7 @@ static const struct amdgpu_ring_funcs 
>> uvd_v7_0_enc_ring_vm_funcs = {
>>      .align_mask = 0x3f,
>>      .nop = HEVC_ENC_CMD_NO_OP,
>>      .support_64bit_ptrs = false,
>> +    .vmhub = AMDGPU_MMHUB,
>>      .get_rptr = uvd_v7_0_enc_ring_get_rptr,
>>      .get_wptr = uvd_v7_0_enc_ring_get_wptr,
>>      .set_wptr = uvd_v7_0_enc_ring_set_wptr,
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 
>> b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>> index 8dde83f..6374133 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>> @@ -1074,6 +1074,7 @@ static const struct amdgpu_ring_funcs 
>> vce_v4_0_ring_vm_funcs = {
>>      .align_mask = 0x3f,
>>      .nop = VCE_CMD_NO_OP,
>>      .support_64bit_ptrs = false,
>> +    .vmhub = AMDGPU_MMHUB,
>>      .get_rptr = vce_v4_0_ring_get_rptr,
>>      .get_wptr = vce_v4_0_ring_get_wptr,
>>      .set_wptr = vce_v4_0_ring_set_wptr,
>>
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