From: Heiko Schocher <hs@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/4] sunxi: Move function for later convenience
Date: Fri, 28 Apr 2017 05:43:11 +0200 [thread overview]
Message-ID: <5902BA4F.7010807@denx.de> (raw)
In-Reply-To: <20170426220337.13136-3-jernej.skrabec@siol.net>
Hello Jernej,
Am 27.04.2017 um 00:03 schrieb Jernej Skrabec:
> This commit only moves i2c_init_board() function almost to the top and
> doesn't have any functional changes.
>
> This is needed for a temporary workaround in next commit when support
> for DM I2C will be introduced.
>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> ---
>
> board/sunxi/board.c | 188 ++++++++++++++++++++++++++--------------------------
> 1 file changed, 94 insertions(+), 94 deletions(-)
Reviewed-by: Heiko Schocher <hs@denx.de>
bye,
Heiko
>
> diff --git a/board/sunxi/board.c b/board/sunxi/board.c
> index 04a629125e..f903a5d0a0 100644
> --- a/board/sunxi/board.c
> +++ b/board/sunxi/board.c
> @@ -77,6 +77,100 @@ static int soft_i2c_board_init(void) { return 0; }
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +void i2c_init_board(void)
> +{
> +#ifdef CONFIG_I2C0_ENABLE
> +#if defined(CONFIG_MACH_SUN4I) || \
> + defined(CONFIG_MACH_SUN5I) || \
> + defined(CONFIG_MACH_SUN7I) || \
> + defined(CONFIG_MACH_SUN8I_R40)
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN4I_GPB_TWI0);
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN4I_GPB_TWI0);
> + clock_twi_onoff(0, 1);
> +#elif defined(CONFIG_MACH_SUN6I)
> + sunxi_gpio_set_cfgpin(SUNXI_GPH(14), SUN6I_GPH_TWI0);
> + sunxi_gpio_set_cfgpin(SUNXI_GPH(15), SUN6I_GPH_TWI0);
> + clock_twi_onoff(0, 1);
> +#elif defined(CONFIG_MACH_SUN8I)
> + sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN8I_GPH_TWI0);
> + sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN8I_GPH_TWI0);
> + clock_twi_onoff(0, 1);
> +#endif
> +#endif
> +
> +#ifdef CONFIG_I2C1_ENABLE
> +#if defined(CONFIG_MACH_SUN4I) || \
> + defined(CONFIG_MACH_SUN7I) || \
> + defined(CONFIG_MACH_SUN8I_R40)
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN4I_GPB_TWI1);
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN4I_GPB_TWI1);
> + clock_twi_onoff(1, 1);
> +#elif defined(CONFIG_MACH_SUN5I)
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(15), SUN5I_GPB_TWI1);
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(16), SUN5I_GPB_TWI1);
> + clock_twi_onoff(1, 1);
> +#elif defined(CONFIG_MACH_SUN6I)
> + sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1);
> + sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1);
> + clock_twi_onoff(1, 1);
> +#elif defined(CONFIG_MACH_SUN8I)
> + sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1);
> + sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1);
> + clock_twi_onoff(1, 1);
> +#endif
> +#endif
> +
> +#ifdef CONFIG_I2C2_ENABLE
> +#if defined(CONFIG_MACH_SUN4I) || \
> + defined(CONFIG_MACH_SUN7I) || \
> + defined(CONFIG_MACH_SUN8I_R40)
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2);
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2);
> + clock_twi_onoff(2, 1);
> +#elif defined(CONFIG_MACH_SUN5I)
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(17), SUN5I_GPB_TWI2);
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN5I_GPB_TWI2);
> + clock_twi_onoff(2, 1);
> +#elif defined(CONFIG_MACH_SUN6I)
> + sunxi_gpio_set_cfgpin(SUNXI_GPH(18), SUN6I_GPH_TWI2);
> + sunxi_gpio_set_cfgpin(SUNXI_GPH(19), SUN6I_GPH_TWI2);
> + clock_twi_onoff(2, 1);
> +#elif defined(CONFIG_MACH_SUN8I)
> + sunxi_gpio_set_cfgpin(SUNXI_GPE(12), SUN8I_GPE_TWI2);
> + sunxi_gpio_set_cfgpin(SUNXI_GPE(13), SUN8I_GPE_TWI2);
> + clock_twi_onoff(2, 1);
> +#endif
> +#endif
> +
> +#ifdef CONFIG_I2C3_ENABLE
> +#if defined(CONFIG_MACH_SUN6I)
> + sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3);
> + sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3);
> + clock_twi_onoff(3, 1);
> +#elif defined(CONFIG_MACH_SUN7I) || \
> + defined(CONFIG_MACH_SUN8I_R40)
> + sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3);
> + sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3);
> + clock_twi_onoff(3, 1);
> +#endif
> +#endif
> +
> +#ifdef CONFIG_I2C4_ENABLE
> +#if defined(CONFIG_MACH_SUN7I) || \
> + defined(CONFIG_MACH_SUN8I_R40)
> + sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4);
> + sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4);
> + clock_twi_onoff(4, 1);
> +#endif
> +#endif
> +
> +#ifdef CONFIG_R_I2C_ENABLE
> + clock_twi_onoff(5, 1);
> + sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);
> + sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_H3_GPL_R_TWI);
> +#endif
> +}
> +
> /* add board specific code here */
> int board_init(void)
> {
> @@ -406,100 +500,6 @@ int board_mmc_init(bd_t *bis)
> }
> #endif
>
> -void i2c_init_board(void)
> -{
> -#ifdef CONFIG_I2C0_ENABLE
> -#if defined(CONFIG_MACH_SUN4I) || \
> - defined(CONFIG_MACH_SUN5I) || \
> - defined(CONFIG_MACH_SUN7I) || \
> - defined(CONFIG_MACH_SUN8I_R40)
> - sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN4I_GPB_TWI0);
> - sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN4I_GPB_TWI0);
> - clock_twi_onoff(0, 1);
> -#elif defined(CONFIG_MACH_SUN6I)
> - sunxi_gpio_set_cfgpin(SUNXI_GPH(14), SUN6I_GPH_TWI0);
> - sunxi_gpio_set_cfgpin(SUNXI_GPH(15), SUN6I_GPH_TWI0);
> - clock_twi_onoff(0, 1);
> -#elif defined(CONFIG_MACH_SUN8I)
> - sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN8I_GPH_TWI0);
> - sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN8I_GPH_TWI0);
> - clock_twi_onoff(0, 1);
> -#endif
> -#endif
> -
> -#ifdef CONFIG_I2C1_ENABLE
> -#if defined(CONFIG_MACH_SUN4I) || \
> - defined(CONFIG_MACH_SUN7I) || \
> - defined(CONFIG_MACH_SUN8I_R40)
> - sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN4I_GPB_TWI1);
> - sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN4I_GPB_TWI1);
> - clock_twi_onoff(1, 1);
> -#elif defined(CONFIG_MACH_SUN5I)
> - sunxi_gpio_set_cfgpin(SUNXI_GPB(15), SUN5I_GPB_TWI1);
> - sunxi_gpio_set_cfgpin(SUNXI_GPB(16), SUN5I_GPB_TWI1);
> - clock_twi_onoff(1, 1);
> -#elif defined(CONFIG_MACH_SUN6I)
> - sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1);
> - sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1);
> - clock_twi_onoff(1, 1);
> -#elif defined(CONFIG_MACH_SUN8I)
> - sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1);
> - sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1);
> - clock_twi_onoff(1, 1);
> -#endif
> -#endif
> -
> -#ifdef CONFIG_I2C2_ENABLE
> -#if defined(CONFIG_MACH_SUN4I) || \
> - defined(CONFIG_MACH_SUN7I) || \
> - defined(CONFIG_MACH_SUN8I_R40)
> - sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2);
> - sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2);
> - clock_twi_onoff(2, 1);
> -#elif defined(CONFIG_MACH_SUN5I)
> - sunxi_gpio_set_cfgpin(SUNXI_GPB(17), SUN5I_GPB_TWI2);
> - sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN5I_GPB_TWI2);
> - clock_twi_onoff(2, 1);
> -#elif defined(CONFIG_MACH_SUN6I)
> - sunxi_gpio_set_cfgpin(SUNXI_GPH(18), SUN6I_GPH_TWI2);
> - sunxi_gpio_set_cfgpin(SUNXI_GPH(19), SUN6I_GPH_TWI2);
> - clock_twi_onoff(2, 1);
> -#elif defined(CONFIG_MACH_SUN8I)
> - sunxi_gpio_set_cfgpin(SUNXI_GPE(12), SUN8I_GPE_TWI2);
> - sunxi_gpio_set_cfgpin(SUNXI_GPE(13), SUN8I_GPE_TWI2);
> - clock_twi_onoff(2, 1);
> -#endif
> -#endif
> -
> -#ifdef CONFIG_I2C3_ENABLE
> -#if defined(CONFIG_MACH_SUN6I)
> - sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3);
> - sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3);
> - clock_twi_onoff(3, 1);
> -#elif defined(CONFIG_MACH_SUN7I) || \
> - defined(CONFIG_MACH_SUN8I_R40)
> - sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3);
> - sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3);
> - clock_twi_onoff(3, 1);
> -#endif
> -#endif
> -
> -#ifdef CONFIG_I2C4_ENABLE
> -#if defined(CONFIG_MACH_SUN7I) || \
> - defined(CONFIG_MACH_SUN8I_R40)
> - sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4);
> - sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4);
> - clock_twi_onoff(4, 1);
> -#endif
> -#endif
> -
> -#ifdef CONFIG_R_I2C_ENABLE
> - clock_twi_onoff(5, 1);
> - sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);
> - sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_H3_GPL_R_TWI);
> -#endif
> -}
> -
> #ifdef CONFIG_SPL_BUILD
> void sunxi_board_init(void)
> {
>
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
next prev parent reply other threads:[~2017-04-28 3:43 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-26 22:03 [U-Boot] [PATCH 0/4] sunxi: i2c: Add DM I2C support for A64/H3/H5 Jernej Skrabec
2017-04-26 22:03 ` [U-Boot] [PATCH 1/4] sunxi: power: Compile sy8106a driver only during SPL build Jernej Skrabec
2017-04-28 3:42 ` Heiko Schocher
2017-04-26 22:03 ` [U-Boot] [PATCH 2/4] sunxi: Move function for later convenience Jernej Skrabec
2017-04-28 3:43 ` Heiko Schocher [this message]
2017-04-26 22:03 ` [U-Boot] [PATCH 3/4] sunxi: i2c: Add support for DM I2C Jernej Skrabec
2017-04-28 3:43 ` Heiko Schocher
2017-04-29 0:28 ` Simon Glass
2017-04-26 22:03 ` [U-Boot] [PATCH 4/4] sunxi: Enable DM_I2C for A64/H3/H5 Jernej Skrabec
2017-04-28 3:44 ` Heiko Schocher
2017-04-27 7:44 ` [U-Boot] [PATCH 0/4] sunxi: i2c: Add DM I2C support " Maxime Ripard
2017-04-28 3:46 ` Heiko Schocher
2017-04-28 6:44 ` Maxime Ripard
2017-04-28 6:53 ` Heiko Schocher invitel
2017-04-28 7:27 ` Maxime Ripard
2017-04-28 10:04 ` Heiko Schocher
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5902BA4F.7010807@denx.de \
--to=hs@denx.de \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.