From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Leizhen (ThunderTown)" Subject: Re: [PATCH 1/1] iommu/arm-smmu-v3: replace writel with writel_relaxed in queue_inc_prod Date: Mon, 26 Jun 2017 21:41:47 +0800 Message-ID: <59510F1B.60304@huawei.com> References: <1497956694-11784-1-git-send-email-thunder.leizhen@huawei.com> <5949CBB7.1030908@huawei.com> <20170621090803.GB3768@arm.com> <59510C20.6000300@huawei.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <59510C20.6000300@huawei.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Will Deacon Cc: Joerg Roedel , Hanjun Guo , linux-kernel , Xinwei Hu , iommu , Zefan Li , Tianhong Ding , Robin Murphy , linux-arm-kernel List-Id: iommu@lists.linux-foundation.org On 2017/6/26 21:29, Leizhen (ThunderTown) wrote: > > > On 2017/6/21 17:08, Will Deacon wrote: >> On Wed, Jun 21, 2017 at 09:28:23AM +0800, Leizhen (ThunderTown) wrote: >>> On 2017/6/20 19:35, Robin Murphy wrote: >>>> On 20/06/17 12:04, Zhen Lei wrote: >>>>> This function is protected by spinlock, and the latter will do memory >>>>> barrier implicitly. So that we can safely use writel_relaxed. In fact, the >>>>> dmb operation will lengthen the time protected by lock, which indirectly >>>>> increase the locking confliction in the stress scene. >>>> >>>> If you remove the DSB between writing the commands (to Normal memory) >>>> and writing the pointer (to Device memory), how can you guarantee that >>>> the complete command is visible to the SMMU and it isn't going to try to >>>> consume stale memory contents? The spinlock is irrelevant since it's >>>> taken *before* the command is written. >>> OK, I see, thanks. Let's me see if there are any other methods. And I think >>> that this may should be done well by hardware. >> >> FWIW, I did use the _relaxed variants wherever I could when I wrote the >> driver. There might, of course, be bugs, but it's not like the normal case >> for drivers where the author didn't consider the _relaxed accessors >> initially. > A good news. I got a new idea and I will post v2 later. [PATCH 0/5] arm-smmu: performance optimization [PATCH 1/5] iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock confliction I just sent. > >> >> Will >> >> . >> > -- Thanks! BestRegards From mboxrd@z Thu Jan 1 00:00:00 1970 From: thunder.leizhen@huawei.com (Leizhen (ThunderTown)) Date: Mon, 26 Jun 2017 21:41:47 +0800 Subject: [PATCH 1/1] iommu/arm-smmu-v3: replace writel with writel_relaxed in queue_inc_prod In-Reply-To: <59510C20.6000300@huawei.com> References: <1497956694-11784-1-git-send-email-thunder.leizhen@huawei.com> <5949CBB7.1030908@huawei.com> <20170621090803.GB3768@arm.com> <59510C20.6000300@huawei.com> Message-ID: <59510F1B.60304@huawei.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2017/6/26 21:29, Leizhen (ThunderTown) wrote: > > > On 2017/6/21 17:08, Will Deacon wrote: >> On Wed, Jun 21, 2017 at 09:28:23AM +0800, Leizhen (ThunderTown) wrote: >>> On 2017/6/20 19:35, Robin Murphy wrote: >>>> On 20/06/17 12:04, Zhen Lei wrote: >>>>> This function is protected by spinlock, and the latter will do memory >>>>> barrier implicitly. So that we can safely use writel_relaxed. In fact, the >>>>> dmb operation will lengthen the time protected by lock, which indirectly >>>>> increase the locking confliction in the stress scene. >>>> >>>> If you remove the DSB between writing the commands (to Normal memory) >>>> and writing the pointer (to Device memory), how can you guarantee that >>>> the complete command is visible to the SMMU and it isn't going to try to >>>> consume stale memory contents? The spinlock is irrelevant since it's >>>> taken *before* the command is written. >>> OK, I see, thanks. Let's me see if there are any other methods. And I think >>> that this may should be done well by hardware. >> >> FWIW, I did use the _relaxed variants wherever I could when I wrote the >> driver. There might, of course, be bugs, but it's not like the normal case >> for drivers where the author didn't consider the _relaxed accessors >> initially. > A good news. I got a new idea and I will post v2 later. [PATCH 0/5] arm-smmu: performance optimization [PATCH 1/5] iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock confliction I just sent. > >> >> Will >> >> . >> > -- Thanks! BestRegards From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752288AbdFZNnd (ORCPT ); Mon, 26 Jun 2017 09:43:33 -0400 Received: from szxga03-in.huawei.com ([45.249.212.189]:8386 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751116AbdFZNnE (ORCPT ); Mon, 26 Jun 2017 09:43:04 -0400 Subject: Re: [PATCH 1/1] iommu/arm-smmu-v3: replace writel with writel_relaxed in queue_inc_prod To: Will Deacon References: <1497956694-11784-1-git-send-email-thunder.leizhen@huawei.com> <5949CBB7.1030908@huawei.com> <20170621090803.GB3768@arm.com> <59510C20.6000300@huawei.com> CC: Robin Murphy , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel , Zefan Li , Xinwei Hu , Tianhong Ding , Hanjun Guo From: "Leizhen (ThunderTown)" Message-ID: <59510F1B.60304@huawei.com> Date: Mon, 26 Jun 2017 21:41:47 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <59510C20.6000300@huawei.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.59510F25.027D,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: abeea4b31ce8ab86a9ea4ac755ea435f Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2017/6/26 21:29, Leizhen (ThunderTown) wrote: > > > On 2017/6/21 17:08, Will Deacon wrote: >> On Wed, Jun 21, 2017 at 09:28:23AM +0800, Leizhen (ThunderTown) wrote: >>> On 2017/6/20 19:35, Robin Murphy wrote: >>>> On 20/06/17 12:04, Zhen Lei wrote: >>>>> This function is protected by spinlock, and the latter will do memory >>>>> barrier implicitly. So that we can safely use writel_relaxed. In fact, the >>>>> dmb operation will lengthen the time protected by lock, which indirectly >>>>> increase the locking confliction in the stress scene. >>>> >>>> If you remove the DSB between writing the commands (to Normal memory) >>>> and writing the pointer (to Device memory), how can you guarantee that >>>> the complete command is visible to the SMMU and it isn't going to try to >>>> consume stale memory contents? The spinlock is irrelevant since it's >>>> taken *before* the command is written. >>> OK, I see, thanks. Let's me see if there are any other methods. And I think >>> that this may should be done well by hardware. >> >> FWIW, I did use the _relaxed variants wherever I could when I wrote the >> driver. There might, of course, be bugs, but it's not like the normal case >> for drivers where the author didn't consider the _relaxed accessors >> initially. > A good news. I got a new idea and I will post v2 later. [PATCH 0/5] arm-smmu: performance optimization [PATCH 1/5] iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock confliction I just sent. > >> >> Will >> >> . >> > -- Thanks! BestRegards