From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark yao Subject: Re: [PATCH v2 1/5] drm/rockchip: vop: get rid of register init table Date: Mon, 17 Jul 2017 10:10:21 +0800 Message-ID: <596C1C8D.6030100@rock-chips.com> References: <1499824991-7391-1-git-send-email-mark.yao@rock-chips.com> <1499825008-7451-1-git-send-email-mark.yao@rock-chips.com> <20170712164758.ojzsfjq4vrf2cj27@art_vandelay> <5966CDF9.3060509@rock-chips.com> <20170713202927.7mb2w2tudin3fizx@art_vandelay> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170713202927.7mb2w2tudin3fizx@art_vandelay> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Sean Paul Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org T24gMjAxN+W5tDA35pyIMTTml6UgMDQ6MjksIFNlYW4gUGF1bCB3cm90ZToKPiBPbiBUaHUsIEp1 bCAxMywgMjAxNyBhdCAwOTozMzo0NUFNICswODAwLCBNYXJrIHlhbyB3cm90ZToKPj4gT24gMjAx N+W5tDA35pyIMTPml6UgMDA6NDcsIFNlYW4gUGF1bCB3cm90ZToKPj4+IE9uIFdlZCwgSnVsIDEy LCAyMDE3IGF0IDEwOjAzOjI3QU0gKzA4MDAsIE1hcmsgWWFvIHdyb3RlOgo+Pj4+IFJlZ2lzdGVy IGluaXQgdGFibGUgdXNlIHVuLWRvY3VtZW50IGRlZmluZSwgaXQgaXMgdW5yZWFkYWJsZSwKPj4+ PiBBbmQgc29tZXRpbWVzIHdlIG9ubHkgd2FudCB0byB1cGRhdGUgdGlueSBiaXRzLCBpbml0IHRh YmxlCj4+Pj4gbWV0aG9kIGlzIG5vdCBmcmllbmRseSwgaXQncyBkaWZmY3VsdCB0byByZXVzZSBm b3IgZGlmZmVyZW5jZQo+Pj4+IGNoaXBzLgo+Pj4gV2hpbGUgSSdtIGhhcHB5IHRvIHNlZSB0aGUg aW5pdF90YWJsZSByZW1vdmVkLCBpdCBzZWVtcyBsaWtlIHRoZSBuZXcgY29kZSBpcyBub3QKPj4+ IGVxdWl2YWxlbnQgdG8gdGhlIG9sZCAoaWU6IHNvbWUgcmVnaXN0ZXIgd3JpdGVzIGhhdmUgYmVl biBkcm9wcGVkKS4gSG93IGRpZCB5b3UKPj4+IGVuc3VyZSB0aGF0IHlvdSdyZSBub3QgYnJlYWtp bmcgZXhpc3RpbmcgYm9hcmRzIHRoYXQgZGVwZW5kIG9uIHRoZSBkZWxldGVkIHJlZ2lzdGVyCj4+ PiBpbml0aWFsaXphdGlvbj8KPj4+Cj4+PiBTZWFuCj4+IEFsbCB0aGUgZXhpc3RpbmcgYm9hcmRz IHdvcmtzIGZpbmUgb24gbXkgaW50ZXJuYWwga2VybmVsIGJvYXJkIHdpdGggdGhlIGluaXRfdGFi bGUgcmVtb3ZlZCwKPj4gV2UgaGFkIHRlc3RlZCBhbGwgdGhlIGV4aXN0aW5nIGJvYXJkcywgc28g aXQncyBubyBwcm9ibGVtIHRvIHJlbW92ZWQgaW5pdF90YWJsZQo+Pgo+IFRoYXQgYmVncyB0aGUg cXVlc3Rpb24uLi4gd2h5IHdhcyBpdCBpbnRyb2R1Y2VkIGlmIGl0J3Mgbm90IG5lY2Vzc2FyeT8K SGkgU2VhbgoKU29tZSByZWdpc3RlcnMgbmVlZCB0byBiZSBpbml0aWFsaXplZCB3aGVuIHZvcCBw b3dlciBvbiwgZ2xvYmFsX2NvbmZpZ19kb25lLCBibGFuaywgd2luIGdhdGUsIGV0Yy4KUHJldmlv dXNseSBpbml0X3RhYmxlIHdhcyBpbnRyb2R1Y2VkIHRvIGhhbmRsZSB0aGUgaW5pdGlhbGl6YXRp b24gb2YgdGhlc2UgcmVnaXN0ZXJzLgoKU28sIHdoZW4gd2UgcmVtb3ZlIHRoZSBpbml0X3RhYmxl IG1lY2hhbmlzbSwgd2UgbmVlZCB0byByZS1qb2luIHRoZSBpbml0aWFsaXphdGlvbiBvZiB0aGVz ZSByZWdpc3RlcnMsCnRoaXMgam9iIGlzIGFscmVhZHkgZG9uZSBpbiB0aGlzIHBhdGNoLgoKSSB0 aGluayB0aGUgdGl0bGUgImdldCByaWQgb2YiIGNhdXNlZCBzb21lIGRvdWJ0cywgaXQncyBub3Qg anVzdCByZW1vdmUgaW5pdF90YWJsZSBtZWNoYW5pc20sCnRvIGJlIGV4YWN0LCBkaXJlY3Qgc2V0 dGluZyBuZWVkZWQgcmVnaXN0ZXIgaW5zdGVhZCBvZiBoYW5kbGluZyB3aXRoIGluaXRfdGFibGUu CgpJIHdpbGwgbWFrZSBpdCBjbGVhbmVyIG5leHQgdmVyc2lvbi4KClRoYW5rcy4KCj4KPiBTZWFu Cj4KPj4+PiBTaWduZWQtb2ZmLWJ5OiBNYXJrIFlhbyA8bWFyay55YW9Acm9jay1jaGlwcy5jb20+ Cj4+Pj4gLS0tCj4+Pj4gICAgZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV92 b3AuYyB8ICA2ICsrLS0KPj4+PiAgICBkcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBf ZHJtX3ZvcC5oIHwgMTAgKystLS0tLQo+Pj4+ICAgIGRyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9y b2NrY2hpcF92b3BfcmVnLmMgfCA0MyArKystLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQo+Pj4+ ICAgIDMgZmlsZXMgY2hhbmdlZCwgMTAgaW5zZXJ0aW9ucygrKSwgNDkgZGVsZXRpb25zKC0pCj4+ Pj4KPj4+PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2Ry bV92b3AuYyBiL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fdm9wLmMKPj4+ PiBpbmRleCA0NTU4OWQ2Li43YTVmODA5IDEwMDY0NAo+Pj4+IC0tLSBhL2RyaXZlcnMvZ3B1L2Ry bS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fdm9wLmMKPj4+PiArKysgYi9kcml2ZXJzL2dwdS9kcm0v cm9ja2NoaXAvcm9ja2NoaXBfZHJtX3ZvcC5jCj4+Pj4gQEAgLTEzOTMsNyArMTM5Myw2IEBAIHN0 YXRpYyB2b2lkIHZvcF9kZXN0cm95X2NydGMoc3RydWN0IHZvcCAqdm9wKQo+Pj4+ICAgIHN0YXRp YyBpbnQgdm9wX2luaXRpYWwoc3RydWN0IHZvcCAqdm9wKQo+Pj4+ICAgIHsKPj4+PiAgICAJY29u c3Qgc3RydWN0IHZvcF9kYXRhICp2b3BfZGF0YSA9IHZvcC0+ZGF0YTsKPj4+PiAtCWNvbnN0IHN0 cnVjdCB2b3BfcmVnX2RhdGEgKmluaXRfdGFibGUgPSB2b3BfZGF0YS0+aW5pdF90YWJsZTsKPj4+ PiAgICAJc3RydWN0IHJlc2V0X2NvbnRyb2wgKmFoYl9yc3Q7Cj4+Pj4gICAgCWludCBpLCByZXQ7 Cj4+Pj4gQEAgLTE0NTMsMTMgKzE0NTIsMTQgQEAgc3RhdGljIGludCB2b3BfaW5pdGlhbChzdHJ1 Y3Qgdm9wICp2b3ApCj4+Pj4gICAgCW1lbWNweSh2b3AtPnJlZ3NiYWssIHZvcC0+cmVncywgdm9w LT5sZW4pOwo+Pj4+IC0JZm9yIChpID0gMDsgaSA8IHZvcF9kYXRhLT50YWJsZV9zaXplOyBpKysp Cj4+Pj4gLQkJdm9wX3dyaXRlbCh2b3AsIGluaXRfdGFibGVbaV0ub2Zmc2V0LCBpbml0X3RhYmxl W2ldLnZhbHVlKTsKPj4+PiArCVZPUF9DVFJMX1NFVCh2b3AsIGdsb2JhbF9yZWdkb25lX2VuLCAx KTsKPj4+PiArCVZPUF9DVFJMX1NFVCh2b3AsIGRzcF9ibGFuaywgMCk7Cj4+Pj4gICAgCWZvciAo aSA9IDA7IGkgPCB2b3BfZGF0YS0+d2luX3NpemU7IGkrKykgewo+Pj4+ICAgIAkJY29uc3Qgc3Ry dWN0IHZvcF93aW5fZGF0YSAqd2luID0gJnZvcF9kYXRhLT53aW5baV07Cj4+Pj4gICAgCQlWT1Bf V0lOX1NFVCh2b3AsIHdpbiwgZW5hYmxlLCAwKTsKPj4+PiArCQlWT1BfV0lOX1NFVCh2b3AsIHdp biwgZ2F0ZSwgMSk7Cj4+Pj4gICAgCX0KPj4+PiAgICAJdm9wX2NmZ19kb25lKHZvcCk7Cj4+Pj4g ZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fdm9wLmgg Yi9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBfZHJtX3ZvcC5oCj4+Pj4gaW5kZXgg OTk3OWZkMC4uMDg0ZDNiMiAxMDA2NDQKPj4+PiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vcm9ja2No aXAvcm9ja2NoaXBfZHJtX3ZvcC5oCj4+Pj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlw L3JvY2tjaGlwX2RybV92b3AuaAo+Pj4+IEBAIC0yNCwxMSArMjQsNiBAQCBlbnVtIHZvcF9kYXRh X2Zvcm1hdCB7Cj4+Pj4gICAgCVZPUF9GTVRfWVVWNDQ0U1AsCj4+Pj4gICAgfTsKPj4+PiAtc3Ry dWN0IHZvcF9yZWdfZGF0YSB7Cj4+Pj4gLQl1aW50MzJfdCBvZmZzZXQ7Cj4+Pj4gLQl1aW50MzJf dCB2YWx1ZTsKPj4+PiAtfTsKPj4+PiAtCj4+Pj4gICAgc3RydWN0IHZvcF9yZWcgewo+Pj4+ICAg IAl1aW50MzJfdCBvZmZzZXQ7Cj4+Pj4gICAgCXVpbnQzMl90IHNoaWZ0Owo+Pj4+IEBAIC00Niw2 ICs0MSw3IEBAIHN0cnVjdCB2b3BfY3RybCB7Cj4+Pj4gICAgCXN0cnVjdCB2b3BfcmVnIGhkbWlf ZW47Cj4+Pj4gICAgCXN0cnVjdCB2b3BfcmVnIG1pcGlfZW47Cj4+Pj4gICAgCXN0cnVjdCB2b3Bf cmVnIGRwX2VuOwo+Pj4+ICsJc3RydWN0IHZvcF9yZWcgZHNwX2JsYW5rOwo+Pj4+ICAgIAlzdHJ1 Y3Qgdm9wX3JlZyBvdXRfbW9kZTsKPj4+PiAgICAJc3RydWN0IHZvcF9yZWcgZGl0aGVyX2Rvd247 Cj4+Pj4gICAgCXN0cnVjdCB2b3BfcmVnIGRpdGhlcl91cDsKPj4+PiBAQCAtNjUsNiArNjEsNyBA QCBzdHJ1Y3Qgdm9wX2N0cmwgewo+Pj4+ICAgIAlzdHJ1Y3Qgdm9wX3JlZyBsaW5lX2ZsYWdfbnVt WzJdOwo+Pj4+ICsJc3RydWN0IHZvcF9yZWcgZ2xvYmFsX3JlZ2RvbmVfZW47Cj4+Pj4gICAgCXN0 cnVjdCB2b3BfcmVnIGNmZ19kb25lOwo+Pj4+ICAgIH07Cj4+Pj4gQEAgLTExNSw2ICsxMTIsNyBA QCBzdHJ1Y3Qgdm9wX3dpbl9waHkgewo+Pj4+ICAgIAl1aW50MzJfdCBuZm9ybWF0czsKPj4+PiAg ICAJc3RydWN0IHZvcF9yZWcgZW5hYmxlOwo+Pj4+ICsJc3RydWN0IHZvcF9yZWcgZ2F0ZTsKPj4+ PiAgICAJc3RydWN0IHZvcF9yZWcgZm9ybWF0Owo+Pj4+ICAgIAlzdHJ1Y3Qgdm9wX3JlZyByYl9z d2FwOwo+Pj4+ICAgIAlzdHJ1Y3Qgdm9wX3JlZyBhY3RfaW5mbzsKPj4+PiBAQCAtMTM2LDggKzEz NCw2IEBAIHN0cnVjdCB2b3Bfd2luX2RhdGEgewo+Pj4+ICAgIH07Cj4+Pj4gICAgc3RydWN0IHZv cF9kYXRhIHsKPj4+PiAtCWNvbnN0IHN0cnVjdCB2b3BfcmVnX2RhdGEgKmluaXRfdGFibGU7Cj4+ Pj4gLQl1bnNpZ25lZCBpbnQgdGFibGVfc2l6ZTsKPj4+PiAgICAJY29uc3Qgc3RydWN0IHZvcF9j dHJsICpjdHJsOwo+Pj4+ICAgIAljb25zdCBzdHJ1Y3Qgdm9wX2ludHIgKmludHI7Cj4+Pj4gICAg CWNvbnN0IHN0cnVjdCB2b3Bfd2luX2RhdGEgKndpbjsKPj4+PiBkaWZmIC0tZ2l0IGEvZHJpdmVy cy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX3ZvcF9yZWcuYyBiL2RyaXZlcnMvZ3B1L2RybS9y b2NrY2hpcC9yb2NrY2hpcF92b3BfcmVnLmMKPj4+PiBpbmRleCBiYWZkNjk4Li4wMGU5ZDc5IDEw MDY0NAo+Pj4+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9yb2NrY2hpcF92b3BfcmVn LmMKPj4+PiArKysgYi9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBfdm9wX3JlZy5j Cj4+Pj4gQEAgLTEyNywxMyArMTI3LDcgQEAKPj4+PiAgICAJLmNmZ19kb25lID0gVk9QX1JFRyhS SzMwMzZfUkVHX0NGR19ET05FLCAweDEsIDApLAo+Pj4+ICAgIH07Cj4+Pj4gLXN0YXRpYyBjb25z dCBzdHJ1Y3Qgdm9wX3JlZ19kYXRhIHJrMzAzNl92b3BfaW5pdF9yZWdfdGFibGVbXSA9IHsKPj4+ PiAtCXtSSzMwMzZfRFNQX0NUUkwxLCAweDAwMDAwMDAwfSwKPj4+PiAtfTsKPj4+PiAtCj4+Pj4g ICAgc3RhdGljIGNvbnN0IHN0cnVjdCB2b3BfZGF0YSByazMwMzZfdm9wID0gewo+Pj4+IC0JLmlu aXRfdGFibGUgPSByazMwMzZfdm9wX2luaXRfcmVnX3RhYmxlLAo+Pj4+IC0JLnRhYmxlX3NpemUg PSBBUlJBWV9TSVpFKHJrMzAzNl92b3BfaW5pdF9yZWdfdGFibGUpLAo+Pj4+ICAgIAkuY3RybCA9 ICZyazMwMzZfY3RybF9kYXRhLAo+Pj4+ICAgIAkuaW50ciA9ICZyazMwMzZfaW50ciwKPj4+PiAg ICAJLndpbiA9IHJrMzAzNl92b3Bfd2luX2RhdGEsCj4+Pj4gQEAgLTE5Myw3ICsxODcsOCBAQAo+ Pj4+ICAgIHN0YXRpYyBjb25zdCBzdHJ1Y3Qgdm9wX3dpbl9waHkgcmszMjg4X3dpbjIzX2RhdGEg PSB7Cj4+Pj4gICAgCS5kYXRhX2Zvcm1hdHMgPSBmb3JtYXRzX3dpbl9saXRlLAo+Pj4+ICAgIAku bmZvcm1hdHMgPSBBUlJBWV9TSVpFKGZvcm1hdHNfd2luX2xpdGUpLAo+Pj4+IC0JLmVuYWJsZSA9 IFZPUF9SRUcoUkszMjg4X1dJTjJfQ1RSTDAsIDB4MSwgMCksCj4+Pj4gKwkuZW5hYmxlID0gVk9Q X1JFRyhSSzMyODhfV0lOMl9DVFJMMCwgMHgxLCA0KSwKPj4+PiArCS5nYXRlID0gVk9QX1JFRyhS SzMyODhfV0lOMl9DVFJMMCwgMHgxLCAwKSwKPj4+PiAgICAJLmZvcm1hdCA9IFZPUF9SRUcoUksz Mjg4X1dJTjJfQ1RSTDAsIDB4NywgMSksCj4+Pj4gICAgCS5yYl9zd2FwID0gVk9QX1JFRyhSSzMy ODhfV0lOMl9DVFJMMCwgMHgxLCAxMiksCj4+Pj4gICAgCS5kc3BfaW5mbyA9IFZPUF9SRUcoUksz Mjg4X1dJTjJfRFNQX0lORk8wLCAweDBmZmYwZmZmLCAwKSwKPj4+PiBAQCAtMjE1LDYgKzIxMCw3 IEBACj4+Pj4gICAgCS5kaXRoZXJfZG93biA9IFZPUF9SRUcoUkszMjg4X0RTUF9DVFJMMSwgMHhm LCAxKSwKPj4+PiAgICAJLmRpdGhlcl91cCA9IFZPUF9SRUcoUkszMjg4X0RTUF9DVFJMMSwgMHgx LCA2KSwKPj4+PiAgICAJLmRhdGFfYmxhbmsgPSBWT1BfUkVHKFJLMzI4OF9EU1BfQ1RSTDAsIDB4 MSwgMTkpLAo+Pj4+ICsJLmRzcF9ibGFuayA9IFZPUF9SRUcoUkszMjg4X0RTUF9DVFJMMCwgMHgz LCAxOCksCj4+Pj4gICAgCS5vdXRfbW9kZSA9IFZPUF9SRUcoUkszMjg4X0RTUF9DVFJMMCwgMHhm LCAwKSwKPj4+PiAgICAJLnBpbl9wb2wgPSBWT1BfUkVHKFJLMzI4OF9EU1BfQ1RSTDAsIDB4Ziwg NCksCj4+Pj4gICAgCS5odG90YWxfcHcgPSBWT1BfUkVHKFJLMzI4OF9EU1BfSFRPVEFMX0hTX0VO RCwgMHgxZmZmMWZmZiwgMCksCj4+Pj4gQEAgLTIyNCwyMiArMjIwLDEwIEBACj4+Pj4gICAgCS5o cG9zdF9zdF9lbmQgPSBWT1BfUkVHKFJLMzI4OF9QT1NUX0RTUF9IQUNUX0lORk8sIDB4MWZmZjFm ZmYsIDApLAo+Pj4+ICAgIAkudnBvc3Rfc3RfZW5kID0gVk9QX1JFRyhSSzMyODhfUE9TVF9EU1Bf VkFDVF9JTkZPLCAweDFmZmYxZmZmLCAwKSwKPj4+PiAgICAJLmxpbmVfZmxhZ19udW1bMF0gPSBW T1BfUkVHKFJLMzI4OF9JTlRSX0NUUkwwLCAweDFmZmYsIDEyKSwKPj4+PiArCS5nbG9iYWxfcmVn ZG9uZV9lbiA9IFZPUF9SRUcoUkszMjg4X1NZU19DVFJMLCAweDEsIDExKSwKPj4+PiAgICAJLmNm Z19kb25lID0gVk9QX1JFRyhSSzMyODhfUkVHX0NGR19ET05FLCAweDEsIDApLAo+Pj4+ICAgIH07 Cj4+Pj4gLXN0YXRpYyBjb25zdCBzdHJ1Y3Qgdm9wX3JlZ19kYXRhIHJrMzI4OF9pbml0X3JlZ190 YWJsZVtdID0gewo+Pj4+IC0Je1JLMzI4OF9TWVNfQ1RSTCwgMHgwMGMwMDAwMH0sCj4+Pj4gLQl7 UkszMjg4X0RTUF9DVFJMMCwgMHgwMDAwMDAwMH0sCj4+Pj4gLQl7UkszMjg4X1dJTjBfQ1RSTDAs IDB4MDAwMDAwODB9LAo+Pj4+IC0Je1JLMzI4OF9XSU4xX0NUUkwwLCAweDAwMDAwMDgwfSwKPj4+ PiAtCS8qIFRPRE86IFdpbjIvMyBzdXBwb3J0IG11bHRpcGxlIGFyZWEgZnVuY3Rpb24sIGJ1dCB3 ZSBoYXZlbid0IGZvdW5kCj4+Pj4gLQkgKiBhIHN1aXRhYmxlIHdheSB0byB1c2UgaXQgeWV0LCBz byBsZXQncyBqdXN0IHVzZSB0aGVtIGFzIG90aGVyIHdpbmRvd3MKPj4+PiAtCSAqIHdpdGggb25s eSBhcmVhIDAgZW5hYmxlZC4KPj4+PiAtCSAqLwo+Pj4+IC0Je1JLMzI4OF9XSU4yX0NUUkwwLCAw eDAwMDAwMDEwfSwKPj4+PiAtCXtSSzMyODhfV0lOM19DVFJMMCwgMHgwMDAwMDAxMH0sCj4+Pj4g LX07Cj4+Pj4gLQo+Pj4+ICAgIC8qCj4+Pj4gICAgICogTm90ZTogcmszMjg4IGhhcyBhIGRlZGlj YXRlZCAnY3Vyc29yJyB3aW5kb3csIGhvd2V2ZXIsIHRoYXQgd2luZG93IHJlcXVpcmVzCj4+Pj4g ICAgICogc3BlY2lhbCBzdXBwb3J0IHRvIGdldCBhbHBoYSBibGVuZGluZyB3b3JraW5nLiAgRm9y IG5vdywganVzdCB1c2Ugb3ZlcmxheQo+Pj4+IEBAIC0yNzMsOCArMjU3LDYgQEAKPj4+PiAgICB9 Owo+Pj4+ICAgIHN0YXRpYyBjb25zdCBzdHJ1Y3Qgdm9wX2RhdGEgcmszMjg4X3ZvcCA9IHsKPj4+ PiAtCS5pbml0X3RhYmxlID0gcmszMjg4X2luaXRfcmVnX3RhYmxlLAo+Pj4+IC0JLnRhYmxlX3Np emUgPSBBUlJBWV9TSVpFKHJrMzI4OF9pbml0X3JlZ190YWJsZSksCj4+Pj4gICAgCS5mZWF0dXJl ID0gVk9QX0ZFQVRVUkVfT1VUUFVUX1JHQjEwLAo+Pj4+ICAgIAkuaW50ciA9ICZyazMyODhfdm9w X2ludHIsCj4+Pj4gICAgCS5jdHJsID0gJnJrMzI4OF9jdHJsX2RhdGEsCj4+Pj4gQEAgLTMyOCwy MiArMzEwLDcgQEAKPj4+PiAgICAJLmNsZWFyID0gVk9QX1JFR19NQVNLKFJLMzM5OV9JTlRSX0NM RUFSMCwgMHhmZmZmLCAwKSwKPj4+PiAgICB9Owo+Pj4+IC1zdGF0aWMgY29uc3Qgc3RydWN0IHZv cF9yZWdfZGF0YSByazMzOTlfaW5pdF9yZWdfdGFibGVbXSA9IHsKPj4+PiAtCXtSSzMzOTlfU1lT X0NUUkwsIDB4MjAwMGY4MDB9LAo+Pj4+IC0Je1JLMzM5OV9EU1BfQ1RSTDAsIDB4MDAwMDAwMDB9 LAo+Pj4+IC0Je1JLMzM5OV9XSU4wX0NUUkwwLCAweDAwMDAwMDgwfSwKPj4+PiAtCXtSSzMzOTlf V0lOMV9DVFJMMCwgMHgwMDAwMDA4MH0sCj4+Pj4gLQkvKiBUT0RPOiBXaW4yLzMgc3VwcG9ydCBt dWx0aXBsZSBhcmVhIGZ1bmN0aW9uLCBidXQgd2UgaGF2ZW4ndCBmb3VuZAo+Pj4+IC0JICogYSBz dWl0YWJsZSB3YXkgdG8gdXNlIGl0IHlldCwgc28gbGV0J3MganVzdCB1c2UgdGhlbSBhcyBvdGhl ciB3aW5kb3dzCj4+Pj4gLQkgKiB3aXRoIG9ubHkgYXJlYSAwIGVuYWJsZWQuCj4+Pj4gLQkgKi8K Pj4+PiAtCXtSSzMzOTlfV0lOMl9DVFJMMCwgMHgwMDAwMDAxMH0sCj4+Pj4gLQl7UkszMzk5X1dJ TjNfQ1RSTDAsIDB4MDAwMDAwMTB9LAo+Pj4+IC19Owo+Pj4+IC0KPj4+PiAgICBzdGF0aWMgY29u c3Qgc3RydWN0IHZvcF9kYXRhIHJrMzM5OV92b3BfYmlnID0gewo+Pj4+IC0JLmluaXRfdGFibGUg PSByazMzOTlfaW5pdF9yZWdfdGFibGUsCj4+Pj4gLQkudGFibGVfc2l6ZSA9IEFSUkFZX1NJWkUo cmszMzk5X2luaXRfcmVnX3RhYmxlKSwKPj4+PiAgICAJLmZlYXR1cmUgPSBWT1BfRkVBVFVSRV9P VVRQVVRfUkdCMTAsCj4+Pj4gICAgCS5pbnRyID0gJnJrMzM5OV92b3BfaW50ciwKPj4+PiAgICAJ LmN0cmwgPSAmcmszMzk5X2N0cmxfZGF0YSwKPj4+PiBAQCAtMzYyLDggKzMyOSw2IEBACj4+Pj4g ICAgfTsKPj4+PiAgICBzdGF0aWMgY29uc3Qgc3RydWN0IHZvcF9kYXRhIHJrMzM5OV92b3BfbGl0 ID0gewo+Pj4+IC0JLmluaXRfdGFibGUgPSByazMzOTlfaW5pdF9yZWdfdGFibGUsCj4+Pj4gLQku dGFibGVfc2l6ZSA9IEFSUkFZX1NJWkUocmszMzk5X2luaXRfcmVnX3RhYmxlKSwKPj4+PiAgICAJ LmludHIgPSAmcmszMzk5X3ZvcF9pbnRyLAo+Pj4+ICAgIAkuY3RybCA9ICZyazMzOTlfY3RybF9k YXRhLAo+Pj4+ICAgIAkvKgo+Pj4+IC0tIAo+Pj4+IDEuOS4xCj4+Pj4KPj4+Pgo+Pj4+IF9fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCj4+Pj4gZHJpLWRldmVs IG1haWxpbmcgbGlzdAo+Pj4+IGRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKPj4+PiBo dHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo+ Pgo+PiAtLSAKPj4g77ytYXJrIFlhbwo+Pgo+PgoKCi0tIArvvK1hcmsgWWFvCgoKX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcg bGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRl c2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: mark.yao@rock-chips.com (Mark yao) Date: Mon, 17 Jul 2017 10:10:21 +0800 Subject: [PATCH v2 1/5] drm/rockchip: vop: get rid of register init table In-Reply-To: <20170713202927.7mb2w2tudin3fizx@art_vandelay> References: <1499824991-7391-1-git-send-email-mark.yao@rock-chips.com> <1499825008-7451-1-git-send-email-mark.yao@rock-chips.com> <20170712164758.ojzsfjq4vrf2cj27@art_vandelay> <5966CDF9.3060509@rock-chips.com> <20170713202927.7mb2w2tudin3fizx@art_vandelay> Message-ID: <596C1C8D.6030100@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2017?07?14? 04:29, Sean Paul wrote: > On Thu, Jul 13, 2017 at 09:33:45AM +0800, Mark yao wrote: >> On 2017?07?13? 00:47, Sean Paul wrote: >>> On Wed, Jul 12, 2017 at 10:03:27AM +0800, Mark Yao wrote: >>>> Register init table use un-document define, it is unreadable, >>>> And sometimes we only want to update tiny bits, init table >>>> method is not friendly, it's diffcult to reuse for difference >>>> chips. >>> While I'm happy to see the init_table removed, it seems like the new code is not >>> equivalent to the old (ie: some register writes have been dropped). How did you >>> ensure that you're not breaking existing boards that depend on the deleted register >>> initialization? >>> >>> Sean >> All the existing boards works fine on my internal kernel board with the init_table removed, >> We had tested all the existing boards, so it's no problem to removed init_table >> > That begs the question... why was it introduced if it's not necessary? Hi Sean Some registers need to be initialized when vop power on, global_config_done, blank, win gate, etc. Previously init_table was introduced to handle the initialization of these registers. So, when we remove the init_table mechanism, we need to re-join the initialization of these registers, this job is already done in this patch. I think the title "get rid of" caused some doubts, it's not just remove init_table mechanism, to be exact, direct setting needed register instead of handling with init_table. I will make it cleaner next version. Thanks. > > Sean > >>>> Signed-off-by: Mark Yao >>>> --- >>>> drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 6 ++-- >>>> drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 10 ++----- >>>> drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 43 +++-------------------------- >>>> 3 files changed, 10 insertions(+), 49 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >>>> index 45589d6..7a5f809 100644 >>>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >>>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >>>> @@ -1393,7 +1393,6 @@ static void vop_destroy_crtc(struct vop *vop) >>>> static int vop_initial(struct vop *vop) >>>> { >>>> const struct vop_data *vop_data = vop->data; >>>> - const struct vop_reg_data *init_table = vop_data->init_table; >>>> struct reset_control *ahb_rst; >>>> int i, ret; >>>> @@ -1453,13 +1452,14 @@ static int vop_initial(struct vop *vop) >>>> memcpy(vop->regsbak, vop->regs, vop->len); >>>> - for (i = 0; i < vop_data->table_size; i++) >>>> - vop_writel(vop, init_table[i].offset, init_table[i].value); >>>> + VOP_CTRL_SET(vop, global_regdone_en, 1); >>>> + VOP_CTRL_SET(vop, dsp_blank, 0); >>>> for (i = 0; i < vop_data->win_size; i++) { >>>> const struct vop_win_data *win = &vop_data->win[i]; >>>> VOP_WIN_SET(vop, win, enable, 0); >>>> + VOP_WIN_SET(vop, win, gate, 1); >>>> } >>>> vop_cfg_done(vop); >>>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h >>>> index 9979fd0..084d3b2 100644 >>>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h >>>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h >>>> @@ -24,11 +24,6 @@ enum vop_data_format { >>>> VOP_FMT_YUV444SP, >>>> }; >>>> -struct vop_reg_data { >>>> - uint32_t offset; >>>> - uint32_t value; >>>> -}; >>>> - >>>> struct vop_reg { >>>> uint32_t offset; >>>> uint32_t shift; >>>> @@ -46,6 +41,7 @@ struct vop_ctrl { >>>> struct vop_reg hdmi_en; >>>> struct vop_reg mipi_en; >>>> struct vop_reg dp_en; >>>> + struct vop_reg dsp_blank; >>>> struct vop_reg out_mode; >>>> struct vop_reg dither_down; >>>> struct vop_reg dither_up; >>>> @@ -65,6 +61,7 @@ struct vop_ctrl { >>>> struct vop_reg line_flag_num[2]; >>>> + struct vop_reg global_regdone_en; >>>> struct vop_reg cfg_done; >>>> }; >>>> @@ -115,6 +112,7 @@ struct vop_win_phy { >>>> uint32_t nformats; >>>> struct vop_reg enable; >>>> + struct vop_reg gate; >>>> struct vop_reg format; >>>> struct vop_reg rb_swap; >>>> struct vop_reg act_info; >>>> @@ -136,8 +134,6 @@ struct vop_win_data { >>>> }; >>>> struct vop_data { >>>> - const struct vop_reg_data *init_table; >>>> - unsigned int table_size; >>>> const struct vop_ctrl *ctrl; >>>> const struct vop_intr *intr; >>>> const struct vop_win_data *win; >>>> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c >>>> index bafd698..00e9d79 100644 >>>> --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c >>>> +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c >>>> @@ -127,13 +127,7 @@ >>>> .cfg_done = VOP_REG(RK3036_REG_CFG_DONE, 0x1, 0), >>>> }; >>>> -static const struct vop_reg_data rk3036_vop_init_reg_table[] = { >>>> - {RK3036_DSP_CTRL1, 0x00000000}, >>>> -}; >>>> - >>>> static const struct vop_data rk3036_vop = { >>>> - .init_table = rk3036_vop_init_reg_table, >>>> - .table_size = ARRAY_SIZE(rk3036_vop_init_reg_table), >>>> .ctrl = &rk3036_ctrl_data, >>>> .intr = &rk3036_intr, >>>> .win = rk3036_vop_win_data, >>>> @@ -193,7 +187,8 @@ >>>> static const struct vop_win_phy rk3288_win23_data = { >>>> .data_formats = formats_win_lite, >>>> .nformats = ARRAY_SIZE(formats_win_lite), >>>> - .enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0), >>>> + .enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 4), >>>> + .gate = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0), >>>> .format = VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1), >>>> .rb_swap = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 12), >>>> .dsp_info = VOP_REG(RK3288_WIN2_DSP_INFO0, 0x0fff0fff, 0), >>>> @@ -215,6 +210,7 @@ >>>> .dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1), >>>> .dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6), >>>> .data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19), >>>> + .dsp_blank = VOP_REG(RK3288_DSP_CTRL0, 0x3, 18), >>>> .out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0), >>>> .pin_pol = VOP_REG(RK3288_DSP_CTRL0, 0xf, 4), >>>> .htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0), >>>> @@ -224,22 +220,10 @@ >>>> .hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0), >>>> .vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0), >>>> .line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12), >>>> + .global_regdone_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 11), >>>> .cfg_done = VOP_REG(RK3288_REG_CFG_DONE, 0x1, 0), >>>> }; >>>> -static const struct vop_reg_data rk3288_init_reg_table[] = { >>>> - {RK3288_SYS_CTRL, 0x00c00000}, >>>> - {RK3288_DSP_CTRL0, 0x00000000}, >>>> - {RK3288_WIN0_CTRL0, 0x00000080}, >>>> - {RK3288_WIN1_CTRL0, 0x00000080}, >>>> - /* TODO: Win2/3 support multiple area function, but we haven't found >>>> - * a suitable way to use it yet, so let's just use them as other windows >>>> - * with only area 0 enabled. >>>> - */ >>>> - {RK3288_WIN2_CTRL0, 0x00000010}, >>>> - {RK3288_WIN3_CTRL0, 0x00000010}, >>>> -}; >>>> - >>>> /* >>>> * Note: rk3288 has a dedicated 'cursor' window, however, that window requires >>>> * special support to get alpha blending working. For now, just use overlay >>>> @@ -273,8 +257,6 @@ >>>> }; >>>> static const struct vop_data rk3288_vop = { >>>> - .init_table = rk3288_init_reg_table, >>>> - .table_size = ARRAY_SIZE(rk3288_init_reg_table), >>>> .feature = VOP_FEATURE_OUTPUT_RGB10, >>>> .intr = &rk3288_vop_intr, >>>> .ctrl = &rk3288_ctrl_data, >>>> @@ -328,22 +310,7 @@ >>>> .clear = VOP_REG_MASK(RK3399_INTR_CLEAR0, 0xffff, 0), >>>> }; >>>> -static const struct vop_reg_data rk3399_init_reg_table[] = { >>>> - {RK3399_SYS_CTRL, 0x2000f800}, >>>> - {RK3399_DSP_CTRL0, 0x00000000}, >>>> - {RK3399_WIN0_CTRL0, 0x00000080}, >>>> - {RK3399_WIN1_CTRL0, 0x00000080}, >>>> - /* TODO: Win2/3 support multiple area function, but we haven't found >>>> - * a suitable way to use it yet, so let's just use them as other windows >>>> - * with only area 0 enabled. >>>> - */ >>>> - {RK3399_WIN2_CTRL0, 0x00000010}, >>>> - {RK3399_WIN3_CTRL0, 0x00000010}, >>>> -}; >>>> - >>>> static const struct vop_data rk3399_vop_big = { >>>> - .init_table = rk3399_init_reg_table, >>>> - .table_size = ARRAY_SIZE(rk3399_init_reg_table), >>>> .feature = VOP_FEATURE_OUTPUT_RGB10, >>>> .intr = &rk3399_vop_intr, >>>> .ctrl = &rk3399_ctrl_data, >>>> @@ -362,8 +329,6 @@ >>>> }; >>>> static const struct vop_data rk3399_vop_lit = { >>>> - .init_table = rk3399_init_reg_table, >>>> - .table_size = ARRAY_SIZE(rk3399_init_reg_table), >>>> .intr = &rk3399_vop_intr, >>>> .ctrl = &rk3399_ctrl_data, >>>> /* >>>> -- >>>> 1.9.1 >>>> >>>> >>>> _______________________________________________ >>>> dri-devel mailing list >>>> dri-devel at lists.freedesktop.org >>>> https://lists.freedesktop.org/mailman/listinfo/dri-devel >> >> -- >> ?ark Yao >> >> -- ?ark Yao From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751357AbdGQCKi (ORCPT ); Sun, 16 Jul 2017 22:10:38 -0400 Received: from lucky1.263xmail.com ([211.157.147.133]:56493 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751209AbdGQCKg (ORCPT ); Sun, 16 Jul 2017 22:10:36 -0400 X-263anti-spam: KSV:0;BIG:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ADDR-CHECKED4: 1 X-ABS-CHECKED: 0 X-SKE-CHECKED: 0 X-ANTISPAM-LEVEL: 2 X-RL-SENDER: mark.yao@rock-chips.com X-FST-TO: linux-kernel@vger.kernel.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: mark.yao@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH v2 1/5] drm/rockchip: vop: get rid of register init table To: Sean Paul References: <1499824991-7391-1-git-send-email-mark.yao@rock-chips.com> <1499825008-7451-1-git-send-email-mark.yao@rock-chips.com> <20170712164758.ojzsfjq4vrf2cj27@art_vandelay> <5966CDF9.3060509@rock-chips.com> <20170713202927.7mb2w2tudin3fizx@art_vandelay> Cc: David Airlie , Heiko Stuebner , linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org From: Mark yao Message-ID: <596C1C8D.6030100@rock-chips.com> Date: Mon, 17 Jul 2017 10:10:21 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <20170713202927.7mb2w2tudin3fizx@art_vandelay> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2017年07月14日 04:29, Sean Paul wrote: > On Thu, Jul 13, 2017 at 09:33:45AM +0800, Mark yao wrote: >> On 2017年07月13日 00:47, Sean Paul wrote: >>> On Wed, Jul 12, 2017 at 10:03:27AM +0800, Mark Yao wrote: >>>> Register init table use un-document define, it is unreadable, >>>> And sometimes we only want to update tiny bits, init table >>>> method is not friendly, it's diffcult to reuse for difference >>>> chips. >>> While I'm happy to see the init_table removed, it seems like the new code is not >>> equivalent to the old (ie: some register writes have been dropped). How did you >>> ensure that you're not breaking existing boards that depend on the deleted register >>> initialization? >>> >>> Sean >> All the existing boards works fine on my internal kernel board with the init_table removed, >> We had tested all the existing boards, so it's no problem to removed init_table >> > That begs the question... why was it introduced if it's not necessary? Hi Sean Some registers need to be initialized when vop power on, global_config_done, blank, win gate, etc. Previously init_table was introduced to handle the initialization of these registers. So, when we remove the init_table mechanism, we need to re-join the initialization of these registers, this job is already done in this patch. I think the title "get rid of" caused some doubts, it's not just remove init_table mechanism, to be exact, direct setting needed register instead of handling with init_table. I will make it cleaner next version. Thanks. > > Sean > >>>> Signed-off-by: Mark Yao >>>> --- >>>> drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 6 ++-- >>>> drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 10 ++----- >>>> drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 43 +++-------------------------- >>>> 3 files changed, 10 insertions(+), 49 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >>>> index 45589d6..7a5f809 100644 >>>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >>>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >>>> @@ -1393,7 +1393,6 @@ static void vop_destroy_crtc(struct vop *vop) >>>> static int vop_initial(struct vop *vop) >>>> { >>>> const struct vop_data *vop_data = vop->data; >>>> - const struct vop_reg_data *init_table = vop_data->init_table; >>>> struct reset_control *ahb_rst; >>>> int i, ret; >>>> @@ -1453,13 +1452,14 @@ static int vop_initial(struct vop *vop) >>>> memcpy(vop->regsbak, vop->regs, vop->len); >>>> - for (i = 0; i < vop_data->table_size; i++) >>>> - vop_writel(vop, init_table[i].offset, init_table[i].value); >>>> + VOP_CTRL_SET(vop, global_regdone_en, 1); >>>> + VOP_CTRL_SET(vop, dsp_blank, 0); >>>> for (i = 0; i < vop_data->win_size; i++) { >>>> const struct vop_win_data *win = &vop_data->win[i]; >>>> VOP_WIN_SET(vop, win, enable, 0); >>>> + VOP_WIN_SET(vop, win, gate, 1); >>>> } >>>> vop_cfg_done(vop); >>>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h >>>> index 9979fd0..084d3b2 100644 >>>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h >>>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h >>>> @@ -24,11 +24,6 @@ enum vop_data_format { >>>> VOP_FMT_YUV444SP, >>>> }; >>>> -struct vop_reg_data { >>>> - uint32_t offset; >>>> - uint32_t value; >>>> -}; >>>> - >>>> struct vop_reg { >>>> uint32_t offset; >>>> uint32_t shift; >>>> @@ -46,6 +41,7 @@ struct vop_ctrl { >>>> struct vop_reg hdmi_en; >>>> struct vop_reg mipi_en; >>>> struct vop_reg dp_en; >>>> + struct vop_reg dsp_blank; >>>> struct vop_reg out_mode; >>>> struct vop_reg dither_down; >>>> struct vop_reg dither_up; >>>> @@ -65,6 +61,7 @@ struct vop_ctrl { >>>> struct vop_reg line_flag_num[2]; >>>> + struct vop_reg global_regdone_en; >>>> struct vop_reg cfg_done; >>>> }; >>>> @@ -115,6 +112,7 @@ struct vop_win_phy { >>>> uint32_t nformats; >>>> struct vop_reg enable; >>>> + struct vop_reg gate; >>>> struct vop_reg format; >>>> struct vop_reg rb_swap; >>>> struct vop_reg act_info; >>>> @@ -136,8 +134,6 @@ struct vop_win_data { >>>> }; >>>> struct vop_data { >>>> - const struct vop_reg_data *init_table; >>>> - unsigned int table_size; >>>> const struct vop_ctrl *ctrl; >>>> const struct vop_intr *intr; >>>> const struct vop_win_data *win; >>>> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c >>>> index bafd698..00e9d79 100644 >>>> --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c >>>> +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c >>>> @@ -127,13 +127,7 @@ >>>> .cfg_done = VOP_REG(RK3036_REG_CFG_DONE, 0x1, 0), >>>> }; >>>> -static const struct vop_reg_data rk3036_vop_init_reg_table[] = { >>>> - {RK3036_DSP_CTRL1, 0x00000000}, >>>> -}; >>>> - >>>> static const struct vop_data rk3036_vop = { >>>> - .init_table = rk3036_vop_init_reg_table, >>>> - .table_size = ARRAY_SIZE(rk3036_vop_init_reg_table), >>>> .ctrl = &rk3036_ctrl_data, >>>> .intr = &rk3036_intr, >>>> .win = rk3036_vop_win_data, >>>> @@ -193,7 +187,8 @@ >>>> static const struct vop_win_phy rk3288_win23_data = { >>>> .data_formats = formats_win_lite, >>>> .nformats = ARRAY_SIZE(formats_win_lite), >>>> - .enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0), >>>> + .enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 4), >>>> + .gate = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0), >>>> .format = VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1), >>>> .rb_swap = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 12), >>>> .dsp_info = VOP_REG(RK3288_WIN2_DSP_INFO0, 0x0fff0fff, 0), >>>> @@ -215,6 +210,7 @@ >>>> .dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1), >>>> .dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6), >>>> .data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19), >>>> + .dsp_blank = VOP_REG(RK3288_DSP_CTRL0, 0x3, 18), >>>> .out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0), >>>> .pin_pol = VOP_REG(RK3288_DSP_CTRL0, 0xf, 4), >>>> .htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0), >>>> @@ -224,22 +220,10 @@ >>>> .hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0), >>>> .vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0), >>>> .line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12), >>>> + .global_regdone_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 11), >>>> .cfg_done = VOP_REG(RK3288_REG_CFG_DONE, 0x1, 0), >>>> }; >>>> -static const struct vop_reg_data rk3288_init_reg_table[] = { >>>> - {RK3288_SYS_CTRL, 0x00c00000}, >>>> - {RK3288_DSP_CTRL0, 0x00000000}, >>>> - {RK3288_WIN0_CTRL0, 0x00000080}, >>>> - {RK3288_WIN1_CTRL0, 0x00000080}, >>>> - /* TODO: Win2/3 support multiple area function, but we haven't found >>>> - * a suitable way to use it yet, so let's just use them as other windows >>>> - * with only area 0 enabled. >>>> - */ >>>> - {RK3288_WIN2_CTRL0, 0x00000010}, >>>> - {RK3288_WIN3_CTRL0, 0x00000010}, >>>> -}; >>>> - >>>> /* >>>> * Note: rk3288 has a dedicated 'cursor' window, however, that window requires >>>> * special support to get alpha blending working. For now, just use overlay >>>> @@ -273,8 +257,6 @@ >>>> }; >>>> static const struct vop_data rk3288_vop = { >>>> - .init_table = rk3288_init_reg_table, >>>> - .table_size = ARRAY_SIZE(rk3288_init_reg_table), >>>> .feature = VOP_FEATURE_OUTPUT_RGB10, >>>> .intr = &rk3288_vop_intr, >>>> .ctrl = &rk3288_ctrl_data, >>>> @@ -328,22 +310,7 @@ >>>> .clear = VOP_REG_MASK(RK3399_INTR_CLEAR0, 0xffff, 0), >>>> }; >>>> -static const struct vop_reg_data rk3399_init_reg_table[] = { >>>> - {RK3399_SYS_CTRL, 0x2000f800}, >>>> - {RK3399_DSP_CTRL0, 0x00000000}, >>>> - {RK3399_WIN0_CTRL0, 0x00000080}, >>>> - {RK3399_WIN1_CTRL0, 0x00000080}, >>>> - /* TODO: Win2/3 support multiple area function, but we haven't found >>>> - * a suitable way to use it yet, so let's just use them as other windows >>>> - * with only area 0 enabled. >>>> - */ >>>> - {RK3399_WIN2_CTRL0, 0x00000010}, >>>> - {RK3399_WIN3_CTRL0, 0x00000010}, >>>> -}; >>>> - >>>> static const struct vop_data rk3399_vop_big = { >>>> - .init_table = rk3399_init_reg_table, >>>> - .table_size = ARRAY_SIZE(rk3399_init_reg_table), >>>> .feature = VOP_FEATURE_OUTPUT_RGB10, >>>> .intr = &rk3399_vop_intr, >>>> .ctrl = &rk3399_ctrl_data, >>>> @@ -362,8 +329,6 @@ >>>> }; >>>> static const struct vop_data rk3399_vop_lit = { >>>> - .init_table = rk3399_init_reg_table, >>>> - .table_size = ARRAY_SIZE(rk3399_init_reg_table), >>>> .intr = &rk3399_vop_intr, >>>> .ctrl = &rk3399_ctrl_data, >>>> /* >>>> -- >>>> 1.9.1 >>>> >>>> >>>> _______________________________________________ >>>> dri-devel mailing list >>>> dri-devel@lists.freedesktop.org >>>> https://lists.freedesktop.org/mailman/listinfo/dri-devel >> >> -- >> Ｍark Yao >> >> -- Ｍark Yao