From mboxrd@z Thu Jan 1 00:00:00 1970 From: narmstrong@baylibre.com (Neil Armstrong) Date: Tue, 25 Jul 2017 10:00:27 +0200 Subject: [PATCH v4 5/7] clk: meson: meson8b: export the CPU soft reset lines In-Reply-To: <20170722191946.22938-6-martin.blumenstingl@googlemail.com> References: <20170722191946.22938-1-martin.blumenstingl@googlemail.com> <20170722191946.22938-6-martin.blumenstingl@googlemail.com> Message-ID: <5976FA9B.8090501@baylibre.com> To: linus-amlogic@lists.infradead.org List-Id: linus-amlogic.lists.infradead.org Le 22/07/2017 21:19, Martin Blumenstingl a ?crit : > Export the soft reset lines for the CPU cores so they can be used in the > dt-bindings (required for SMP booting the CPU cores). > > Signed-off-by: Martin Blumenstingl > --- > drivers/clk/meson/meson8b.h | 8 ++++---- > include/dt-bindings/clock/meson8b-clkc.h | 7 ++++++- > 2 files changed, 10 insertions(+), 5 deletions(-) > > diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h > index 5f4d8e49dd4d..d6e35c1acc05 100644 > --- a/drivers/clk/meson/meson8b.h > +++ b/drivers/clk/meson/meson8b.h > @@ -169,10 +169,10 @@ > #define RESETID_L2_CACHE_SOFT_RESET 0 > #define RESETID_AXI_64_TO_128_BRIDGE_A5_SOFT_RESET 1 > #define RESETID_SCU_SOFT_RESET 2 > -#define RESETID_CPU0_SOFT_RESET 3 > -#define RESETID_CPU1_SOFT_RESET 4 > -#define RESETID_CPU2_SOFT_RESET 5 > -#define RESETID_CPU3_SOFT_RESET 6 > +/* RESETID_CPU0_SOFT_RESET */ > +/* RESETID_CPU1_SOFT_RESET */ > +/* RESETID_CPU2_SOFT_RESET */ > +/* RESETID_CPU3_SOFT_RESET */ > #define RESETID_A5_GLOBAL_RESET 7 > #define RESETID_A5_AXI_SOFT_RESET 8 > #define RESETID_A5_ABP_SOFT_RESET 9 > diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h > index e29227fb52a1..76920cfd1f33 100644 > --- a/include/dt-bindings/clock/meson8b-clkc.h > +++ b/include/dt-bindings/clock/meson8b-clkc.h > @@ -1,5 +1,5 @@ > /* > - * Meson8b clock tree IDs > + * Meson8b clock and reset tree IDs > */ > > #ifndef __MESON8B_CLKC_H > @@ -32,4 +32,9 @@ > #define CLKID_USB0_DDR_BRIDGE 65 > #define CLKID_SANA 69 > > +#define RESETID_CPU0_SOFT_RESET 3 > +#define RESETID_CPU1_SOFT_RESET 4 > +#define RESETID_CPU2_SOFT_RESET 5 > +#define RESETID_CPU3_SOFT_RESET 6 > + > #endif /* __MESON8B_CLKC_H */ > In line with the comment on your clk patch, I think now we should "expose" everything. Neil From mboxrd@z Thu Jan 1 00:00:00 1970 From: narmstrong@baylibre.com (Neil Armstrong) Date: Tue, 25 Jul 2017 10:00:27 +0200 Subject: [PATCH v4 5/7] clk: meson: meson8b: export the CPU soft reset lines In-Reply-To: <20170722191946.22938-6-martin.blumenstingl@googlemail.com> References: <20170722191946.22938-1-martin.blumenstingl@googlemail.com> <20170722191946.22938-6-martin.blumenstingl@googlemail.com> Message-ID: <5976FA9B.8090501@baylibre.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Le 22/07/2017 21:19, Martin Blumenstingl a ?crit : > Export the soft reset lines for the CPU cores so they can be used in the > dt-bindings (required for SMP booting the CPU cores). > > Signed-off-by: Martin Blumenstingl > --- > drivers/clk/meson/meson8b.h | 8 ++++---- > include/dt-bindings/clock/meson8b-clkc.h | 7 ++++++- > 2 files changed, 10 insertions(+), 5 deletions(-) > > diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h > index 5f4d8e49dd4d..d6e35c1acc05 100644 > --- a/drivers/clk/meson/meson8b.h > +++ b/drivers/clk/meson/meson8b.h > @@ -169,10 +169,10 @@ > #define RESETID_L2_CACHE_SOFT_RESET 0 > #define RESETID_AXI_64_TO_128_BRIDGE_A5_SOFT_RESET 1 > #define RESETID_SCU_SOFT_RESET 2 > -#define RESETID_CPU0_SOFT_RESET 3 > -#define RESETID_CPU1_SOFT_RESET 4 > -#define RESETID_CPU2_SOFT_RESET 5 > -#define RESETID_CPU3_SOFT_RESET 6 > +/* RESETID_CPU0_SOFT_RESET */ > +/* RESETID_CPU1_SOFT_RESET */ > +/* RESETID_CPU2_SOFT_RESET */ > +/* RESETID_CPU3_SOFT_RESET */ > #define RESETID_A5_GLOBAL_RESET 7 > #define RESETID_A5_AXI_SOFT_RESET 8 > #define RESETID_A5_ABP_SOFT_RESET 9 > diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h > index e29227fb52a1..76920cfd1f33 100644 > --- a/include/dt-bindings/clock/meson8b-clkc.h > +++ b/include/dt-bindings/clock/meson8b-clkc.h > @@ -1,5 +1,5 @@ > /* > - * Meson8b clock tree IDs > + * Meson8b clock and reset tree IDs > */ > > #ifndef __MESON8B_CLKC_H > @@ -32,4 +32,9 @@ > #define CLKID_USB0_DDR_BRIDGE 65 > #define CLKID_SANA 69 > > +#define RESETID_CPU0_SOFT_RESET 3 > +#define RESETID_CPU1_SOFT_RESET 4 > +#define RESETID_CPU2_SOFT_RESET 5 > +#define RESETID_CPU3_SOFT_RESET 6 > + > #endif /* __MESON8B_CLKC_H */ > In line with the comment on your clk patch, I think now we should "expose" everything. Neil From mboxrd@z Thu Jan 1 00:00:00 1970 From: Neil Armstrong Subject: Re: [PATCH v4 5/7] clk: meson: meson8b: export the CPU soft reset lines Date: Tue, 25 Jul 2017 10:00:27 +0200 Message-ID: <5976FA9B.8090501@baylibre.com> References: <20170722191946.22938-1-martin.blumenstingl@googlemail.com> <20170722191946.22938-6-martin.blumenstingl@googlemail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20170722191946.22938-6-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Martin Blumenstingl , linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org, carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org, linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, arnd-r2nGTMty4D4@public.gmane.org List-Id: devicetree@vger.kernel.org Le 22/07/2017 21:19, Martin Blumenstingl a écrit : > Export the soft reset lines for the CPU cores so they can be used in the > dt-bindings (required for SMP booting the CPU cores). > > Signed-off-by: Martin Blumenstingl > --- > drivers/clk/meson/meson8b.h | 8 ++++---- > include/dt-bindings/clock/meson8b-clkc.h | 7 ++++++- > 2 files changed, 10 insertions(+), 5 deletions(-) > > diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h > index 5f4d8e49dd4d..d6e35c1acc05 100644 > --- a/drivers/clk/meson/meson8b.h > +++ b/drivers/clk/meson/meson8b.h > @@ -169,10 +169,10 @@ > #define RESETID_L2_CACHE_SOFT_RESET 0 > #define RESETID_AXI_64_TO_128_BRIDGE_A5_SOFT_RESET 1 > #define RESETID_SCU_SOFT_RESET 2 > -#define RESETID_CPU0_SOFT_RESET 3 > -#define RESETID_CPU1_SOFT_RESET 4 > -#define RESETID_CPU2_SOFT_RESET 5 > -#define RESETID_CPU3_SOFT_RESET 6 > +/* RESETID_CPU0_SOFT_RESET */ > +/* RESETID_CPU1_SOFT_RESET */ > +/* RESETID_CPU2_SOFT_RESET */ > +/* RESETID_CPU3_SOFT_RESET */ > #define RESETID_A5_GLOBAL_RESET 7 > #define RESETID_A5_AXI_SOFT_RESET 8 > #define RESETID_A5_ABP_SOFT_RESET 9 > diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h > index e29227fb52a1..76920cfd1f33 100644 > --- a/include/dt-bindings/clock/meson8b-clkc.h > +++ b/include/dt-bindings/clock/meson8b-clkc.h > @@ -1,5 +1,5 @@ > /* > - * Meson8b clock tree IDs > + * Meson8b clock and reset tree IDs > */ > > #ifndef __MESON8B_CLKC_H > @@ -32,4 +32,9 @@ > #define CLKID_USB0_DDR_BRIDGE 65 > #define CLKID_SANA 69 > > +#define RESETID_CPU0_SOFT_RESET 3 > +#define RESETID_CPU1_SOFT_RESET 4 > +#define RESETID_CPU2_SOFT_RESET 5 > +#define RESETID_CPU3_SOFT_RESET 6 > + > #endif /* __MESON8B_CLKC_H */ > In line with the comment on your clk patch, I think now we should "expose" everything. Neil -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html