From: jeffy <jeffy.chen@rock-chips.com>
To: Shawn Lin <shawn.lin@rock-chips.com>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
Douglas Anderson <dianders@chromium.org>,
Brian Norris <briannorris@chromium.org>
Subject: Re: [PATCH v3] PCI: rockchip: fix system hang up if activating CONFIG_DEBUG_SHIRQ
Date: Fri, 11 Aug 2017 10:39:08 +0800 [thread overview]
Message-ID: <598D18CC.5080104@rock-chips.com> (raw)
In-Reply-To: <1502416371-185632-1-git-send-email-shawn.lin@rock-chips.com>
Hi Shawn,
On 08/11/2017 09:52 AM, Shawn Lin wrote:
> +static void rockchip_pcie_disable_clocks(void *data)
> +{
> + struct rockchip_pcie *rockchip = data;
> +
> + clk_disable_unprepare(rockchip->clk_pcie_pm);
> + clk_disable_unprepare(rockchip->hclk_pcie);
> + clk_disable_unprepare(rockchip->aclk_perf_pcie);
> + clk_disable_unprepare(rockchip->aclk_pcie);
> +}
maybe we can reuse this function in suspend noirq
> +
> static int rockchip_pcie_probe(struct platform_device *pdev)
> {
> struct rockchip_pcie *rockchip;
> @@ -1493,31 +1511,49 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> err = clk_prepare_enable(rockchip->aclk_pcie);
> if (err) {
> dev_err(dev, "unable to enable aclk_pcie clock\n");
> - goto err_aclk_pcie;
> + return err;
> }
>
> err = clk_prepare_enable(rockchip->aclk_perf_pcie);
> if (err) {
> dev_err(dev, "unable to enable aclk_perf_pcie clock\n");
> - goto err_aclk_perf_pcie;
> + clk_disable_unprepare(rockchip->aclk_pcie);
> + return err;
> }
>
> err = clk_prepare_enable(rockchip->hclk_pcie);
> if (err) {
> dev_err(dev, "unable to enable hclk_pcie clock\n");
> - goto err_hclk_pcie;
> + clk_disable_unprepare(rockchip->aclk_pcie);
> + clk_disable_unprepare(rockchip->aclk_perf_pcie);
> + return err;
> }
>
> err = clk_prepare_enable(rockchip->clk_pcie_pm);
> if (err) {
> - dev_err(dev, "unable to enable hclk_pcie clock\n");
> - goto err_pcie_pm;
> + dev_err(dev, "unable to enable clk_pcie_pm clock\n");
> + clk_disable_unprepare(rockchip->aclk_pcie);
> + clk_disable_unprepare(rockchip->aclk_perf_pcie);
> + clk_disable_unprepare(rockchip->hclk_pcie);
> + return err;
> }
maybe we can have a rockchip_pcie_enable_clocks for these, and also
reuse it in resume noirq
prev parent reply other threads:[~2017-08-11 2:39 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-11 1:52 [PATCH v3] PCI: rockchip: fix system hang up if activating CONFIG_DEBUG_SHIRQ Shawn Lin
2017-08-11 2:39 ` jeffy [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=598D18CC.5080104@rock-chips.com \
--to=jeffy.chen@rock-chips.com \
--cc=bhelgaas@google.com \
--cc=briannorris@chromium.org \
--cc=dianders@chromium.org \
--cc=heiko@sntech.de \
--cc=linux-pci@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=shawn.lin@rock-chips.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.