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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4887a30bcdbsm27793547f8f.2.2026.09.28.08.21.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 28 Sep 2026 08:21:05 -0700 (PDT) Message-ID: <598d5c80-7b03-41cd-b708-6f833c1e9b08@redhat.com> Date: Mon, 28 Sep 2026 17:21:02 +0200 Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Reply-To: eric.auger@redhat.com Subject: Re: [PATCH v9 13/26] target/arm/kvm: Introduce kvm_arm_expose_idreg_properties To: Khushit Shah Cc: "eric.auger.pro@gmail.com" , "qemu-devel@nongnu.org" , "qemu-arm@nongnu.org" , "kvmarm@lists.linux.dev" , "peter.maydell@linaro.org" , Shaju Abraham , "yangjinqian1@huawei.com" , "cohuck@redhat.com" , "richard.henderson@linaro.org" , "sebott@redhat.com" , "skolothumtho@nvidia.com" , "philmd@oss.qualcomm.com" , "maz@kernel.org" , "oliver.upton@linux.dev" , "pbonzini@redhat.com" , "armbru@redhat.com" , "berrange@redhat.com" , "abologna@redhat.com" , "jdenemar@redhat.com" References: <20260916144721.751810-1-eric.auger@redhat.com> <20260916144721.751810-14-eric.auger@redhat.com> <67EB28E9-F8CE-4BE1-8712-88583DEFF24E@nutanix.com> From: Eric Auger In-Reply-To: <67EB28E9-F8CE-4BE1-8712-88583DEFF24E@nutanix.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: Bmd6sZrCVD4hc_ZCFgAtIhWlw4dXKNAmKHDOPWnuAUM_1790608866 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi Khushit, On 9/24/26 8:26 AM, Khushit Shah wrote: > >> On 16 Sep 2026, at 8:15 PM, Eric Auger wrote: >> >> + >> +/* >> + * decode_idreg_writemap: Generate props for writable fields >> + * >> + * @obj: CPU object >> + * @reg: description of the sysreg >> + */ >> +static int >> +decode_idreg_writemap(Object *obj, ARM64SysReg *reg) >> +{ >> + uint64_t map = reg->writable_mask; >> + int i = ctz64(map); >> + int nb_sysreg_props = 0; >> + >> + while (map) { >> + ARM64SysRegField *field = get_field(i, reg); >> + int lower, upper; >> + char *prop_name; >> + uint64_t field_mask; >> + >> + if (!field) { >> + warn_report("%s bit %d of %s is writable but no named field " >> + "in target/arm/cpu-idregs.h.inc", >> + __func__, i, reg->name); >> + map = map & ~BIT_ULL(i); >> + i = ctz64(map); >> + continue; >> + } >> + lower = field->shift; >> + upper = field->shift + field->length - 1; >> + prop_name = g_strdup_printf("SYSREG_%s_%s", reg->name, field->name); >> + trace_decode_idreg_writemap(field->name, lower, upper, prop_name); >> + object_property_add(obj, prop_name, "uint64", >> + get_sysreg_prop, set_sysreg_prop, NULL, field); >> + g_free(prop_name); >> + nb_sysreg_props++; >> + >> + field_mask = MAKE_64BIT_MASK(lower, field->length); >> + map = map & ~field_mask; >> + i = ctz64(map); >> + } >> + trace_nb_sysreg_props(reg->name, nb_sysreg_props); >> + return 0; >> +} >> + > We can try field based handling, it is more elegant. > - for each field, check if not RES and writable. As discussed I now enumerate all the fields instead of decoding the writbale bitmask. But I still do some sanity checks on the consumed writable bitmask: - check the field is fully writable - check if, after enumerating all fields I still have some writable bits. The above cases would highlight some inconsistencies between KVM outputs and qemu architecture description. I think it is worth. Thanks Eric > > > > >