From: "Zhang, Jerry (Junwei)" <Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
To: Alex Deucher
<alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
Subject: Re: [PATCH] drm/amdgpu/gfx9: properly set the hdp flush reg for Raven
Date: Mon, 4 Sep 2017 09:53:35 +0800 [thread overview]
Message-ID: <59ACB21F.6070004@amd.com> (raw)
In-Reply-To: <1504333124-18129-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
On 09/02/2017 02:18 PM, Alex Deucher wrote:
> Was only being assigned for vega10.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 66f92c8..7ff6240 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3514,7 +3514,9 @@ static void gfx_v9_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
> u32 ref_and_mask, reg_mem_engine;
> struct nbio_hdp_flush_reg *nbio_hf_reg;
>
> - if (ring->adev->asic_type == CHIP_VEGA10)
> + if (ring->adev->flags & AMD_IS_APU)
> + nbio_hf_reg = &nbio_v7_0_hdp_flush_reg;
> + else
> nbio_hf_reg = &nbio_v6_1_hdp_flush_reg;
>
> if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) {
>
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prev parent reply other threads:[~2017-09-04 1:53 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-02 6:18 [PATCH] drm/amdgpu/gfx9: properly set the hdp flush reg for Raven Alex Deucher
[not found] ` <1504333124-18129-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
2017-09-04 1:53 ` Zhang, Jerry (Junwei) [this message]
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