Re: [Qemu-devel] MIPS 'move' insn emulation

[Sergey Smolov <smolov@ispras.ru>]

On 12.09.2017 17:32, Peter Maydell wrote:
> On 12 September 2017 at 15:14, Sergey Smolov <smolov@ispras.ru> wrote:
>> I've the code I probably need to modify in target/mips/translate.c:
>>
>> [code]
>>
>> static void gen_logic(DisasContext *ctx, uint32_t opc,
>>                        int rd, int rs, int rt)
>> {
>> ...
>> } else if (rs != 0 && rt == 0) {
>>              tcg_gen_mov_tl(cpu_gpr[rd], cpu_gpr[rs]);
>> }
>>
>> [/code]
>>
>> I suppose that for my assembler program cpu_gpr[rs] here should contain 0x7
>> value at runtime. Is it possible to extract this value somehow? I've tried
>> the following constructions:
>>
>> GET_TCG_I32(cpu_gpr[rs])
>> ((CPUMIPSState *)tcg_ctx.cpu)->active_tc.gpr[rs]
>>
>> but they do not provide me the correct value.
> You can't do this in this bit of the code. The functions in
> translate.c are called at "translate time", when we convert
> MIPS assembly into x86 code to run on the host. At this point
> we don't know what the values in MIPS registers are, because
> we're generating code that will later be run multiple times
> perhaps with different values. The register contents are only
> known later, at "run time".
>
> thanks
> -- PMM

Thank you, Peter.

Generally speaking, is it possible at "run time" to detect write 
accesses to MIPS GPR registers?
If true, which parts of code should I look in?

-- 
Sincerely yours,
Sergey Smolov