Re: [V2] mmc: sdhci-pci-gli: Improve Random 4K Read Performance of GL9763E

["Christian Löhle" <CLoehle@hyperstone.com>]

>This patch is based on patch [1] and adopt Adrian's comment.
>
>Due to flaws in hardware design, GL9763E takes long time to exit from L1
>state. The I/O performance will suffer severe impact if it often enter
>and exit L1 state.
>
>Unfortunately, entering and exiting L1 state is signal handshake in
>physical layer, software knows nothiong about it. The only way to stop
>entering L1 state is to disable hardware LPM negotiation on GL9763E.
>
>To improve read performance and take battery life into account, we reject
>L1 negotiation while executing MMC_READ_MULTIPLE_BLOCK command and enable
>L1 negotiation again when receiving non-MMC_READ_MULTIPLE_BLOCK command.
>

Could you describe the impact for people unfamilar with the GL9763E?
Does this essientially disable low-power mode if the controller serviced a CMD18 last?
(which will be most of the (idle) time for reasonable scenarios, right?)
Or what exactly is the LPM negotation doing?=
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