From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chanwoo Choi Subject: Re: [PATCH 2/2] arm64: dts: exynos: Fix typo in MSCL clock controller unit address Date: Thu, 21 Dec 2017 09:54:09 +0900 Message-ID: <5A3B0631.6090305@samsung.com> References: <20171220192702.32515-1-krzk@kernel.org> <20171220192702.32515-2-krzk@kernel.org> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Return-path: In-reply-to: <20171220192702.32515-2-krzk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Krzysztof Kozlowski , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Kukjin Kim , Marek Szyprowski , Andrzej Hajda , Alim Akhtar , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-samsung-soc@vger.kernel.org On 2017년 12월 21일 04:27, Krzysztof Kozlowski wrote: > Fix typo in unit address of MSCL clock controller (the reg entry is > correct). > > Signed-off-by: Krzysztof Kozlowski > --- > arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > index 0ba5df825eff..3e8311c60d1b 100644 > --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > @@ -468,7 +468,7 @@ > clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_ATLAS>; > }; > > - cmu_mscl: clock-controller@105d0000 { > + cmu_mscl: clock-controller@150d0000 { > compatible = "samsung,exynos5433-cmu-mscl"; > reg = <0x150d0000 0x1000>; > #clock-cells = <1>; > Looks good to me. Reviewed-by: Chanwoo Choi -- Best Regards, Chanwoo Choi Samsung Electronics -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: cw00.choi@samsung.com (Chanwoo Choi) Date: Thu, 21 Dec 2017 09:54:09 +0900 Subject: [PATCH 2/2] arm64: dts: exynos: Fix typo in MSCL clock controller unit address In-Reply-To: <20171220192702.32515-2-krzk@kernel.org> References: <20171220192702.32515-1-krzk@kernel.org> <20171220192702.32515-2-krzk@kernel.org> Message-ID: <5A3B0631.6090305@samsung.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2017? 12? 21? 04:27, Krzysztof Kozlowski wrote: > Fix typo in unit address of MSCL clock controller (the reg entry is > correct). > > Signed-off-by: Krzysztof Kozlowski > --- > arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > index 0ba5df825eff..3e8311c60d1b 100644 > --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > @@ -468,7 +468,7 @@ > clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_ATLAS>; > }; > > - cmu_mscl: clock-controller at 105d0000 { > + cmu_mscl: clock-controller at 150d0000 { > compatible = "samsung,exynos5433-cmu-mscl"; > reg = <0x150d0000 0x1000>; > #clock-cells = <1>; > Looks good to me. Reviewed-by: Chanwoo Choi -- Best Regards, Chanwoo Choi Samsung Electronics From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757311AbdLUAyM (ORCPT ); Wed, 20 Dec 2017 19:54:12 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:46100 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755861AbdLUAyI (ORCPT ); Wed, 20 Dec 2017 19:54:08 -0500 DKIM-Filter: OpenDKIM Filter v2.11.0 mailout2.samsung.com 20171221005406epoutp02cf869f1e480fba07af9e3fbf86306aa2~CKSEQkIZZ0925609256epoutp02f X-AuditID: b6c32a36-3bdff7000000117d-d7-5a3b062e4e21 MIME-version: 1.0 Content-transfer-encoding: 8BIT Content-type: text/plain; charset="UTF-8" Message-id: <5A3B0631.6090305@samsung.com> Date: Thu, 21 Dec 2017 09:54:09 +0900 From: Chanwoo Choi Organization: Samsung Electronics User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 To: Krzysztof Kozlowski , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Kukjin Kim , Marek Szyprowski , Andrzej Hajda , Alim Akhtar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] arm64: dts: exynos: Fix typo in MSCL clock controller unit address In-reply-to: <20171220192702.32515-2-krzk@kernel.org> X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa0hTYRju29nOzqTVaWp9GJUdkshy7ZymHUujyGKUgRCFLcQO87SNduOc KV0ILSpN7CIVmJmmaITYhbmsDAvWvHTzmtp1hpqVUVbWWj+6nO0o9e99n+d53+/5Hl4MUR1D ozCzzclyNsZCoGHShnuL1HFqdKVeU3Z+Nv38SruMfl3egNJjF4sAXeEV2hNDHxC6o+OanHYN 9cnonsYylC7puCOhL3tfyema/i4JfbjJK6fff2mTrlbq6srrgM5VexTV1Vfn6o67a4Fu3DU3 TaZnk0wsk8Vy0azNYM8y24zJxMbNmWsz4xM0ZByZSC8nom2MlU0mUlLT4tabLYJHIjqHsWQL UBrD88TSVUmcPdvJRpvsvDOZ2E6SlJrULFdTFKXWLstYQcULkh2sKfC5WOYYke8+9bsH5IEG tBAoMIhrYYv/nLwQhGEq/CaAw7WPgdj8ALArf1g6qaoaH0ZF4jaAFy4PyIKEEp8BA6d8ggjD EHwe9HbvCsIIvghev311YqsPwGuuarmoj4Uj3/wgqJfiMXBwMCkIowJ8993TkKPp+HzYGxgC wToST4e3KvyhPRH4GwQWnO0MEeF4Bhzu9YV2KvB42BLoD7mG+AcUFn+8IhNdp8DGQ08m6nA4 2uqWBx+G+GzY3Zws6vMBzG8qR8TmNIDt/T6JOLAMjlQWSsTvTIOfvhfJxGElLDiiEiU6WDfu BWK9BvrPl0wkVA9g3olm6Ukwp/S/kEr/hVT6X0gXAFILZrIO3mpkedJBqXnGymfbjGqD3eoC oVOMTbgJqtpTPQDHADFVmWdYoVfJmBx+j9UDIIYQEcp944l6lTKL2bOX5eyZXLaF5T0gXsi4 GImKNNiFw7Y5M0ltokabQAk3lUiSxCxl5NW+dBVuZJzsLpZ1sNzknARTROWBnXqPXrugwlbZ uHjf2+tuFHfXlymLcv03fr5Qhz8cLdsQ03dga7r7t0Jj2Pap5cz9X0uOrDvYM/b94egjbsvS /UbFZ2phbuvHX+D+lEd/Xg5VFQRMTeauKq7z6wBVYmjYtN1VMgNr++GLaOlfr694Nnbc4KgZ MD8Io3u/7K7xWC4RUt7EkLEIxzN/ARHR88KgAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrPLMWRmVeSWpSXmKPExsVy+t9jAV1dNusog5W3jCxurTvHavFg3jY2 i/fLehgt5h8Bcvsfv2a2OH9+A7vFpsfXWC0u75rDZjHj/D4mi7VH7rJbLL1+kcmide8RdouX H0+wOPB6rJm3htFj06pONo/NS+o9+rasYvT4vEkugDWKyyYlNSezLLVI3y6BK+PHh4msBc/Y Kyb/u8zYwLiNrYuRk0NCwERi0ecnQDYXh5DATkaJ288bWEESvAKCEj8m32PpYuTgYBaQlzhy KRskzCygLjFp3iJmiPoHjBI7pi5igqjXknj25RsjSD2LgKrEo0c2IGE2oPD+FzfAdvELKEpc /fEYrERUIEKi+0QlyBgRgafMEu8eTWIBqREWiJW4P/UmE8T8zYwSi1o2s4MkOAVMJY79uM44 gZF/FpLzZiGcNwvJeQsYmVcxSqYWFOem5xYbFRjmpZbrFSfmFpfmpesl5+duYgRGw7bDWn07 GO8viT/EKMDBqMTD25BsFSXEmlhWXJl7iFGCg1lJhLf6s2WUEG9KYmVValF+fFFpTmrxIUZp DhYlcd7beccihQTSE0tSs1NTC1KLYLJMHJxSDYzWfLoCwi0X0mc+n7UpKvh0WsWdzRXubxhb eLP8dkSfDAjR4J6/M+bgyzt/+Lje89hftzY9uCx7a8WcHIUZO7OWFXKkCE1O93MoNVgkZXcl KrB1Qsib34VBzqemxs9YKifIzWqoFbtyq6e+HX+bZHb+5lK3xSUxrJNuuobsC46+vODFtdOM RUosxRmJhlrMRcWJALnFZ1CCAgAA X-CMS-MailID: 20171221005405epcas1p4f0b38694952c8f4662d8598102492d8c X-Msg-Generator: CA CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20171220192745epcas3p48bae7a4f6711433752beb01c5811e1af X-RootMTR: 20171220192745epcas3p48bae7a4f6711433752beb01c5811e1af References: <20171220192702.32515-1-krzk@kernel.org> <20171220192702.32515-2-krzk@kernel.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2017년 12월 21일 04:27, Krzysztof Kozlowski wrote: > Fix typo in unit address of MSCL clock controller (the reg entry is > correct). > > Signed-off-by: Krzysztof Kozlowski > --- > arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > index 0ba5df825eff..3e8311c60d1b 100644 > --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > @@ -468,7 +468,7 @@ > clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_ATLAS>; > }; > > - cmu_mscl: clock-controller@105d0000 { > + cmu_mscl: clock-controller@150d0000 { > compatible = "samsung,exynos5433-cmu-mscl"; > reg = <0x150d0000 0x1000>; > #clock-cells = <1>; > Looks good to me. Reviewed-by: Chanwoo Choi -- Best Regards, Chanwoo Choi Samsung Electronics