From mboxrd@z Thu Jan 1 00:00:00 1970 From: xuwei5@hisilicon.com (Wei Xu) Date: Fri, 22 Dec 2017 09:35:25 +0000 Subject: [PATCH v2] arm64: dts: hi3660: improve pmu description In-Reply-To: <1510226303-20950-1-git-send-email-xuyiping@hisilicon.com> References: <1510226303-20950-1-git-send-email-xuyiping@hisilicon.com> Message-ID: <5A3CD1DD.1020302@hisilicon.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Xu YiPing, On 2017/11/9 11:18, Xu YiPing wrote: > cortex-a73 pmu driver is supported now. hi3660 is 4*a73 + 4*a53, so it > should use "cortex-a73-pmu" and "cortex-a53-pmu" instead of "armpmu-v3", > then we can use the a73 and a53 events in perf tool directly. > > Signed-off-by: Xu YiPing Applied into hisilicon dt tree. Thanks! Best Regards, Wei > --- > arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 22 +++++++++++++--------- > 1 file changed, 13 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > index 13ae69f..f4882d3 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > @@ -203,21 +203,25 @@ > IRQ_TYPE_LEVEL_HIGH)>; > }; > > - pmu { > - compatible = "arm,armv8-pmuv3"; > + a53-pmu { > + compatible = "arm,cortex-a53-pmu"; > interrupts = , > , > , > - , > - , > - , > - , > - ; > + ; > interrupt-affinity = <&cpu0>, > <&cpu1>, > <&cpu2>, > - <&cpu3>, > - <&cpu4>, > + <&cpu3>; > + }; > + > + a73-pmu { > + compatible = "arm,cortex-a73-pmu"; > + interrupts = , > + , > + , > + ; > + interrupt-affinity = <&cpu4>, > <&cpu5>, > <&cpu6>, > <&cpu7>; > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Xu Subject: Re: [PATCH v2] arm64: dts: hi3660: improve pmu description Date: Fri, 22 Dec 2017 09:35:25 +0000 Message-ID: <5A3CD1DD.1020302@hisilicon.com> References: <1510226303-20950-1-git-send-email-xuyiping@hisilicon.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1510226303-20950-1-git-send-email-xuyiping@hisilicon.com> Sender: linux-kernel-owner@vger.kernel.org To: Xu YiPing , robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, suzhuangluan@hisilicon.com, zhongkaihua@huawei.com, chenjun14@huawei.com Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org Hi Xu YiPing, On 2017/11/9 11:18, Xu YiPing wrote: > cortex-a73 pmu driver is supported now. hi3660 is 4*a73 + 4*a53, so it > should use "cortex-a73-pmu" and "cortex-a53-pmu" instead of "armpmu-v3", > then we can use the a73 and a53 events in perf tool directly. > > Signed-off-by: Xu YiPing Applied into hisilicon dt tree. Thanks! Best Regards, Wei > --- > arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 22 +++++++++++++--------- > 1 file changed, 13 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > index 13ae69f..f4882d3 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > @@ -203,21 +203,25 @@ > IRQ_TYPE_LEVEL_HIGH)>; > }; > > - pmu { > - compatible = "arm,armv8-pmuv3"; > + a53-pmu { > + compatible = "arm,cortex-a53-pmu"; > interrupts = , > , > , > - , > - , > - , > - , > - ; > + ; > interrupt-affinity = <&cpu0>, > <&cpu1>, > <&cpu2>, > - <&cpu3>, > - <&cpu4>, > + <&cpu3>; > + }; > + > + a73-pmu { > + compatible = "arm,cortex-a73-pmu"; > + interrupts = , > + , > + , > + ; > + interrupt-affinity = <&cpu4>, > <&cpu5>, > <&cpu6>, > <&cpu7>; > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758084AbdLVJgF (ORCPT ); Fri, 22 Dec 2017 04:36:05 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:2755 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1757923AbdLVJfz (ORCPT ); Fri, 22 Dec 2017 04:35:55 -0500 Subject: Re: [PATCH v2] arm64: dts: hi3660: improve pmu description To: Xu YiPing , , , , , , , References: <1510226303-20950-1-git-send-email-xuyiping@hisilicon.com> CC: , , From: Wei Xu Message-ID: <5A3CD1DD.1020302@hisilicon.com> Date: Fri, 22 Dec 2017 09:35:25 +0000 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <1510226303-20950-1-git-send-email-xuyiping@hisilicon.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.202.226.123] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Xu YiPing, On 2017/11/9 11:18, Xu YiPing wrote: > cortex-a73 pmu driver is supported now. hi3660 is 4*a73 + 4*a53, so it > should use "cortex-a73-pmu" and "cortex-a53-pmu" instead of "armpmu-v3", > then we can use the a73 and a53 events in perf tool directly. > > Signed-off-by: Xu YiPing Applied into hisilicon dt tree. Thanks! Best Regards, Wei > --- > arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 22 +++++++++++++--------- > 1 file changed, 13 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > index 13ae69f..f4882d3 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > @@ -203,21 +203,25 @@ > IRQ_TYPE_LEVEL_HIGH)>; > }; > > - pmu { > - compatible = "arm,armv8-pmuv3"; > + a53-pmu { > + compatible = "arm,cortex-a53-pmu"; > interrupts = , > , > , > - , > - , > - , > - , > - ; > + ; > interrupt-affinity = <&cpu0>, > <&cpu1>, > <&cpu2>, > - <&cpu3>, > - <&cpu4>, > + <&cpu3>; > + }; > + > + a73-pmu { > + compatible = "arm,cortex-a73-pmu"; > + interrupts = , > + , > + , > + ; > + interrupt-affinity = <&cpu4>, > <&cpu5>, > <&cpu6>, > <&cpu7>; >