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From: Liran Alon <LIRAN.ALON@ORACLE.COM>
To: Paolo Bonzini <pbonzini@redhat.com>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: jmattson@google.com, aliguori@amazon.com,
	thomas.lendacky@amd.com, dwmw@amazon.co.uk, bp@alien8.de
Subject: Re: [PATCH 5/7] kvm: svm: pass MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD down to guest
Date: Mon, 08 Jan 2018 21:41:16 +0200	[thread overview]
Message-ID: <5A53C95C.5000602@ORACLE.COM> (raw)
In-Reply-To: <1515434925-10250-6-git-send-email-pbonzini@redhat.com>



On 08/01/18 20:08, Paolo Bonzini wrote:
> Direct access to MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD is important
> for performance.  Allow load/store of MSR_IA32_SPEC_CTRL, restore guest
> IBRS on VM entry and set it to 0 on VM exit (because Linux does not use
> it yet).
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>   arch/x86/kvm/svm.c | 34 +++++++++++++++++++++++++++++++++-
>   1 file changed, 33 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index 55dde3896898..779981a00d01 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -183,6 +183,8 @@ struct vcpu_svm {
>   		u64 gs_base;
>   	} host;
>
> +	u64 spec_ctrl;
> +
>   	u32 *msrpm;
>
>   	ulong nmi_iret_rip;
> @@ -236,7 +238,7 @@ struct amd_svm_iommu_ir {
>
>   static const struct svm_direct_access_msrs {
>   	u32 index;   /* Index of the MSR */
> -	bool always; /* True if intercept is always on */
> +	bool always; /* True if intercept is always off */

By examining svm_vcpu_init_msrpm() it seems you are correct as if 
always==true then read/write bits are cleared from msrpm (which 
pass-through the MSR to the guest).

However, I do think this comment change should be done in a separate 
commit as it is unrelated.

>   } direct_access_msrs[] = {
>   	{ .index = MSR_STAR,				.always = true  },
>   	{ .index = MSR_IA32_SYSENTER_CS,		.always = true  },
> @@ -248,6 +250,8 @@ struct amd_svm_iommu_ir {
>   	{ .index = MSR_CSTAR,				.always = true  },
>   	{ .index = MSR_SYSCALL_MASK,			.always = true  },
>   #endif
> +	{ .index = MSR_IA32_SPEC_CTRL,			.always = true  },
> +	{ .index = MSR_IA32_PRED_CMD,			.always = true  },
>   	{ .index = MSR_IA32_LASTBRANCHFROMIP,		.always = false },
>   	{ .index = MSR_IA32_LASTBRANCHTOIP,		.always = false },
>   	{ .index = MSR_IA32_LASTINTFROMIP,		.always = false },
> @@ -283,6 +287,8 @@ struct amd_svm_iommu_ir {
>   /* enable/disable Virtual GIF */
>   static int vgif = true;
>   module_param(vgif, int, 0444);
> +
> +static bool __read_mostly have_spec_ctrl;
>
>   static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
>   static void svm_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa);
> @@ -1135,6 +1141,17 @@ static __init int svm_hardware_setup(void)
>   			pr_info("Virtual GIF supported\n");
>   	}
>
> +	/*
> +	 * FIXME: this is only needed until SPEC_CTRL is supported
> +	 * by upstream Linux in cpufeatures, then it can be replaced
> +	 * with static_cpu_has.
> +	 */
> +	have_spec_ctrl = cpu_has_spec_ctrl();
> +	if (have_spec_ctrl)
> +		pr_info("kvm: SPEC_CTRL available\n");
> +	else
> +		pr_info("kvm: SPEC_CTRL not available\n");
> +
>   	return 0;
>
>   err:
> @@ -3599,6 +3616,9 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>   	case MSR_VM_CR:
>   		msr_info->data = svm->nested.vm_cr_msr;
>   		break;
> +	case MSR_IA32_SPEC_CTRL:
> +		msr_info->data = svm->spec_ctrl;
> +		break;
>   	case MSR_IA32_UCODE_REV:
>   		msr_info->data = 0x01000065;
>   		break;
> @@ -3754,6 +3774,9 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
>   	case MSR_VM_IGNNE:
>   		vcpu_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data);
>   		break;
> +	case MSR_IA32_SPEC_CTRL:
> +		svm->spec_ctrl = data;
> +		break;
>   	case MSR_IA32_APICBASE:
>   		if (kvm_vcpu_apicv_active(vcpu))
>   			avic_update_vapic_bar(to_svm(vcpu), data);
> @@ -4942,6 +4965,9 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu)
>
>   	local_irq_enable();
>
> +	if (have_spec_ctrl && svm->spec_ctrl != 0)
> +		wrmsrl(MSR_IA32_SPEC_CTRL, svm->spec_ctrl);
> +
>   	asm volatile (
>   		"push %%" _ASM_BP "; \n\t"
>   		"mov %c[rbx](%[svm]), %%" _ASM_BX " \n\t"
> @@ -5015,6 +5041,12 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu)
>   #endif
>   		);
>
> +	if (have_spec_ctrl) {
> +		rdmsrl(MSR_IA32_SPEC_CTRL, svm->spec_ctrl);
> +		if (svm->spec_ctrl != 0)

Very small stuff but I hate inconsistencies:
Either you put here (svm->spec_ctrl) like in arch/x86/kvm/vmx.c or you 
will use there (vmx->spec_ctrl != 0).

> +			wrmsrl(MSR_IA32_SPEC_CTRL, 0);
> +	}
> +
>   #ifdef CONFIG_X86_64
>   	wrmsrl(MSR_GS_BASE, svm->host.gs_base);
>   #else
>

  reply	other threads:[~2018-01-08 19:41 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-08 18:08 [PATCH 0/7] KVM: x86: expose CVE-2017-5715 ("Spectre variant 2") mitigations to guest Paolo Bonzini
2018-01-08 18:08 ` [PATCH 1/7] KVM: x86: add SPEC_CTRL and IBPB_SUPPORT accessors Paolo Bonzini
2018-01-08 18:33   ` Konrad Rzeszutek Wilk
2018-01-08 19:09   ` Liran Alon
2018-01-09 10:32     ` Paolo Bonzini
2018-01-09 11:14   ` David Hildenbrand
2018-01-09 11:18     ` Paolo Bonzini
2018-01-08 18:08 ` [PATCH 2/7] x86/msr: add definitions for indirect branch predictor MSRs Paolo Bonzini
2018-01-08 18:35   ` Konrad Rzeszutek Wilk
2018-01-08 18:52     ` Jim Mattson
2018-01-08 19:10   ` Liran Alon
2018-01-08 18:08 ` [PATCH 3/7] kvm: vmx: pass MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD down to the guest Paolo Bonzini
2018-01-08 18:43   ` Konrad Rzeszutek Wilk
2018-01-08 19:18   ` Jim Mattson
2018-01-08 20:23     ` Liran Alon
2018-01-08 22:32     ` Paolo Bonzini
2018-01-08 23:19       ` Jim Mattson
2018-01-09 10:11         ` Paolo Bonzini
2018-01-08 19:22   ` Liran Alon
2018-01-08 19:41   ` David Woodhouse
2018-01-08 22:33     ` Paolo Bonzini
2018-01-08 22:09   ` Ashok Raj
2018-01-08 22:25     ` Paolo Bonzini
2018-01-11  2:47   ` Tim Chen
2018-01-11 10:41     ` Paolo Bonzini
2018-01-08 18:08 ` [PATCH 4/7] kvm: vmx: Set IBPB when running a different VCPU Paolo Bonzini
2018-01-08 19:23   ` Liran Alon
2018-01-08 19:36   ` Jim Mattson
2018-01-09  8:33     ` Paolo Bonzini
2018-01-09 11:01   ` David Hildenbrand
2018-01-08 18:08 ` [PATCH 5/7] kvm: svm: pass MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD down to guest Paolo Bonzini
2018-01-08 19:41   ` Liran Alon [this message]
2018-01-08 18:08 ` [PATCH 6/7] x86/svm: Set IBPB when running a different VCPU Paolo Bonzini
2018-01-08 20:00   ` Liran Alon
2018-01-09 11:07     ` Paolo Bonzini
2018-01-08 18:08 ` [PATCH 7/7] KVM: x86: add SPEC_CTRL and IBPB_SUPPORT to MSR and CPUID lists Paolo Bonzini
2018-01-08 20:07   ` Liran Alon
2018-01-08 20:15     ` Jim Mattson
2018-01-09 10:15 ` [PATCH 0/7] KVM: x86: expose CVE-2017-5715 ("Spectre variant 2") mitigations to guest Thomas Gleixner
2018-01-09 11:12   ` Paolo Bonzini
2018-01-09 12:03     ` Thomas Gleixner
2018-01-09 14:06       ` Paolo Bonzini

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