diff for duplicates of <5AAAA22E.5030009@hisilicon.com> diff --git a/a/1.txt b/N1/1.txt index 409ba82..f751c70 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -26,7 +26,7 @@ Wei > #reset-cells = <2>; > }; > -> + mailbox: mailbox at e896b000 { +> + mailbox: mailbox@e896b000 { > + compatible = "hisilicon,hi3660-mbox"; > + reg = <0x0 0xe896b000 0x0 0x1000>; > + interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, @@ -34,7 +34,7 @@ Wei > + #mbox-cells = <3>; > + }; > + -> dual_timer0: timer at fff14000 { +> dual_timer0: timer@fff14000 { > compatible = "arm,sp804", "arm,primecell"; > reg = <0x0 0xfff14000 0x0 0x1000>; > diff --git a/a/content_digest b/N1/content_digest index 1543b24..712cdda 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,19 @@ "ref\01521130058-24796-1-git-send-email-leo.yan@linaro.org\0" "ref\01521130058-24796-4-git-send-email-leo.yan@linaro.org\0" - "From\0xuwei5@hisilicon.com (Wei Xu)\0" - "Subject\0[PATCH v7 3/3] dts: arm64: Add mailbox binding for hi3660\0" + "From\0Wei Xu <xuwei5@hisilicon.com>\0" + "Subject\0Re: [PATCH v7 3/3] dts: arm64: Add mailbox binding for hi3660\0" "Date\0Thu, 15 Mar 2018 16:41:18 +0000\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Leo Yan <leo.yan@linaro.org>" + Rob Herring <robh+dt@kernel.org> + Mark Rutland <mark.rutland@arm.com> + Jassi Brar <jassisinghbrar@gmail.com> + devicetree@vger.kernel.org + linux-kernel@vger.kernel.org + linux-arm-kernel@lists.infradead.org + Kaihua Zhong <zhongkaihua@huawei.com> + Guodong Xu <guodong.xu@linaro.org> + Haojian Zhuang <haojian.zhuang@linaro.org> + " Ruyi Wang <wangruyi@huawei.com>\0" "\00:1\0" "b\0" "Hi Leo,\n" @@ -34,7 +44,7 @@ "> \t\t\t#reset-cells = <2>;\n" "> \t\t};\n" "> \n" - "> +\t\tmailbox: mailbox at e896b000 {\n" + "> +\t\tmailbox: mailbox@e896b000 {\n" "> +\t\t\tcompatible = \"hisilicon,hi3660-mbox\";\n" "> +\t\t\treg = <0x0 0xe896b000 0x0 0x1000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -42,9 +52,9 @@ "> +\t\t\t#mbox-cells = <3>;\n" "> +\t\t};\n" "> +\n" - "> \t\tdual_timer0: timer at fff14000 {\n" + "> \t\tdual_timer0: timer@fff14000 {\n" "> \t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n" "> \t\t\treg = <0x0 0xfff14000 0x0 0x1000>;\n" > -498b782dde4e65de3082910341dd04ba6d5e44a800d3b035cc02a6b44c456db0 +a5090e558994285a3642a68187c147a2527adca3a6f4473cb571a93da3724226
diff --git a/a/1.txt b/N2/1.txt index 409ba82..f751c70 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -26,7 +26,7 @@ Wei > #reset-cells = <2>; > }; > -> + mailbox: mailbox at e896b000 { +> + mailbox: mailbox@e896b000 { > + compatible = "hisilicon,hi3660-mbox"; > + reg = <0x0 0xe896b000 0x0 0x1000>; > + interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, @@ -34,7 +34,7 @@ Wei > + #mbox-cells = <3>; > + }; > + -> dual_timer0: timer at fff14000 { +> dual_timer0: timer@fff14000 { > compatible = "arm,sp804", "arm,primecell"; > reg = <0x0 0xfff14000 0x0 0x1000>; > diff --git a/a/content_digest b/N2/content_digest index 1543b24..3da3bd5 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,9 +1,19 @@ "ref\01521130058-24796-1-git-send-email-leo.yan@linaro.org\0" "ref\01521130058-24796-4-git-send-email-leo.yan@linaro.org\0" - "From\0xuwei5@hisilicon.com (Wei Xu)\0" - "Subject\0[PATCH v7 3/3] dts: arm64: Add mailbox binding for hi3660\0" + "From\0Wei Xu <xuwei5@hisilicon.com>\0" + "Subject\0Re: [PATCH v7 3/3] dts: arm64: Add mailbox binding for hi3660\0" "Date\0Thu, 15 Mar 2018 16:41:18 +0000\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Leo Yan <leo.yan@linaro.org>" + Rob Herring <robh+dt@kernel.org> + Mark Rutland <mark.rutland@arm.com> + Jassi Brar <jassisinghbrar@gmail.com> + <devicetree@vger.kernel.org> + <linux-kernel@vger.kernel.org> + <linux-arm-kernel@lists.infradead.org> + Kaihua Zhong <zhongkaihua@huawei.com> + Guodong Xu <guodong.xu@linaro.org> + Haojian Zhuang <haojian.zhuang@linaro.org> + " Ruyi Wang <wangruyi@huawei.com>\0" "\00:1\0" "b\0" "Hi Leo,\n" @@ -34,7 +44,7 @@ "> \t\t\t#reset-cells = <2>;\n" "> \t\t};\n" "> \n" - "> +\t\tmailbox: mailbox at e896b000 {\n" + "> +\t\tmailbox: mailbox@e896b000 {\n" "> +\t\t\tcompatible = \"hisilicon,hi3660-mbox\";\n" "> +\t\t\treg = <0x0 0xe896b000 0x0 0x1000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -42,9 +52,9 @@ "> +\t\t\t#mbox-cells = <3>;\n" "> +\t\t};\n" "> +\n" - "> \t\tdual_timer0: timer at fff14000 {\n" + "> \t\tdual_timer0: timer@fff14000 {\n" "> \t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n" "> \t\t\treg = <0x0 0xfff14000 0x0 0x1000>;\n" > -498b782dde4e65de3082910341dd04ba6d5e44a800d3b035cc02a6b44c456db0 +5e7f1b8ad819eb87122e0cd07c3a16d37ac452936e125987690e37c3272bfcca
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