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diff for duplicates of <5B152E4D.4040205@huawei.com>

diff --git a/a/1.txt b/N1/1.txt
index 0605020..d1fbb09 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -47,8 +47,8 @@ It seems that it's better to change this to 'default'.
 > :::::: The code at line 3053 was first introduced by commit
 > :::::: 80a506b8fdcfa868bb53eb740f928217d0966fc1 x86/amd-iommu: Export cache-coherency capability
 > 
-> :::::: TO: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>
-> :::::: CC: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>
+> :::::: TO: Joerg Roedel <joerg.roedel@amd.com>
+> :::::: CC: Joerg Roedel <joerg.roedel@amd.com>
 > 
 > ---
 > 0-DAY kernel test infrastructure                Open Source Technology Center
diff --git a/a/content_digest b/N1/content_digest
index 2243e30..9483cca 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,22 +1,9 @@
  "ref\01527752569-18020-6-git-send-email-thunder.leizhen@huawei.com\0"
  "ref\0201806020106.eRUp2Ehc%fengguang.wu@intel.com\0"
- "ref\0201806020106.eRUp2Ehc%fengguang.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org\0"
- "From\0Leizhen (ThunderTown) <thunder.leizhen-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\0"
- "Subject\0Re: [PATCH 5/7] iommu/dma: add support for non-strict mode\0"
+ "From\0thunder.leizhen@huawei.com (Leizhen (ThunderTown))\0"
+ "Subject\0[PATCH 5/7] iommu/dma: add support for non-strict mode\0"
  "Date\0Mon, 4 Jun 2018 20:19:25 +0800\0"
- "To\0kbuild test robot <lkp-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\0"
- "Cc\0linux-arm-msm <linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>"
-  Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
-  iommu <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>
-  linux-kernel <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
-  Xinwei Hu <huxinwei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
-  Guozhu Li <liguozhu-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
-  linux-mediatek <linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
-  kbuild-all-JC7UmRfGjtg@public.gmane.org
-  Libin <huawei.libin-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
-  Hanjun Guo <guohanjun-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
-  Matthias Brugger <matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- " linux-arm-kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "\n"
@@ -68,8 +55,8 @@
  "> :::::: The code at line 3053 was first introduced by commit\n"
  "> :::::: 80a506b8fdcfa868bb53eb740f928217d0966fc1 x86/amd-iommu: Export cache-coherency capability\n"
  "> \n"
- "> :::::: TO: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>\n"
- "> :::::: CC: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>\n"
+ "> :::::: TO: Joerg Roedel <joerg.roedel@amd.com>\n"
+ "> :::::: CC: Joerg Roedel <joerg.roedel@amd.com>\n"
  "> \n"
  "> ---\n"
  "> 0-DAY kernel test infrastructure                Open Source Technology Center\n"
@@ -80,4 +67,4 @@
  "Thanks!\n"
  BestRegards
 
-0785748f5b3e763fa59f39e5e1665fb53e3532b9839f04fd997e6e49f3e35cda
+81f4bf3992c70086ad00c99bc86f328cebd79df0377b780cc2119a26720a325d

diff --git a/a/1.txt b/N2/1.txt
index 0605020..d1fbb09 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -47,8 +47,8 @@ It seems that it's better to change this to 'default'.
 > :::::: The code at line 3053 was first introduced by commit
 > :::::: 80a506b8fdcfa868bb53eb740f928217d0966fc1 x86/amd-iommu: Export cache-coherency capability
 > 
-> :::::: TO: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>
-> :::::: CC: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>
+> :::::: TO: Joerg Roedel <joerg.roedel@amd.com>
+> :::::: CC: Joerg Roedel <joerg.roedel@amd.com>
 > 
 > ---
 > 0-DAY kernel test infrastructure                Open Source Technology Center
diff --git a/a/content_digest b/N2/content_digest
index 2243e30..b6bc651 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,22 +1,24 @@
  "ref\01527752569-18020-6-git-send-email-thunder.leizhen@huawei.com\0"
  "ref\0201806020106.eRUp2Ehc%fengguang.wu@intel.com\0"
- "ref\0201806020106.eRUp2Ehc%fengguang.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org\0"
- "From\0Leizhen (ThunderTown) <thunder.leizhen-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\0"
+ "From\0Leizhen (ThunderTown) <thunder.leizhen@huawei.com>\0"
  "Subject\0Re: [PATCH 5/7] iommu/dma: add support for non-strict mode\0"
  "Date\0Mon, 4 Jun 2018 20:19:25 +0800\0"
- "To\0kbuild test robot <lkp-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\0"
- "Cc\0linux-arm-msm <linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>"
-  Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
-  iommu <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>
-  linux-kernel <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
-  Xinwei Hu <huxinwei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
-  Guozhu Li <liguozhu-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
-  linux-mediatek <linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
-  kbuild-all-JC7UmRfGjtg@public.gmane.org
-  Libin <huawei.libin-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
-  Hanjun Guo <guohanjun-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
-  Matthias Brugger <matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- " linux-arm-kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0"
+ "To\0kbuild test robot <lkp@intel.com>\0"
+ "Cc\0<kbuild-all@01.org>"
+  Robin Murphy <robin.murphy@arm.com>
+  Will Deacon <will.deacon@arm.com>
+  Matthias Brugger <matthias.bgg@gmail.com>
+  Rob Clark <robdclark@gmail.com>
+  Joerg Roedel <joro@8bytes.org>
+  linux-mediatek <linux-mediatek@lists.infradead.org>
+  linux-arm-msm <linux-arm-msm@vger.kernel.org>
+  linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
+  iommu <iommu@lists.linux-foundation.org>
+  linux-kernel <linux-kernel@vger.kernel.org>
+  Hanjun Guo <guohanjun@huawei.com>
+  Libin <huawei.libin@huawei.com>
+  Guozhu Li <liguozhu@hisilicon.com>
+ " Xinwei Hu <huxinwei@huawei.com>\0"
  "\00:1\0"
  "b\0"
  "\n"
@@ -68,8 +70,8 @@
  "> :::::: The code at line 3053 was first introduced by commit\n"
  "> :::::: 80a506b8fdcfa868bb53eb740f928217d0966fc1 x86/amd-iommu: Export cache-coherency capability\n"
  "> \n"
- "> :::::: TO: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>\n"
- "> :::::: CC: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>\n"
+ "> :::::: TO: Joerg Roedel <joerg.roedel@amd.com>\n"
+ "> :::::: CC: Joerg Roedel <joerg.roedel@amd.com>\n"
  "> \n"
  "> ---\n"
  "> 0-DAY kernel test infrastructure                Open Source Technology Center\n"
@@ -80,4 +82,4 @@
  "Thanks!\n"
  BestRegards
 
-0785748f5b3e763fa59f39e5e1665fb53e3532b9839f04fd997e6e49f3e35cda
+5d0dccb950ea15dca3f91fc55d6c5286802b23123663e4fd145112729bf184a5

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