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From: "Zhang, Jerry (Junwei)" <Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
To: "Christian König"
	<ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH 1/7] drm/amdgpu: cleanup job header
Date: Mon, 16 Jul 2018 11:00:05 +0800	[thread overview]
Message-ID: <5B4C0A35.1080706@amd.com> (raw)
In-Reply-To: <20180713151949.13665-1-christian.koenig-5C7GfCeVMHo@public.gmane.org>

On 07/13/2018 11:19 PM, Christian König wrote:
> Move job related defines, structure and function declarations to
> amdgpu_job.h
>
> Signed-off-by: Christian König <christian.koenig@amd.com>

The series is
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>

One more cleanup is on the way.

Jerry

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h     | 46 +-------------------
>   drivers/gpu/drm/amd/amdgpu/amdgpu_job.h | 74 +++++++++++++++++++++++++++++++++
>   2 files changed, 75 insertions(+), 45 deletions(-)
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 8eaba0f4db10..a60555f8e6fd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -73,6 +73,7 @@
>   #include "amdgpu_virt.h"
>   #include "amdgpu_gart.h"
>   #include "amdgpu_debugfs.h"
> +#include "amdgpu_job.h"
>
>   /*
>    * Modules parameters.
> @@ -600,17 +601,6 @@ struct amdgpu_ib {
>
>   extern const struct drm_sched_backend_ops amdgpu_sched_ops;
>
> -int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
> -		     struct amdgpu_job **job, struct amdgpu_vm *vm);
> -int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
> -			     struct amdgpu_job **job);
> -
> -void amdgpu_job_free_resources(struct amdgpu_job *job);
> -void amdgpu_job_free(struct amdgpu_job *job);
> -int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
> -		      struct drm_sched_entity *entity, void *owner,
> -		      struct dma_fence **f);
> -
>   /*
>    * Queue manager
>    */
> @@ -1050,40 +1040,6 @@ struct amdgpu_cs_parser {
>   	struct drm_syncobj **post_dep_syncobjs;
>   };
>
> -#define AMDGPU_PREAMBLE_IB_PRESENT          (1 << 0) /* bit set means command submit involves a preamble IB */
> -#define AMDGPU_PREAMBLE_IB_PRESENT_FIRST    (1 << 1) /* bit set means preamble IB is first presented in belonging context */
> -#define AMDGPU_HAVE_CTX_SWITCH              (1 << 2) /* bit set means context switch occured */
> -
> -struct amdgpu_job {
> -	struct drm_sched_job    base;
> -	struct amdgpu_device	*adev;
> -	struct amdgpu_vm	*vm;
> -	struct amdgpu_ring	*ring;
> -	struct amdgpu_sync	sync;
> -	struct amdgpu_sync	sched_sync;
> -	struct amdgpu_ib	*ibs;
> -	struct dma_fence	*fence; /* the hw fence */
> -	uint32_t		preamble_status;
> -	uint32_t		num_ibs;
> -	void			*owner;
> -	uint64_t		fence_ctx; /* the fence_context this job uses */
> -	bool                    vm_needs_flush;
> -	uint64_t		vm_pd_addr;
> -	unsigned		vmid;
> -	unsigned		pasid;
> -	uint32_t		gds_base, gds_size;
> -	uint32_t		gws_base, gws_size;
> -	uint32_t		oa_base, oa_size;
> -	uint32_t		vram_lost_counter;
> -
> -	/* user fence handling */
> -	uint64_t		uf_addr;
> -	uint64_t		uf_sequence;
> -
> -};
> -#define to_amdgpu_job(sched_job)		\
> -		container_of((sched_job), struct amdgpu_job, base)
> -
>   static inline u32 amdgpu_get_ib_value(struct amdgpu_cs_parser *p,
>   				      uint32_t ib_idx, int idx)
>   {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
> new file mode 100644
> index 000000000000..35bb93254eb2
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
> @@ -0,0 +1,74 @@
> +/*
> + * Copyright 2018 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +#ifndef __AMDGPU_JOB_H__
> +#define __AMDGPU_JOB_H__
> +
> +/* bit set means command submit involves a preamble IB */
> +#define AMDGPU_PREAMBLE_IB_PRESENT          (1 << 0)
> +/* bit set means preamble IB is first presented in belonging context */
> +#define AMDGPU_PREAMBLE_IB_PRESENT_FIRST    (1 << 1)
> +/* bit set means context switch occured */
> +#define AMDGPU_HAVE_CTX_SWITCH              (1 << 2)
> +
> +#define to_amdgpu_job(sched_job)		\
> +		container_of((sched_job), struct amdgpu_job, base)
> +
> +struct amdgpu_job {
> +	struct drm_sched_job    base;
> +	struct amdgpu_device	*adev;
> +	struct amdgpu_vm	*vm;
> +	struct amdgpu_ring	*ring;
> +	struct amdgpu_sync	sync;
> +	struct amdgpu_sync	sched_sync;
> +	struct amdgpu_ib	*ibs;
> +	struct dma_fence	*fence; /* the hw fence */
> +	uint32_t		preamble_status;
> +	uint32_t		num_ibs;
> +	void			*owner;
> +	uint64_t		fence_ctx; /* the fence_context this job uses */
> +	bool                    vm_needs_flush;
> +	uint64_t		vm_pd_addr;
> +	unsigned		vmid;
> +	unsigned		pasid;
> +	uint32_t		gds_base, gds_size;
> +	uint32_t		gws_base, gws_size;
> +	uint32_t		oa_base, oa_size;
> +	uint32_t		vram_lost_counter;
> +
> +	/* user fence handling */
> +	uint64_t		uf_addr;
> +	uint64_t		uf_sequence;
> +
> +};
> +
> +int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
> +		     struct amdgpu_job **job, struct amdgpu_vm *vm);
> +int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
> +			     struct amdgpu_job **job);
> +
> +void amdgpu_job_free_resources(struct amdgpu_job *job);
> +void amdgpu_job_free(struct amdgpu_job *job);
> +int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
> +		      struct drm_sched_entity *entity, void *owner,
> +		      struct dma_fence **f);
> +#endif
>
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      parent reply	other threads:[~2018-07-16  3:00 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-13 15:19 [PATCH 1/7] drm/amdgpu: cleanup job header Christian König
     [not found] ` <20180713151949.13665-1-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-07-13 15:19   ` [PATCH 2/7] drm/amdgpu: remove fence context from the job Christian König
2018-07-13 15:19   ` [PATCH 3/7] drm/amdgpu: remove ring parameter from amdgpu_job_submit Christian König
2018-07-13 15:19   ` [PATCH 4/7] drm/amdgpu: remove job->ring Christian König
2018-07-13 15:19   ` [PATCH 5/7] drm/amdgpu: add amdgpu_job_submit_direct helper Christian König
2018-07-13 15:19   ` [PATCH 6/7] drm/amdgpu: remove job->adev Christian König
     [not found]     ` <20180713151949.13665-6-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-07-16 15:50       ` Michel Dänzer
     [not found]         ` <e0930c99-0221-23b4-7357-9e7eee16945e-otUistvHUpPR7s880joybQ@public.gmane.org>
2018-07-17  8:25           ` Christian König
2018-07-13 15:19   ` [PATCH 7/7] drm/amdgpu: minor cleanup in amdgpu_job.c Christian König
     [not found]     ` <20180713151949.13665-7-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-07-16  1:47       ` Zhou, David(ChunMing)
2018-07-16  3:00   ` Zhang, Jerry (Junwei) [this message]

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