Re: [PATCH 07/11] drm/amdgpu: add GMC9 support for PDs/PTs in system memory

From: "Zhang, Jerry (Junwei)" <Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
To: "Christian König"
	<ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH 07/11] drm/amdgpu: add GMC9 support for PDs/PTs in system memory
Date: Thu, 23 Aug 2018 10:50:49 +0800	[thread overview]
Message-ID: <5B7E2109.3020406@amd.com> (raw)
In-Reply-To: <20180822150517.2330-7-christian.koenig-5C7GfCeVMHo@public.gmane.org>

On 08/22/2018 11:05 PM, Christian König wrote:
> Add the necessary handling.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>

Looks going to use GTT for page table.
What kind of scenario to use that?
could it be replaced by CPU updating page table in system memory?

Regards,
Jerry

> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index e412eb8e347c..3393a329fc9c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -571,7 +571,7 @@ static uint64_t gmc_v9_0_get_vm_pte_flags(struct amdgpu_device *adev,
>   static void gmc_v9_0_get_vm_pde(struct amdgpu_device *adev, int level,
>   				uint64_t *addr, uint64_t *flags)
>   {
> -	if (!(*flags & AMDGPU_PDE_PTE))
> +	if (!(*flags & AMDGPU_PDE_PTE) && !(*flags & AMDGPU_PTE_SYSTEM))
>   		*addr = adev->vm_manager.vram_base_offset + *addr -
>   			adev->gmc.vram_start;
>   	BUG_ON(*addr & 0xFFFF00000000003FULL);
>
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