diff for duplicates of <5BA4FAEA.3010502@hisilicon.com> diff --git a/a/1.txt b/N1/1.txt index 00113f0..22913f7 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,8 +3,8 @@ Hi Suzuki, On 2018/9/12 14:53, Suzuki K Poulose wrote: > Switch to updated coresight bindings for hw ports. > -> Cc: xuwei5 at hisilicon.com -> Cc: lipengcheng8 at huawei.com +> Cc: xuwei5@hisilicon.com +> Cc: lipengcheng8@huawei.com > Cc: Mathieu Poirier <mathieu.poirier@linaro.org> > Tested-by: Leo Yan <leo.yan@linaro.org> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> @@ -31,7 +31,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + out-ports { > + port { @@ -42,7 +42,7 @@ Wei > }; > + }; > -> - port at 1 { +> - port@1 { > - reg = <0>; > + in-ports { > + port { @@ -59,7 +59,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + in-ports { > + port { @@ -71,7 +71,7 @@ Wei > }; > + }; > -> - port at 1 { +> - port@1 { > - reg = <0>; > + out-ports { > + port { @@ -86,7 +86,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + in-ports { > + port { @@ -98,12 +98,12 @@ Wei > }; > + }; > -> - port at 1 { +> - port@1 { > + out-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + -> + port at 0 { +> + port@0 { > reg = <0>; > replicator_out0: endpoint { > remote-endpoint = @@ -111,8 +111,8 @@ Wei > }; > }; > -> - port at 2 { -> + port at 1 { +> - port@2 { +> + port@1 { > reg = <1>; > replicator_out1: endpoint { > remote-endpoint = @@ -124,7 +124,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + in-ports { > + port { @@ -141,7 +141,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + in-ports { > + port { @@ -158,7 +158,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + out-ports { > + port { @@ -169,12 +169,12 @@ Wei > }; > + }; > -> - port at 1 { +> - port@1 { > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + -> + port at 0 { +> + port@0 { > reg = <0>; > acpu_funnel_in0: endpoint { > - slave-mode; @@ -183,8 +183,8 @@ Wei > }; > }; > -> - port at 2 { -> + port at 1 { +> - port@2 { +> + port@1 { > reg = <1>; > acpu_funnel_in1: endpoint { > - slave-mode; @@ -193,8 +193,8 @@ Wei > }; > }; > -> - port at 3 { -> + port at 2 { +> - port@3 { +> + port@2 { > reg = <2>; > acpu_funnel_in2: endpoint { > - slave-mode; @@ -203,8 +203,8 @@ Wei > }; > }; > -> - port at 4 { -> + port at 3 { +> - port@4 { +> + port@3 { > reg = <3>; > acpu_funnel_in3: endpoint { > - slave-mode; @@ -213,8 +213,8 @@ Wei > }; > }; > -> - port at 5 { -> + port at 4 { +> - port@5 { +> + port@4 { > reg = <4>; > acpu_funnel_in4: endpoint { > - slave-mode; @@ -223,8 +223,8 @@ Wei > }; > }; > -> - port at 6 { -> + port at 5 { +> - port@6 { +> + port@5 { > reg = <5>; > acpu_funnel_in5: endpoint { > - slave-mode; @@ -233,8 +233,8 @@ Wei > }; > }; > -> - port at 7 { -> + port at 6 { +> - port@7 { +> + port@6 { > reg = <6>; > acpu_funnel_in6: endpoint { > - slave-mode; @@ -243,8 +243,8 @@ Wei > }; > }; > -> - port at 8 { -> + port at 7 { +> - port@8 { +> + port@7 { > reg = <7>; > acpu_funnel_in7: endpoint { > - slave-mode; diff --git a/a/content_digest b/N1/content_digest index d3e79e5..80c619d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,18 @@ "ref\020180912135352.19722-1-suzuki.poulose@arm.com\0" "ref\020180912135352.19722-4-suzuki.poulose@arm.com\0" - "From\0xuwei5@hisilicon.com (Wei Xu)\0" - "Subject\0[PATCH v2 03/11] arm64: dts: hi6220: Update coresight bindings for hardware ports\0" + "From\0Wei Xu <xuwei5@hisilicon.com>\0" + "Subject\0Re: [PATCH v2 03/11] arm64: dts: hi6220: Update coresight bindings for hardware ports\0" "Date\0Fri, 21 Sep 2018 15:06:34 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Suzuki K Poulose <suzuki.poulose@arm.com>" + " linux-arm-kernel@lists.infradead.org\0" + "Cc\0mathieu.poirier@linaro.org" + linux-kernel@vger.kernel.org + devicetree@vger.kernel.org + robh@kernel.org + frowand.list@gmail.com + coresight@lists.linaro.org + leo.yan@linaro.org + " lipengcheng8@huawei.com\0" "\00:1\0" "b\0" "Hi Suzuki,\n" @@ -11,8 +20,8 @@ "On 2018/9/12 14:53, Suzuki K Poulose wrote:\n" "> Switch to updated coresight bindings for hw ports.\n" "> \n" - "> Cc: xuwei5 at hisilicon.com\n" - "> Cc: lipengcheng8 at huawei.com\n" + "> Cc: xuwei5@hisilicon.com\n" + "> Cc: lipengcheng8@huawei.com\n" "> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>\n" "> Tested-by: Leo Yan <leo.yan@linaro.org>\n" "> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>\n" @@ -39,7 +48,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tout-ports {\n" "> +\t\t\t\tport {\n" @@ -50,7 +59,7 @@ "> \t\t\t\t};\n" "> +\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@1 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\tport {\n" @@ -67,7 +76,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\tport {\n" @@ -79,7 +88,7 @@ "> \t\t\t\t};\n" "> +\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@1 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tout-ports {\n" "> +\t\t\t\tport {\n" @@ -94,7 +103,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\tport {\n" @@ -106,12 +115,12 @@ "> \t\t\t\t};\n" "> +\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@1 {\n" "> +\t\t\tout-ports {\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\t\t\tport at 0 {\n" + "> +\t\t\t\tport@0 {\n" "> \t\t\t\t\treg = <0>;\n" "> \t\t\t\t\treplicator_out0: endpoint {\n" "> \t\t\t\t\t\tremote-endpoint =\n" @@ -119,8 +128,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 2 {\n" - "> +\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@2 {\n" + "> +\t\t\t\tport@1 {\n" "> \t\t\t\t\treg = <1>;\n" "> \t\t\t\t\treplicator_out1: endpoint {\n" "> \t\t\t\t\t\tremote-endpoint =\n" @@ -132,7 +141,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\tport {\n" @@ -149,7 +158,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\tport {\n" @@ -166,7 +175,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tout-ports {\n" "> +\t\t\t\tport {\n" @@ -177,12 +186,12 @@ "> \t\t\t\t};\n" "> +\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@1 {\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\t\t\tport at 0 {\n" + "> +\t\t\t\tport@0 {\n" "> \t\t\t\t\treg = <0>;\n" "> \t\t\t\t\tacpu_funnel_in0: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -191,8 +200,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 2 {\n" - "> +\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@2 {\n" + "> +\t\t\t\tport@1 {\n" "> \t\t\t\t\treg = <1>;\n" "> \t\t\t\t\tacpu_funnel_in1: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -201,8 +210,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 3 {\n" - "> +\t\t\t\tport at 2 {\n" + "> -\t\t\t\tport@3 {\n" + "> +\t\t\t\tport@2 {\n" "> \t\t\t\t\treg = <2>;\n" "> \t\t\t\t\tacpu_funnel_in2: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -211,8 +220,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 4 {\n" - "> +\t\t\t\tport at 3 {\n" + "> -\t\t\t\tport@4 {\n" + "> +\t\t\t\tport@3 {\n" "> \t\t\t\t\treg = <3>;\n" "> \t\t\t\t\tacpu_funnel_in3: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -221,8 +230,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 5 {\n" - "> +\t\t\t\tport at 4 {\n" + "> -\t\t\t\tport@5 {\n" + "> +\t\t\t\tport@4 {\n" "> \t\t\t\t\treg = <4>;\n" "> \t\t\t\t\tacpu_funnel_in4: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -231,8 +240,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 6 {\n" - "> +\t\t\t\tport at 5 {\n" + "> -\t\t\t\tport@6 {\n" + "> +\t\t\t\tport@5 {\n" "> \t\t\t\t\treg = <5>;\n" "> \t\t\t\t\tacpu_funnel_in5: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -241,8 +250,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 7 {\n" - "> +\t\t\t\tport at 6 {\n" + "> -\t\t\t\tport@7 {\n" + "> +\t\t\t\tport@6 {\n" "> \t\t\t\t\treg = <6>;\n" "> \t\t\t\t\tacpu_funnel_in6: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -251,8 +260,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 8 {\n" - "> +\t\t\t\tport at 7 {\n" + "> -\t\t\t\tport@8 {\n" + "> +\t\t\t\tport@7 {\n" "> \t\t\t\t\treg = <7>;\n" "> \t\t\t\t\tacpu_funnel_in7: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -397,4 +406,4 @@ "> \t\t};\n" > -a384bfb955ce057280fdbd93e17cd88f1bb2b5d8df8351ea0869d30bced10699 +c470e22721dbd2f601ad00770024248d6eac47d8bc5f94231cd5692d989d1cb4
diff --git a/a/1.txt b/N2/1.txt index 00113f0..22913f7 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -3,8 +3,8 @@ Hi Suzuki, On 2018/9/12 14:53, Suzuki K Poulose wrote: > Switch to updated coresight bindings for hw ports. > -> Cc: xuwei5 at hisilicon.com -> Cc: lipengcheng8 at huawei.com +> Cc: xuwei5@hisilicon.com +> Cc: lipengcheng8@huawei.com > Cc: Mathieu Poirier <mathieu.poirier@linaro.org> > Tested-by: Leo Yan <leo.yan@linaro.org> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> @@ -31,7 +31,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + out-ports { > + port { @@ -42,7 +42,7 @@ Wei > }; > + }; > -> - port at 1 { +> - port@1 { > - reg = <0>; > + in-ports { > + port { @@ -59,7 +59,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + in-ports { > + port { @@ -71,7 +71,7 @@ Wei > }; > + }; > -> - port at 1 { +> - port@1 { > - reg = <0>; > + out-ports { > + port { @@ -86,7 +86,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + in-ports { > + port { @@ -98,12 +98,12 @@ Wei > }; > + }; > -> - port at 1 { +> - port@1 { > + out-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + -> + port at 0 { +> + port@0 { > reg = <0>; > replicator_out0: endpoint { > remote-endpoint = @@ -111,8 +111,8 @@ Wei > }; > }; > -> - port at 2 { -> + port at 1 { +> - port@2 { +> + port@1 { > reg = <1>; > replicator_out1: endpoint { > remote-endpoint = @@ -124,7 +124,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + in-ports { > + port { @@ -141,7 +141,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + in-ports { > + port { @@ -158,7 +158,7 @@ Wei > - #address-cells = <1>; > - #size-cells = <0>; > - -> - port at 0 { +> - port@0 { > - reg = <0>; > + out-ports { > + port { @@ -169,12 +169,12 @@ Wei > }; > + }; > -> - port at 1 { +> - port@1 { > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + -> + port at 0 { +> + port@0 { > reg = <0>; > acpu_funnel_in0: endpoint { > - slave-mode; @@ -183,8 +183,8 @@ Wei > }; > }; > -> - port at 2 { -> + port at 1 { +> - port@2 { +> + port@1 { > reg = <1>; > acpu_funnel_in1: endpoint { > - slave-mode; @@ -193,8 +193,8 @@ Wei > }; > }; > -> - port at 3 { -> + port at 2 { +> - port@3 { +> + port@2 { > reg = <2>; > acpu_funnel_in2: endpoint { > - slave-mode; @@ -203,8 +203,8 @@ Wei > }; > }; > -> - port at 4 { -> + port at 3 { +> - port@4 { +> + port@3 { > reg = <3>; > acpu_funnel_in3: endpoint { > - slave-mode; @@ -213,8 +213,8 @@ Wei > }; > }; > -> - port at 5 { -> + port at 4 { +> - port@5 { +> + port@4 { > reg = <4>; > acpu_funnel_in4: endpoint { > - slave-mode; @@ -223,8 +223,8 @@ Wei > }; > }; > -> - port at 6 { -> + port at 5 { +> - port@6 { +> + port@5 { > reg = <5>; > acpu_funnel_in5: endpoint { > - slave-mode; @@ -233,8 +233,8 @@ Wei > }; > }; > -> - port at 7 { -> + port at 6 { +> - port@7 { +> + port@6 { > reg = <6>; > acpu_funnel_in6: endpoint { > - slave-mode; @@ -243,8 +243,8 @@ Wei > }; > }; > -> - port at 8 { -> + port at 7 { +> - port@8 { +> + port@7 { > reg = <7>; > acpu_funnel_in7: endpoint { > - slave-mode; diff --git a/a/content_digest b/N2/content_digest index d3e79e5..31f69c6 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,9 +1,18 @@ "ref\020180912135352.19722-1-suzuki.poulose@arm.com\0" "ref\020180912135352.19722-4-suzuki.poulose@arm.com\0" - "From\0xuwei5@hisilicon.com (Wei Xu)\0" - "Subject\0[PATCH v2 03/11] arm64: dts: hi6220: Update coresight bindings for hardware ports\0" + "From\0Wei Xu <xuwei5@hisilicon.com>\0" + "Subject\0Re: [PATCH v2 03/11] arm64: dts: hi6220: Update coresight bindings for hardware ports\0" "Date\0Fri, 21 Sep 2018 15:06:34 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Suzuki K Poulose <suzuki.poulose@arm.com>" + " <linux-arm-kernel@lists.infradead.org>\0" + "Cc\0<mathieu.poirier@linaro.org>" + <linux-kernel@vger.kernel.org> + <devicetree@vger.kernel.org> + <robh@kernel.org> + <frowand.list@gmail.com> + <coresight@lists.linaro.org> + <leo.yan@linaro.org> + " <lipengcheng8@huawei.com>\0" "\00:1\0" "b\0" "Hi Suzuki,\n" @@ -11,8 +20,8 @@ "On 2018/9/12 14:53, Suzuki K Poulose wrote:\n" "> Switch to updated coresight bindings for hw ports.\n" "> \n" - "> Cc: xuwei5 at hisilicon.com\n" - "> Cc: lipengcheng8 at huawei.com\n" + "> Cc: xuwei5@hisilicon.com\n" + "> Cc: lipengcheng8@huawei.com\n" "> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>\n" "> Tested-by: Leo Yan <leo.yan@linaro.org>\n" "> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>\n" @@ -39,7 +48,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tout-ports {\n" "> +\t\t\t\tport {\n" @@ -50,7 +59,7 @@ "> \t\t\t\t};\n" "> +\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@1 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\tport {\n" @@ -67,7 +76,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\tport {\n" @@ -79,7 +88,7 @@ "> \t\t\t\t};\n" "> +\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@1 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tout-ports {\n" "> +\t\t\t\tport {\n" @@ -94,7 +103,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\tport {\n" @@ -106,12 +115,12 @@ "> \t\t\t\t};\n" "> +\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@1 {\n" "> +\t\t\tout-ports {\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\t\t\tport at 0 {\n" + "> +\t\t\t\tport@0 {\n" "> \t\t\t\t\treg = <0>;\n" "> \t\t\t\t\treplicator_out0: endpoint {\n" "> \t\t\t\t\t\tremote-endpoint =\n" @@ -119,8 +128,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 2 {\n" - "> +\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@2 {\n" + "> +\t\t\t\tport@1 {\n" "> \t\t\t\t\treg = <1>;\n" "> \t\t\t\t\treplicator_out1: endpoint {\n" "> \t\t\t\t\t\tremote-endpoint =\n" @@ -132,7 +141,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\tport {\n" @@ -149,7 +158,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\tport {\n" @@ -166,7 +175,7 @@ "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tport at 0 {\n" + "> -\t\t\t\tport@0 {\n" "> -\t\t\t\t\treg = <0>;\n" "> +\t\t\tout-ports {\n" "> +\t\t\t\tport {\n" @@ -177,12 +186,12 @@ "> \t\t\t\t};\n" "> +\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@1 {\n" "> +\t\t\tin-ports {\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\t\t\tport at 0 {\n" + "> +\t\t\t\tport@0 {\n" "> \t\t\t\t\treg = <0>;\n" "> \t\t\t\t\tacpu_funnel_in0: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -191,8 +200,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 2 {\n" - "> +\t\t\t\tport at 1 {\n" + "> -\t\t\t\tport@2 {\n" + "> +\t\t\t\tport@1 {\n" "> \t\t\t\t\treg = <1>;\n" "> \t\t\t\t\tacpu_funnel_in1: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -201,8 +210,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 3 {\n" - "> +\t\t\t\tport at 2 {\n" + "> -\t\t\t\tport@3 {\n" + "> +\t\t\t\tport@2 {\n" "> \t\t\t\t\treg = <2>;\n" "> \t\t\t\t\tacpu_funnel_in2: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -211,8 +220,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 4 {\n" - "> +\t\t\t\tport at 3 {\n" + "> -\t\t\t\tport@4 {\n" + "> +\t\t\t\tport@3 {\n" "> \t\t\t\t\treg = <3>;\n" "> \t\t\t\t\tacpu_funnel_in3: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -221,8 +230,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 5 {\n" - "> +\t\t\t\tport at 4 {\n" + "> -\t\t\t\tport@5 {\n" + "> +\t\t\t\tport@4 {\n" "> \t\t\t\t\treg = <4>;\n" "> \t\t\t\t\tacpu_funnel_in4: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -231,8 +240,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 6 {\n" - "> +\t\t\t\tport at 5 {\n" + "> -\t\t\t\tport@6 {\n" + "> +\t\t\t\tport@5 {\n" "> \t\t\t\t\treg = <5>;\n" "> \t\t\t\t\tacpu_funnel_in5: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -241,8 +250,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 7 {\n" - "> +\t\t\t\tport at 6 {\n" + "> -\t\t\t\tport@7 {\n" + "> +\t\t\t\tport@6 {\n" "> \t\t\t\t\treg = <6>;\n" "> \t\t\t\t\tacpu_funnel_in6: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -251,8 +260,8 @@ "> \t\t\t\t\t};\n" "> \t\t\t\t};\n" "> \n" - "> -\t\t\t\tport at 8 {\n" - "> +\t\t\t\tport at 7 {\n" + "> -\t\t\t\tport@8 {\n" + "> +\t\t\t\tport@7 {\n" "> \t\t\t\t\treg = <7>;\n" "> \t\t\t\t\tacpu_funnel_in7: endpoint {\n" "> -\t\t\t\t\t\tslave-mode;\n" @@ -397,4 +406,4 @@ "> \t\t};\n" > -a384bfb955ce057280fdbd93e17cd88f1bb2b5d8df8351ea0869d30bced10699 +a0ddc7191b21453f20da2f4654b231830e3cfbbb8b1beb00d4a1c8216d8ff289
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.