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From: "Jan Beulich" <JBeulich@suse.com>
To: Roger Pau Monne <roger.pau@citrix.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>,
	Wei Liu <wei.liu2@citrix.com>,
	Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	George Dunlap <George.Dunlap@eu.citrix.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Ian Jackson <Ian.Jackson@eu.citrix.com>, Tim Deegan <tim@xen.org>,
	Julien Grall <julien.grall@arm.com>,
	xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH v4 3/5] vpci/msix: carve p2m hole for MSIX MMIO regions
Date: Mon, 19 Nov 2018 07:56:18 -0700	[thread overview]
Message-ID: <5BF2CF1202000078001FD86C@prv1-mh.provo.novell.com> (raw)
In-Reply-To: <20181114115740.1050-4-roger.pau@citrix.com>

>>> On 14.11.18 at 12:57, <roger.pau@citrix.com> wrote:
> Make sure the MSIX MMIO regions don't have p2m entries setup, so that
> accesses to them trap into the hypervisor and can be handled by vpci.
> 
> Commit 042678762 ("x86/iommu: add map-reserved dom0-iommu option to
> map reserved memory ranges") added mappings for all the reserved
> regions into the PVH Dom0 p2m, and some of those reserved regions
> might contain MSIX MMIO regions, hence the need to make sure there are
> no mappings established.
> 
> Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>

Reviewed-by: Jan Beulich <jbeulich@suse.com>
despite ...

> --- a/xen/drivers/vpci/header.c
> +++ b/xen/drivers/vpci/header.c
> @@ -89,6 +89,17 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd,
>      bool map = cmd & PCI_COMMAND_MEMORY;
>      unsigned int i;
>  
> +    /*
> +     * Make sure there are no mappings in the MSIX MMIO areas, so that accesses
> +     * can be trapped (and emulated) by Xen when the memory decoding bit is
> +     * enabled.
> +     *
> +     * FIXME: punching holes after the p2m has been set up might be racy for
> +     * DomU usage, needs to be revisited.
> +     */
> +    if ( map && !rom_only && vpci_make_msix_hole(pdev) )
> +        return;

... this still worrying me, as I think it'll need to be re-implemented
altogether at that later point.

Afaict this patch is independent of the earlier two (leaving aside
some fuzz that would be easy to resolve), which means it could
go in ahead of them.

Jan


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  reply	other threads:[~2018-11-19 14:57 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-14 11:57 [PATCH v4 0/5] x86/pvh: fix fixes for PVH Dom0 Roger Pau Monne
2018-11-14 11:57 ` [PATCH v4 1/5] vpci: fix updating the command register Roger Pau Monne
2018-11-16 12:00   ` Jan Beulich
2018-11-16 14:32     ` Roger Pau Monné
2018-11-19  8:26       ` Jan Beulich
2018-11-19 11:09         ` Roger Pau Monné
2018-11-19 11:31           ` Jan Beulich
2018-11-14 11:57 ` [PATCH v4 2/5] vpci: fix deferral of long operations Roger Pau Monne
2018-11-14 12:08   ` Paul Durrant
2018-11-16 12:11   ` Jan Beulich
2018-11-16 14:57     ` Roger Pau Monné
2018-11-19  8:27       ` Jan Beulich
2018-11-14 11:57 ` [PATCH v4 3/5] vpci/msix: carve p2m hole for MSIX MMIO regions Roger Pau Monne
2018-11-19 14:56   ` Jan Beulich [this message]
2018-11-20 14:35     ` Roger Pau Monné
2018-11-14 11:57 ` [PATCH v4 4/5] amd/iommu: assign iommu devices to Xen Roger Pau Monne
2018-11-14 12:33   ` Andrew Cooper
2018-11-14 13:53     ` Jan Beulich
2018-11-14 16:09     ` Roger Pau Monné
2018-11-15 15:34   ` Jan Beulich
2018-11-15 16:00     ` Roger Pau Monné
2018-11-14 11:57 ` [PATCH v4 5/5] amd/iommu: skip bridge devices when updating IOMMU page tables Roger Pau Monne
2018-11-15 15:40   ` Jan Beulich
2018-11-15 15:48     ` Roger Pau Monné
2018-11-15 16:13       ` Jan Beulich

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