From: Wei Wang <wei.w.wang@intel.com>
To: Andi Kleen <ak@linux.intel.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
pbonzini@redhat.com, peterz@infradead.org, kan.liang@intel.com,
mingo@redhat.com, rkrcmar@redhat.com, like.xu@intel.com,
jannh@google.com, arei.gonglei@huawei.com
Subject: Re: [PATCH v4 10/10] KVM/x86/lbr: lazy save the guest lbr stack
Date: Fri, 28 Dec 2018 11:47:06 +0800 [thread overview]
Message-ID: <5C259CBA.4030805@intel.com> (raw)
In-Reply-To: <20181227205104.GG25620@tassilo.jf.intel.com>
On 12/28/2018 04:51 AM, Andi Kleen wrote:
> Thanks. This looks a lot better than the earlier versions.
>
> Some more comments.
>
> On Wed, Dec 26, 2018 at 05:25:38PM +0800, Wei Wang wrote:
>> When the vCPU is scheduled in:
>> - if the lbr feature was used in the last vCPU time slice, set the lbr
>> stack to be interceptible, so that the host can capture whether the
>> lbr feature will be used in this time slice;
>> - if the lbr feature wasn't used in the last vCPU time slice, disable
>> the vCPU support of the guest lbr switching.
> time slice is the time from exit to exit?
It's the vCPU thread time slice (e.g. 100ms).
>
> This might be rather short in some cases if the workload does a lot of exits
> (which I would expect PMU workloads to do) Would be better to use some
> explicit time check, or at least N exits.
Did you mean further increasing the lazy time to multiple host thread
scheduling time slices?
What would be a good value for "N"?
>> Upon the first access to one of the lbr related MSRs (since the vCPU was
>> scheduled in):
>> - record that the guest has used the lbr;
>> - create a host perf event to help save/restore the guest lbr stack if
>> the guest uses the user callstack mode lbr stack;
> This is a bit risky. It would be safer (but also more expensive)
> to always safe even for any guest LBR use independent of callstack.
>
> Otherwise we might get into a situation where
> a vCPU context switch inside the guest PMI will clear the LBRs
> before they can be read in the PMI, so some LBR samples will be fully
> or partially cleared. This would be user visible.
>
> In theory could try to detect if the guest is inside a PMI and
> save/restore then, but that would likely be complicated. I would
> save/restore for all cases.
Yes, it is easier to save for all the cases. But curious for the
non-callstack
mode, it's just ponit sampling functions (kind of speculative in some
degree).
Would rarely losing a few recordings important in that case?
>
>> +static void
>> +__always_inline vmx_set_intercept_for_msr(unsigned long *msr_bitmap, u32 msr,
>> + int type, bool value);
> __always_inline should only be used if it's needed for functionality,
> or in a header.
Thanks, will fix it.
Best,
Wei
next prev parent reply other threads:[~2018-12-28 3:47 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-26 9:25 [PATCH v4 00/10] Guest LBR Enabling Wei Wang
2018-12-26 9:25 ` [PATCH v4 01/10] perf/x86: fix the variable type of the LBR MSRs Wei Wang
2018-12-26 9:25 ` [PATCH v4 02/10] perf/x86: add a function to get the lbr stack Wei Wang
2018-12-26 9:25 ` [PATCH v4 03/10] KVM/x86: KVM_CAP_X86_GUEST_LBR Wei Wang
2018-12-26 9:25 ` [PATCH v4 04/10] KVM/x86: intel_pmu_lbr_enable Wei Wang
2019-01-02 16:33 ` Liang, Kan
2019-01-04 9:58 ` Wei Wang
2019-01-04 15:57 ` Liang, Kan
2019-01-05 10:09 ` Wei Wang
2019-01-07 14:22 ` Liang, Kan
2019-01-08 6:13 ` Wei Wang
2019-01-08 14:08 ` Liang, Kan
2019-01-09 1:54 ` Wei Wang
2019-01-02 23:26 ` Jim Mattson
2019-01-03 7:22 ` Wei Wang
2019-01-03 15:34 ` Jim Mattson
2019-01-03 17:18 ` Andi Kleen
2019-01-04 10:09 ` Wei Wang
2019-01-04 15:53 ` Jim Mattson
2019-01-05 10:15 ` Wang, Wei W
2018-12-26 9:25 ` [PATCH v4 05/10] KVM/x86: expose MSR_IA32_PERF_CAPABILITIES to the guest Wei Wang
2019-01-02 23:40 ` Jim Mattson
2019-01-03 8:00 ` Wei Wang
2019-01-03 15:25 ` Jim Mattson
2019-01-07 9:15 ` Wei Wang
2019-01-07 18:05 ` Jim Mattson
2019-01-07 18:20 ` Andi Kleen
2019-01-07 18:48 ` Jim Mattson
2019-01-07 20:14 ` Andi Kleen
2019-01-07 21:00 ` Jim Mattson
2019-01-08 7:53 ` Wei Wang
2019-01-08 17:19 ` Jim Mattson
2018-12-26 9:25 ` [PATCH v4 06/10] perf/x86: no counter allocation support Wei Wang
2018-12-26 9:25 ` [PATCH v4 07/10] KVM/x86/vPMU: Add APIs to support host save/restore the guest lbr stack Wei Wang
2018-12-26 9:25 ` [PATCH v4 08/10] perf/x86: save/restore LBR_SELECT on vCPU switching Wei Wang
2018-12-26 9:25 ` [PATCH v4 09/10] perf/x86: function to check lbr user callstack mode Wei Wang
2018-12-26 9:25 ` [PATCH v4 10/10] KVM/x86/lbr: lazy save the guest lbr stack Wei Wang
2018-12-27 20:51 ` Andi Kleen
2018-12-28 3:47 ` Wei Wang [this message]
2018-12-28 19:10 ` Andi Kleen
2018-12-27 20:52 ` [PATCH v4 10/10] KVM/x86/lbr: lazy save the guest lbr stack II Andi Kleen
2018-12-29 4:25 ` Wang, Wei W
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5C259CBA.4030805@intel.com \
--to=wei.w.wang@intel.com \
--cc=ak@linux.intel.com \
--cc=arei.gonglei@huawei.com \
--cc=jannh@google.com \
--cc=kan.liang@intel.com \
--cc=kvm@vger.kernel.org \
--cc=like.xu@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peterz@infradead.org \
--cc=rkrcmar@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.